SP3238E
Intelligent +3.0V to +5.5V RS-232 Transceiver
FEATURES
■ Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
■ Interoperable with EIA/TIA-232 and
adheres to EIA/TIA-562 down to a +2.7V
power source
■ AUTO ON-LINE® circuitry automatically
wakes up from a 1µA shutdown
■ Minimum 250Kbps data rate under load
■ Regulated Charge Pump Yields Stable
RS-232 Outputs Regardless of VCC
Variations
■ Enhanced ESD Specifications:
+15kV Human Body Model
+15kV IEC61000-4-2 Air Discharge
+8kV IEC61000-4-2 Contact Discharge
C2+ 1
28 C1+
GND 2
27 V+
C2- 3
26 VCC
V- 4
T1OUT 5
T2OUT
6
T3 OUT
7
25
SP3238E
C1-
24 T1 IN
23 T2 IN
22 T3 IN
R1IN
8
21 R1OUT
R 2IN
9
20 R2OUT
T4OUT 10
19 T4IN
R3 IN 11
T5 OUT 12
18
17
R3 OUT
T5 IN
ONLINE 13
16
R1OUT
15 STATUS
SHUTDOWN 14
Now Available in Lead Free Packaging
DESCRIPTION
The SP3238E device is an RS-232 transceiver solution intended for portable or hand-held applications
such as notebook and palmtop computers. The SP3238E uses an internal high-efficiency, charge-pump
power supply that requires only 0.1µF capacitors in 3.3V operation. This charge pump and Exar's driver
architecture allow the SP3238E device to deliver compliant RS-232 performance from a single power
supply ranging from +3.0V to +5.5V. The SP3238E is a 5-driver / 3-receiver device that is ideal for laptop
/ notebook computer and PDA applications. The SP3238E includes one complementary receiver that
remains alert to monitor an external device's Ring Indicate signal while the device is shutdown.
The AUTO ON-LINE® feature allows the device to automatically "wake-up" during a shutdown state
when an RS-232 cable is connected and a connected peripheral is turned on. Otherwise, the device
automatically shuts itself down drawing less than 1µA.
Device
Power
Supplies
RS-232
Drivers
RS-232
Receivers
External
Components
Auto
On-Line
Circuitry
SELECTION TABLE
TTL 3-State
# of
Pins
SP3220E
+3.0V to +5.5V
1
1
4 Capacitors
No
Yes
16
SP3223E
+3.0V to +5.5V
2
2
4 Capacitors
Yes
Yes
20
SP3243E
+3.0V to +5.5V
3
5
4 Capacitors
Yes
Yes
28
SP3238E
+3.0V to +5.5V
5
3
4 Capacitors
Yes
Yes
28
SP3238E_101_012920
1
ABSOLUTE MAXIMUM RATINGS
Power Dissipation per package
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
28-pin SSOP (derate 11.2mW/oC above +70oC)..........900mW
28-pin TSSOP (derate 13.2mW/oC above +70oC)......1100mW
VCC.......................................................-0.3V to +6.0V
V+ (NOTE 1).......................................-0.3V to +7.0V
V- (NOTE 1)........................................+0.3V to -7.0V
V+ + |V-| (NOTE 1)...........................................+13V
ICC (DC VCC or GND current).........................+100mA
Input Voltages
TxIN, ONLINE, SHUTDOWN, ....-0.3V to Vcc + 0.3V
RxIN...................................................................+25V
Output Voltages
TxOUT.............................................................+13.2V
RxOUT, STATUS.......................-0.3V to (VCC +0.3V)
Short-Circuit Duration
TxOUT....................................................Continuous
Storage Temperature......................-65°C to +150°C
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
ELECTRICAL CHARACTERISTICS
VCC = +3.0V to +5.5V, C1 - C4 = 0.1µF (tested at 3.3V +/-5%), C1 - C4 = 0.22µF (tested at 3.3V +/-10%),
C1 = 0.047µF and C2 - C4 = 0.33µF (tested at 5.0V +/-10%), TAMB = TMIN to TMAX, unless otherwise noted. Typical
values are at TA = 25oC
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
Supply Current, AUTO ONLINE®
1.0
10
µA
All RxIN open, ONLINE = GND,
SHUTDOWN = VCC, TxIN = GND or
VCC
Supply Current, Shutdown
1.0
10
µA
SHUTDOWN = GND, TxIN = Vcc or
GND
Supply Current
AUTO ON-LINE® Disabled
0.3
1.0
mA
0.8
V
V
DC CHARACTERISTICS
ONLINE = SHUTDOWN = Vcc,
no load, TxIN = GND or VCC
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold
LOW
HIGH
2.4
VCC = +3.3V or +5.0V, TxIN
ONLINE, SHUTDOWN
Input Leakage Current
+0.01
+1.0
µA
TxIN, ONLINE, SHUTDOWN,
TAMB = +25oC
Output Leakage Current
+0.05
+10
µA
Receivers disabled
0.4
Output Voltage LOW
Output Voltage HIGH
V
IOUT = 1.6mA
VCC -0.6
VCC -0.1
V
IOUT = -1.0mA
+5.0
+5.4
V
All driver outputs loaded with 3KΩ to
GND
DRIVER OUTPUTS
Output Voltage Swing
SP3238E_101_012920
2
ELECTRICAL CHARACTERISTICS
VCC = +3.0V to +5.5V, C1 - C4 = 0.1µF (tested at 3.3V +/-5%), C1 - C4 = 0.22µF (tested at 3.3V +/-10%),
C1 = 0.047µF and C2 - C4 = 0.33µF (tested at 5.0V +/-10%), TAMB = TMIN to TMAX, unless otherwise noted. Typical
values are at TA = 25oC
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
DRIVER OUTPUTS (continued)
Output Resistance
300
Output Short-Circuit Current
Ω
+35
+60
mA
25
V
VCC = V+ = V- = 0V, VOUT=+2V
VOUT = 0V
RECEIVER INPUTS
Input Voltage Range
-25
Input Threshold LOW
0.6
1.2
V
Vcc = 3.3V
Input Threshold LOW
0.8
1.5
V
Vcc = 5.0V
Input Threshold HIGH
1.5
2.4
V
Vcc = 3.3V
Input Threshold HIGH
1.8
2.4
V
Vcc = 5.0V
7
kΩ
Input Hysteresis
Input Resistance
0.5
3
5
V
AUTO ON-LINE® CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = VCC)
STATUS Output Voltage LOW
STATUS Output Voltage HIGH
0.4
VCC -0.6
V
IOUT = 1.6mA
V
IOUT = -1.0mA
Receiver Threshold to Drivers
Enabled (tONLINE)
200
µs
Figure 10
Receiver Positive or Negative
Threshold to STATUS HIGH (tSTSH)
0.5
µs
Figure 10
Receiver Positive or Negative
Threshold to STATUS LOW (tSTSL)
20
µs
Figure 10
TIMING CHARACTERISTICS
Maximum Data Rate
250
kbps
RL = 3KΩ, CL = 1000pF, one
driver switching
Receiver Propagation Delay
tPHL
tPLH
0.15
0.15
µs
Receiver input to Receiver output, CL = 150pF
Receiver Output Enable Time
200
ns
Normal operation
Receiver Output Disable Time
200
ns
Normal operation
Driver Skew
100
ns
| tPHL - tPLH |, TAMB = 25°C
Receiver Skew
50
Transition-Region Slew Rate
ns
30
V/µs
| tPHL - tPLH |
Vcc = 3.3V, RL = 3kΩ, TAMB =
25°C, measurements taken from
-3.0V to +3.0V or +3.0V to -3.0V
SP3238E_101_012920
3
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 250kbps data rate, all
drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
25
20
V /u S
6
V o lt
4
2
15
POS. SR
NE G S R
10
VOH
0
-2 0
1000
2000
3000
4000
5
VOL
5000
0
-4
0
-6
1000
2000
3000
4000
5000
pF
pF
Figure 2. Slew Rate VS. Load Capacitance
Figure 1. Transmitter Output Voltage VS. Load
Capacitance
60
50
mA
40
250K bps
30
120K bps
20K bps
20
10
0
0
1000
2000
3000
4000
5000
pF
Figure 3. Supply Current VS. Load Capacitance
when Transmitting Data
SP3238E_101_012920
4
NAME
FUNCTION
C2+
Positive terminal of the symmetrical charge-pump capacitor C2.
PIN NUMBER
1
GND
Ground.
2
C2-
Negative terminal of the symmetrical charge-pump capacitor C2.
3
V-
Regulated -5.5V output generated by the charge pump.
4
T1OUT
RS-232 Driver Output.
5
T2OUT
RS-232 Driver Output.
6
T3OUT
RS-232 Driver Output.
7
R1IN
RS-232 receiver input.
8
R2IN
RS-232 receiver input.
9
T4OUT
RS-232 Driver Output.
10
R3IN
RS-232 receiver input.
11
T5OUT
RS-232 Driver Output.
12
ONLINE
Apply logic HIGH to override AUTO ON-LINE® circuitry keeping drivers
active (SHUTDOWN must also be logic HIGH, refer to Table 2).
13
SHUTDOWN
Apply logic LOW to shut down drivers and charge pump.
This overrides all AUTO ON-LINE® circuitry and ONLINE (Refer to table 2).
14
STATUS
TTL/CMOS Output indicating if a RS-232 signal is present on any receiver
input.
15
R1OUT
Non-Inverting receiver - 1 output, active in shutdown.
16
T5IN
TTL/CMOS driver input.
17
R3OUT
TTL/CMOS receiver output.
18
T4IN
TTL/CMOS driver input.
19
R2OUT
TTL/CMOS receiver output.
20
R1OUT
TTL/CMOS receiver output.
21
T3IN
TTL/CMOS driver input.
22
T2IN
TTL/CMOS driver input.
23
T1IN
TTL/CMOS driver input.
24
C1-
Negative terminal of the symmetrical charge-pump capacitor C1.
25
Vcc
+3.0V to +5.5V supply voltage.
26
V+
Regulated +5.5V output generated by the charge pump.
27
C1+
Positive terminal of the symmetrical charge-pump capacitor C1.
28
Table 1. Device Pin Description
SP3238E_101_012920
5
28 C1+
C2+ 1
GND 2
27
V+
C2- 3
26
VCC
25
C1-
V- 4
T1OUT 5
SP3238E
24 T1 IN
23 T2 IN
T2OUT
6
T3 OUT
7
22 T3 IN
R1IN
8
21 R1OUT
R 2IN
9
20
R2OUT
T4OUT 10
19 T4IN
R3 IN 11
T5 OUT 12
17
R3 OUT
T5 IN
ONLINE 13
16
R1OUT
18
15 STATUS
SHUTDOWN 14
Figure 4. SP3238E Pinout Configuration
C5
C1
C2
+
+
+
28 C1+
0.1µF
V+
27
C3
25 C11 C2+
0.1µF
TTL/CMOS
INPUTS
VCC
26
VCC
0.1µF
SP3238E
V-
+
0.1µF
4
C4
3 C224 T1IN
T1OUT
5
23 T2IN
T2OUT
6
22 T3IN
T3OUT
7
19 T4IN
T4OUT
10
17 T5IN
T5OUT
12
R1IN
8
R2IN
9
R3IN
11
+
0.1µF
RS-232
OUTPUTS
16 R1OUT
21 R1OUT
TTL/CMOS
OUTPUTS
5kΩ
20 R2OUT
5kΩ
18 R3OUT
VCC
14
13
To µP Supervisor
Circuit
RS-232
INPUTS
5kΩ
SHUTDOWN
ONLINE
15 STATUS
GND
2
Figure 5. SP3238E Typical Operating Circuit
SP3238E_101_012920
6
DESCRIPTION
In many portable or hand-held applications, an
RS-232 cable can be disconnected or a connected
peripheral can be turned off. Under these conditions, the internal charge pump and the drivers will
be shut down. Otherwise, the system automatically comes online. This feature allows design
engineers to address power saving concerns
without major design changes.
The SP3238E device meets the EIA/TIA-232
and ITU-T V.28/V.24 communication protocols
and can be implemented in battery-powered,
portable, or hand-held applications such as
notebook or palmtop computers. The SP3238E
devices feature Exar's proprietary and patented
(U.S.‑‑ 5,306,954) on-board charge pump circuitry that generates ±5.5V RS-232 voltage levels
from a single +3.0V to +5.5V power supply. The
SP3238E devices can guarantee a data rate of
250kbps fully loaded.
THEORY OF OPERATION
The SP3238E device is made up of four basic
circuit blocks:
1. Drivers
2. Receivers
3. The Exar proprietary charge pump, and
4. AUTO ON-LINE® circuitry.
The SP3238E is a 5-driver/3-receiver device,
ideal for portable or hand-held applications.
The SP3238E includes one complementary
always-active receiver that can monitor an
external device (such as a modem) in shutdown.
This aids in protecting the UART or serial
controller IC by preventing forward biasing
of the protection diodes where VCC may be
disconnected.
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to 5.0V EIA/
TIA-232 levels with an inverted sense relative
to the input logic levels. Typically, the RS-232
output voltage swing is +5.4V with no load and
+5V minimum fully loaded. The driver outputs are
protected against infinite short-circuits to ground
without degradation in reliability. These drivers
comply with the EIA-TIA-232-F and all previous
RS-232 versions.
The SP3238E device is an ideal choice for power
sensitive designs. The SP3238E device features
AUTO ON-LINE® circuitry which reduces the
power supply drain to a 1µA supply current.
The drivers can guarantee a data rate of 250kbps
fully loaded with 3kΩ in parallel with 1000pF,
ensuring compatibility with PC-to-PC communication software. All unused drivers inputs should
be connected to GND or VCC.
VCC
C5
C1
C2
+
+
+
0.1µF
VCC
28 C1+
0.1µF
0.1µF
V+
27
C3
25 C11 C2+
RxD
UART
or
Serial µC
26
SP3238E
+
0.1µF
V- 4
C4
3 C224 T1IN
T1OUT 5
CTS
23 T2IN
T2OUT 6
DSR
22 T3IN
T3OUT 7
DCD
19 T4IN
T4OUT 10
RI
17 T5IN
T5OUT 12
+
0.1µF
The slew rate of the driver output is internally
limited to a maximum of 30V/µs in order to meet
the EIA standards (EIA RS-232D 2.1.7, Paragraph
5). The transition of the loaded output from HIGH
to LOW also meets the monotonicity requirements
of the standard.
RS-232
OUTPUTS
16 R1OUT
TxD
21 R1OUT
RTS
20 R2OUT
DTR
18 R3OUT
VCC
14
13
15
R1IN 8
5kΩ
5kΩ
R2IN
9
RS-232
INPUTS
Figure 7 shows a loopback test circuit used to
test the RS-232 drivers. Figure 8 shows the test
results of the loopback circuit with all five drivers
active at 120kbps with typical RS-232 loads in
parallel with 1000pF capacitors. Figure 9 shows
the test results where one driver was active
at 250kbps and all five drivers loaded with an
RS-232 receiver in parallel with a 1000pF capacitor. A solid RS-232 data transmission rate
of 120kbps provides compatibility with many
designs in personal computer peripherals and
LAN applications.
R3IN 11
5kΩ
SHUTDOWN
ONLINE
STATUS
GND
2
RESET
µP
Supervisor
IC
VIN
Figure 6. Interface Circuitry Controlled by
Microprocessor Supervisory Circuit
SP3238E_101_012920
7
VCC
C5
C1
C2
+
+
+
0.1µF
V+
C1C2+
0.1µF
SP3238E
C4
+
0.1µF
+
0.1µF
The SP3238E includes an additional non-inverting receiver with an output R1OUT. R1OUT
is an extra output that remains active and
monitors activity while the other receiver
outputs are forced into high impedance.
This allows a Ring Indicator (RI) signal from a
peripheral to be monitored without forward
biasing the TTL/CMOS inputs of the other
devices connected to the receiver outputs.
TxOUT
RxOUT
LOGIC
OUTPUTS
C3
V-
C2TxIN
LOGIC
INPUTS
The receivers convert +5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels. Receivers are High-Z when the AUTO ON-LINE®
circuitry is enabled or when in shutdown.
VCC
C1+
0.1µF
Receivers
RxIN
1000pF
5kΩ
VCC
ONLINE
SHUTDOWN
GND
Since receiver input is usually from a transmission line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, an internal 5kΩ pulldown resistor
to ground will commit the output of the receiver
to a HIGH state.
Figure 7. Loopback Test Circuit for RS-232 Driver
Data Transmission Rates
Charge Pump
The charge pump is an Exar–patented design
(U.S. 5,306,954) and uses a unique approach
compared to older less–efficient designs.
The charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
consists of a regulated dual charge pump that
provides output voltages 5.5V regardless of
the input voltage (VCC) over the +3.0V to +5.5V
range. This is important to maintain compliant RS-232 levels regardless of power supply
fluctuations.
Figure 8. Loopback Test results at 120kbps
(All Drivers Fully Loaded)
Figure 9. Loopback Test results at 250Kbps
(All Drivers Fully Loaded)
SP3238E_101_012920
8
The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pump is enabled. If the output voltages
exceed a magnitude of 5.5V, the charge pump
is disabled. This oscillator controls the four
phases of the voltage shifting. A description of
each phase follows.
Phase 4
— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to GND,
and transfers this positive generated voltage
across C2 to C4, the VDD storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultaneous with the transfer of the voltage to C4, the
positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND, allowing the charge pump cycle to begin again.
The charge pump cycle will continue as long
as the operational conditions for the internal
oscillator are present.
Phase 1
— VSS charge storage — During this phase of the
clock cycle, the positive side of capacitors C1 and
C2 are initially charged to VCC. Cl+ is then switched
to GND and the charge in C1– is transferred to C2–.
Since C2+ is connected to VCC, the voltage potential
across capacitor C2 is now 2 times VCC.
Since both V+ and V– are separately generated
from VCC, in a no–load condition V+ and V– will
be symmetrical. Older charge pump approaches
that generate V– from V+ will show a decrease in
the magnitude of V– compared to V+ due to the
inherent inefficiencies in the design.
Phase 2
— VSS transfer — Phase two of the clock
connects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of
C2 to GND. This transfers a negative generated voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to C3,
the positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND.
Phase 3
— VDD charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C1 produces –VCC in the negative
terminal of C1, which is applied to the negative
side of capacitor C2. Since C2+ is at VCC, the voltage potential across C2 is 2 times VCC.
The clock rate for the charge pump typically
operates at 500kHz. The external capacitors
can be as low as 0.1µF with a 16V breakdown
voltage rating.
Figure 10. Charge Pump Waveform
SP3238E_101_012920
9
VCC = +5V
C4
+5V
C1
+
+
C2
–
–5V
–
+
–
VDD Storage Capacitor
–
+
VSS Storage Capacitor
C3
–5V
Figure 11. Charge Pump — Phase 1
VCC = +5V
C4
+
C1
C2
–
+
–
+
–
–
+
VDD Storage Capacitor
VSS Storage Capacitor
C3
-5.5V
Figure 12. Charge Pump — Phase 2
VCC = +5V
C4
+5V
C1
+
–
C2
–5V
+
–
+
–
VDD Storage Capacitor
–
+
VSS Storage Capacitor
C3
–5V
Figure 13. Charge Pump — Phase 3
VCC = +5V
+5.5V
C1
+
–
C2
C4
+
–
+
–
–
+
VDD Storage Capacitor
VSS Storage Capacitor
C3
Figure 14. Charge Pump — Phase 4
SP3238E_101_012920
10
VCC
C5
C1
+
+
28
0.1µF
C2
0.1µF
C1+
25 C11
+
26
VCC
0.1µF
3
C2+
SP3238E
V+
27
C3
V-
C2-
C4
R1IN
8
R2IN
9
R3IN
11
24 T1IN
T1OUT
5
23 T2IN
T2OUT
6
22 T3IN
T3OUT
7
19 T4IN
T4OUT
10
17 T5IN
T5OUT
12
5kΩ
20 R2OUT
5kΩ
18 R3OUT
0.1µF
4
16 R1OUT
21 R1OUT
+
+
0.1µF
5kΩ
VCC
14
13
To µP Supervisor
Circuit
DB-9
Connector
SHUTDOWN
ONLINE
15 STATUS
6
7
8
9
GND
2
DB-9 Connector Pins:
1. Received Line Signal Detector
2. Received Data
3. Transmitted Data
4. Data Terminal Ready
5. Signal Ground (Common)
6.
7.
8.
9.
1
2
3
4
5
DCE Ready
Request to Send
Clear to Send
Ring Indicator
Figure 15. Circuit for the connectivity of the SP3238E with a DB-9 connector
SP3238E_101_012920
11
AUTO ONLINE CIRCUITRY
The SP3238E device has a patent pending
AUTO ON-LINE® circuitry on board that saves
power in applications such as laptop computers,
palmtop (PDA) computers and other portable
systems.
the RS-232 cable is disconnected or the RS-232
drivers of the connected peripheral are turned
off.
The AUTO ON-LINE® mode can be disabled by
the SHUTDOWN pin. If this pin is a logic LOW,
the AUTO ON-LINE® function will not operate
regardless of the logic state of the ONLINE pin.
Table 3 summarizes the logic of the AUTO ONLINE® operating modes.
The SP3238E device incorporates an AUTO
ON-LINE® circuit that automatically enables itself
when the external transmitters are enabled and
the cable is connected. Conversely, the AUTO
ON-LINE® circuit also disables most of the internal circuitry when the device is not being used
and goes into a standby mode where the device
typically draws 1µA. This function is externally
controlled by the ONLINE pin. When this pin is
tied to a logic LOW, the AUTO ON-LINE® function is active. Once active, the device is enabled
until there is no activity on the receiver inputs.
The receiver input typically sees at least +3V,
which are generated from the transmitters at
the other end of the cable with a +5V minimum.
When the external transmitters are disabled or
the cable is disconnected, the receiver inputs will
be pulled down by their internal 5kΩ resistors to
ground. When this occurs over a period of time,
the internal transmitters will be disabled and the
device goes into a shutdown or standby mode.
When ONLINE is HIGH, the AUTO ON-LINE®
mode is disabled.
The STATUS pin outputs a logic LOW signal if
the device is shutdown. This pin goes to a logic
HIGH when the external transmitters are enabled
and the cable is connected.
When the SP3238E device is shutdown, the
charge pumps are turned off. V+ charge pump
output decays to VCC, the V- output decays to
GND. The decay time will depend on the size
of capacitors used for the charge pump. Once
in shutdown, the time required to exit the shut
down state and have valid V+ and V- levels is
typically 200ms.
For easy programming, the STATUS can
be used to indicate DTR or a Ring Indicator signal. Tying ONLINE and SHUTDOWN
together will bypass the AUTO ON-LINE® circuitry so this connection acts like a shutdown
input pin
The AUTO ON-LINE® circuit has two stages:
1) Inactive Detection
2) Accumulated Delay
The first stage, shown in Figure 17, detects an
inactive input. A logic HIGH is asserted on
RXINACT if the cable is disconnected or the
external transmitters are disabled. Otherwise,
RXINACT will be at a logic LOW. This circuit is
duplicated for each of the other receivers.
The second stage of the AUTO ON-LINE®
circuitry, shown in Figure 18, processes all the
receiver's RXINACT signals with an accumulated
delay that disables the device to a 1µA supply
current. The STATUS pin goes to a logic LOW
when the cable is disconnected, the external
transmitters are disabled, or the SHUTDOWN
pin is invoked. The typical accumulated delay is
around 20µs. When the SP3238E drivers or internal charge pump are disabled, the supply current
is reduced to 1µA. This can commonly occur in
handheld or portable applications where
SP3238E_101_012920
12
S
H
U
T
RECEIVER +2.7V
0V
RS-232 INPUT
VOLTAGES -2.7V
D
O
W
N
VCC
STATUS
0V
tSTSL
tSTSH
tONLINE
DRIVER
RS-232 OUTPUT
VOLTAGES
+5V
0V
-5V
Figure 16. AUTO ON-LINE® Timing Waveforms
Inactive Detection Block
RS-232
Receiver Block
RXIN
RXINACT
RXOUT
Figure 17. Stage I of AUTO ON-LINE® Circuitry
Delay
Stage
Delay
Stage
Delay
Stage
Delay
Stage
Delay
Stage
STATUS
R1INACT
R2INACT
R4INACT
R3INACT
R5INACT
SHUTDOWN
Figure 18. Stage II of AUTO ON-LINE® Circuitry
SP3238E_101_012920
13
SHUTDOWN
INPUT
ONL INE
INPUT
RS-232 SIGNA L A T
RECEIVER INPUT
STA TUS
OUTPUT
TXOUT
RXOUT
R1OUT
TRA NSCEIVER
STA TUS
HIGH
-
YES
HIGH
Active
Active
Active
Normal
Operation
HIGH
HIGH
NO
LOW
Active
Active
Active
Normal
Operation
HIGH
LO W
NO (>100µs)
LO W
High-Z
Active
Active
Shutdown
(A u t o -On l i n e)
LOW
-
YES
HIGH
High-Z
High-Z
Active
Shutdown
LOW
-
NO
LOW
High-Z
High-Z
Active
Shutdown
Table 2. AUTO ON-LINE® Logic
SP3238E_101_012920
14
ESD TOLERANCE
most of the ESD current when the ESD source
is applied to the connector pins. The test circuit
for IEC61000-4-2 is shown on Figure 20. There
are two methods within IEC61000-4-2, the Air
Discharge method and the Contact Discharge
method.
The SP3238E device incorporates ruggedized
ESD cells on all driver output and receiver input
pins. The ESD structure is improved over our
previous family for more rugged applications
and environments sensitive to electro-static discharges and associated transients. The improved
ESD tolerance is at least +15kV without damage
nor latch-up.
With the Air Discharge Method, an ESD voltage
is applied to the equipment under test (EUT)
through air. This simulates an electrically charged
person ready to connect a cable onto the rear of
the system only to find an unpleasant zap just
before the person touches the back panel. The
high energy potential on the person discharges
through an arcing path to the rear panel of the
system before he or she even touches the system. This energy, whether discharged directly
or through air, is predominantly a function of
the discharge current rather than the discharge
voltage. Variables with an air discharge such as
approach speed of the object carrying the ESD
potential to the system and humidity will tend to
change the discharge current. For example, the
rise time of the discharge current varies with the
approach speed.
There are different methods of ESD testing applied:
a) MIL-STD-883, Method 3015.7
b) IEC61000-4-2 Air-Discharge
c) IEC61000-4-2 Direct Contact
The Human Body Model has been the generally
accepted ESD testing method for semi-conductors. This method is also specified in
MIL-STD-883, Method 3015.7 for ESD testing.
The premise of this ESD test is to simulate the
human body’s potential to store electro-static
energy and discharge it to an integrated circuit.
The simulation is performed by using a test
model as shown in Figure 19. This method
will test the IC’s capability to withstand an ESD
transient during normal handling such as in
manufacturing areas where the IC's tend to be
handled frequently.
The Contact Discharge Method applies the ESD
current directly to the EUT. This method was
devised to reduce the unpredictability of the ESD
arc. The discharge current rise time is constant
since the energy is directly transferred without the
air-gap arc. In situations such as hand held systems, the ESD charge can be directly discharged
to the equipment from a person already holding
the equipment. The current is transferred on to
the keypad or the serial port of the equipment
directly and then travels through the PCB and
finally to the IC.
The IEC-61000-4-2, formerly IEC801-2, is generally used for testing ESD on equipment and
systems. For system manufacturers, they must
guarantee a certain amount of ESD protection
since the system itself is exposed to the outside
environment and human presence. The premise
with IEC61000-4-2 is that the system is required
to withstand an amount of static electricity when
ESD is applied to points and surfaces of the
equipment that are accessible to personnel during normal usage. The transceiver IC receives
RS
RC
SW1
DC Power
Source
SW2
CS
Device
Under
Test
Figure 19. ESD Test Circuit for Human Body Model
SP3238E_101_012920
15
Contact-Discharge Model
RS
RC
RV
SW1
SW2
Device
Under
Test
CS
DC Power
Source
R S and RV add up to 330Ω for IEC61000-4-2.
Figure 20. ESD Test Circuit for IEC61000-4-2
I→
The circuit models in Figures 19 and 20 represent
the typical ESD testing circuit used for all three
methods. The CS is initially charged with the DC
power supply when the first switch (SW1) is on.
Now that the capacitor is charged, the second
switch (SW2) is on while SW1 switches off. The
voltage stored in the capacitor is then applied
through RS, the current limiting resistor, onto the
device under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under test
receives a duration of voltage.
30A
15A
0A
For the Human Body Model, the current limiting
resistor (RS) and the source capacitor (CS) are
1.5kΩ an 100pF, respectively. For IEC-61000-4-2,
the current limiting resistor (RS) and the source capacitor (CS) are 330Ω an 150pF, respectively.
t = 0ns
t→
t = 30ns
Figure 21. ESD Test Waveform for IEC61000-4-2
The higher CS value and lower RS value in the
IEC61000-4-2 model are more stringent than the
Human Body Model. The larger storage capacitor injects a higher voltage to the test point when
SW2 is switched on. The lower current limiting
resistor increases the current charge onto the
test point.
DEVICE PIN
TESTED
Driver Outputs
Receiver Inputs
HUMAN BODY
MODEL
Air Discharge
+15kV
+15kV
+15kV
+15kV
IEC61000-4-2
Direct Contact
Level
+8kV
+8kV
4
4
Table 3. Transceiver ESD Tolerance Levels
SP3238E_101_012920
16
▲
▲
PACKAGE: 28 PIN SSOP
e
SP3238E_101_012920
17
PACKAGE: 28 PIN TSSOP
SP3238E_101_012920
18
ORDERING INFORMATION(1)
Part Number
Temp. Range
Package
Packaging Method Lead-Free(2)
SP3238ECA-L/TR
0°C to +70°C
28 Pin SSOP
Tape and Reel
Yes
SP3238EEA-L/TR
-40°C to +85°C
28 Pin SSOP
Tape and Reel
Yes
SP3238EEY-L
-40°C to +85°C
28 Pin TSSOP
Tube
Yes
SP3238EEY-L/TR
-40°C to +85°C
28 Pin TSSOP
Tape and Reel
Yes
NOTES:
1. Refer to www.maxlinear.com/SP3238E for most up to date Ordering Information.
2. Visit www.maxlinear.com for additional information on Environmental Rating.
SP3238E_101_012920
19
REVISION HISTORY
DATE
REVISION DESCRIPTION
03/04/05
--
Legacy Sipex Datasheet
02/01/11
1.0.0
Convert to Exar Format, Update ordering information and
change ESD specification to IEC61000-4-2
01/29/20
1.0.1
Update to MaxLinear logo. Update ordering information.
MaxLinear, Inc.
5966 La Place Court, Suite 100
Carlsbad, CA 92008
760.692.0711 p.
760.444.8598 f.
www.maxlinear.com
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Maxlinear, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of
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