SP3243E
Data Sheet
3 Driver / 5 Receiver Intelligent +3.0V to +5.5V
RS-232 Transceivers
General Description
Features
The SP3243E products (SP3243E, SP3243EB, SP3243EH,
and SP3243EU) are 3 driver / 5 receiver RS-232 transceiver
solutions intended for portable or hand-held applications
such as notebook and palmtop computers. The SP3243E
includes one complementary receiver that remains alert to
monitor an external device’s Ring Indicate signal while the
device is shutdown. The SP3243E and EB devices feature
slew-rate limited outputs for reduced crosstalk and EMI. The
“EU” and “EH” series are optimized for high speed with data
rates up to 1Mbps, easily meeting the demands of high speed
RS-232 applications. The SP3243E series uses an internal
high-efficiency charge-pump power supply that requires only
0.1µF capacitors in 3.3V operation. This charge pump and
MaxLinear’s driver architecture allow the SP3243E series to
deliver compliant RS-232 performance from a single power
supply ranging from +3.0V to +5.5V. The AUTO ON-LINE
feature allows the device to automatically “wake-up” during a
shutdown state when an RS-232 cable is connected and a
connected peripheral is turned on. Otherwise, the device
automatically shuts itself down, drawing less than 1µA.
■
■
■
■
■
■
■
■
Meets true EIA / TIA-232-F standards from a +3.0V to
+5.5V power supply
Interoperable with EIA / TIA-232 and adheres to EIA /
TIA-562 down to a +2.7V power source
AUTO ON-LINE® circuitry automatically wakes up from a
1µA shutdown
Regulated Charge Pump yields stable RS-232 outputs
regardless of VCC variations
Enhanced ESD specifications:
±15kV Human Body Model
±15kV IEC61000-4-2 Air Discharge
±8kV IEC61000-4-2 Contact Discharge
250kbps minimum transmission rate (EB)
1000kbps minimum transmission rate (EU)
Ideal for high speed RS-232 applications
Ordering Information - page 23
Selection Table
Table 1: SP3243E Selection Table
Device
Power
Supplies
SP3243E
RS-232
Receivers
External
Components
Auto On-Line
Circuitry
TTL
# of
3-State Pins
Data Rate
(kbps)
ESD
Rating
+3.0V to +5.5V 3
5
4 capacitors
Yes
Yes
28
120
15kV
SP3243EB
+3.0V to +5.5V 3
5
4 capacitors
Yes
Yes
28
250
15kV
SP3243EH
+3.0V to +5.5V 3
5
4 capacitors
Yes
Yes
28
460
15kV
SP3243EU
+3.0V to +5.5V 3
5
4 capacitors
Yes
Yes
28
1000
15kV
• www.maxlinear.com• Rev 1.0.3
RS-232
Drivers
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Revision History
Revision History
Revision
Release Date
Change Description
--
02/05/06
Legacy Sipex Datasheet
1.0.0
7/23/09
Convert to Exar Format, Update ordering information and change revision to 1.0.0.
1.0.1
11/10/09
Add missing (EH) model identification for Driver output Skew and Transition-Region Slew Rate
specification and change revision to 1.0.1.
1.0.2
06/06/11
Remove obsolete devices per PDN 110510-01 and change ESD rating to IEC61000-4-2.
1.0.3
5/24/19
Convert to MaxLinear format. Update Ordering Information and remove obsolete devices.
Move pinouts to Pin Information section. Add ESD rating table to Absolute Maximum section.
Remove obsolete WSOIC28 package information.
5/24/19
Rev 1.0.3
ii
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Table of Contents
Table of Contents
General Description............................................................................................................................................. i
Features............................................................................................................................................................... i
Selection Table ................................................................................................................................................... i
Specifications ..................................................................................................................................................... 1
Absolute Maximum Ratings...........................................................................................................................................1
ESD Ratings ..................................................................................................................................................................1
Electrical Characteristics ...............................................................................................................................................2
Typical Performance Characteristics................................................................................................................ 4
Pin Information ................................................................................................................................................... 5
Pin Configuration ...........................................................................................................................................................5
Pin Descriptions ............................................................................................................................................................6
Typical Operating Circuit ................................................................................................................................... 7
Description .......................................................................................................................................................... 8
Theory of Operation .......................................................................................................................................... 9
Drivers .......................................................................................................................................................................... 9
Receivers ................................................................................................................................................................... 10
Charge Pump ............................................................................................................................................................. 10
Phase 1: VSS Charge Storage............................................................................................................................10
Phase 2: VSS Transfer........................................................................................................................................10
Phase 3: VDD Charge Storage ...........................................................................................................................11
Phase 4: VDD Transfer .......................................................................................................................................11
AUTO ONLINE Circuitry ............................................................................................................................................. 11
ESD Tolerance ............................................................................................................................................................15
Mechanical Dimensions ................................................................................................................................... 17
QFN32 .........................................................................................................................................................................17
Recommended Land Pattern and Stencil....................................................................................................... 18
QFN32 .........................................................................................................................................................................18
Mechanical Dimensions ................................................................................................................................... 19
SSOP28 ......................................................................................................................................................................19
Recommended Land Pattern and Stencil....................................................................................................... 20
SSOP28 ......................................................................................................................................................................20
Mechanical Dimensions ................................................................................................................................... 21
TSSOP28 ....................................................................................................................................................................21
5/24/19
Rev 1.0.3
iii
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Table of Contents
Recommended Land Pattern and Stencil....................................................................................................... 22
TSSOP28 ....................................................................................................................................................................22
Ordering Information........................................................................................................................................ 23
5/24/19
Rev 1.0.3
iv
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
List of Figures
List of Figures
Figure 1: Transmitter Skew vs. Load Capacitance ............................................................................................... 4
Figure 2: Transmitter Output Voltage vs. Supply Voltage for the SP3243EU....................................................... 4
Figure 3: Transmitter Output Voltage vs. Load Capacitance for the SP3243EU.................................................. 4
Figure 4: Supply Current vs. Load Capacitance for the SP3243EU ..................................................................... 4
Figure 5: Supply Current vs. Supply Voltage for the SP3243EU.......................................................................... 4
Figure 6: Transmitter Output Voltage vs. Load Capacitance for the SP3243EB .................................................. 4
Figure 7: Slew Rate vs. Load Capacitance........................................................................................................... 5
Figure 8: SP3243E Pinout (Top View) SSOP / TSSOP........................................................................................ 5
Figure 9: SP3243E Pinout (Top View) QFN32 ..................................................................................................... 5
Figure 10: SP3243E Typical Operating Circuit ..................................................................................................... 7
Figure 11: Interface Circuitry Controlled by Microprocessor Supervisory Circuit ................................................. 8
Figure 12: Loopback Test Circuit for RS-232 Driver Data Transmission Rates ................................................... 9
Figure 13: Loopback Test Results at 1Mbps ........................................................................................................ 9
Figure 14: Loopback Test Results at 250kbps ..................................................................................................... 9
Figure 15: Charge Pump — Phase 1.................................................................................................................. 10
Figure 16: Charge Pump — Phase 2.................................................................................................................. 10
Figure 17: Charge Pump — Phase 3.................................................................................................................. 11
Figure 18: Charge Pump — Phase 4.................................................................................................................. 11
Figure 19: AUTO ON-LINE Timing Waveforms .................................................................................................. 12
Figure 20: SP3243E Driver Output Voltages vs. Load Current per Transmitter ................................................. 12
Figure 21: Mouse Drive Application.................................................................................................................... 13
Figure 22: Attaching SP3243E to a DB-9 Connector.......................................................................................... 13
Figure 23: Stage I of AUTO ON-LINE Circuitry .................................................................................................. 14
Figure 24: Stage II of AUTO ON-LINE Circuitry ................................................................................................. 14
Figure 25: ESD Test Circuit for Human Body Model .......................................................................................... 16
Figure 26: ESD Test Circuit for IEC61000-4-2 ................................................................................................... 16
Figure 27: ESD Test Waveform for IEC61000-4-2 ............................................................................................. 16
Figure 28: Mechanical Dimensions, QFN32 ....................................................................................................... 17
Figure 29: Recommended Land Pattern and Stencil, QFN32 ............................................................................ 18
Figure 30: Mechanical Dimensions, SSOP28..................................................................................................... 19
Figure 31: Recommended Land Pattern and Stencil, SSOP28.......................................................................... 20
Figure 32: Mechanical Dimensions, TSSOP28 .................................................................................................. 21
Figure 33: Recommended Land Pattern and Stencil, TSSOP28........................................................................ 22
Figure 34: Part Nomenclature............................................................................................................................. 24
5/24/19
Rev 1.0.3
v
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
List of Tables
List of Tables
Table 1: SP3243E Selection Table........................................................................................................................ i
Table 2: Absolute Maximum Ratings .................................................................................................................... 1
Table 3: ESD Ratings ........................................................................................................................................... 1
Table 4: Electrical Characteristics ........................................................................................................................ 2
Table 5: Device Pin Descriptions.......................................................................................................................... 6
Table 6: SP3243E SHUTDOWN Truth Table ..................................................................................................... 10
Table 7: Minimum Recommended Charge Pump Capacitor Value .................................................................... 11
Table 8: AUTO ON-LINE Logic........................................................................................................................... 14
Table 9: Transceiver ESD Tolerance Levels ...................................................................................................... 16
Table 10: Ordering Information........................................................................................................................... 23
5/24/19
Rev 1.0.3
vi
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Specifications
Specifications
Absolute Maximum Ratings
Important: These are stress ratings only and functional operation of the device at these ratings or any other above those
indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum ratings
conditions for extended periods of time may affect reliability and cause permanent damage to the device.
Table 2: Absolute Maximum Ratings
Parameter
Minimum
Maximum
Units
VCC
-0.3
6.0
V
V+(1)
-0.3
7.0
V
V-(1)
+0.3
-7.0
V
V+ + |V-|(1)
+13
V
ICC (DC VCC or GND current)
±100
mA
VCC + 6.0
V
±15
V
±13.2
V
VCC + 0.3
V
Input Voltages
TxIN, ONLINE, SHUTDOWN
-0.3
RxIN
Output Voltages
TxOUT
-0.3
RxOUT, STATUS
Short-Circuit Duration
TxOUT
Continuous
Temperature
Storage temperature
-65
150
°C
28-pin SSOP (derate 11.2mW/°C above +70°C)
900
mW
28-pin TSSOP (derate 13.2mW/°C above +70°C)
1059
mW
32-pin QFN (derate 29.4mW/°C above +70°C)
2352
mW
Value
Units
Power Dissipation per Package
1. V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
ESD Ratings
Table 3: ESD Ratings
Parameter
Level
±15
kV
IEC61000-4-2 Air Discharge (driver outputs and receiver inputs)
HBM — Human Body Model (driver outputs and receiver inputs)
4
±15
kV
IEC61000-4-2 Contact Discharge (driver outputs and receiver inputs)
4
±8
kV
5/24/19
Rev 1.0.3
1
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Electrical Characteristics
Electrical Characteristics
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX,
C1 - C4 = 0.1µF. Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
Table 4:
Electrical Characteristics
Parameter
Test Condition
Minimum Typical
Maximum Units
DC Characteristics
Supply current, AUTO ON-LINE
All RxIN open, ONLINE = GND,
SHUTDOWN = VCC, VCC = 3.3V, TAMB = 25oC,
TxIN = GND or VCC
1.0
10
µA
Supply current, shutdown
SHUTDOWN = GND, VCC = 3.3V, TAMB = 25oC,
TxIN = VCC or GND
1.0
10
µA
Supply current, AUTO ON-LINE
disabled
ONLINE = SHUTDOWN = Vcc, no load,
VCC = 3.3V, TAMB = +25oC, TxIN = GND or VCC
0.3
1.0
mA
0.8
V
Logic Inputs and Receiver Outputs
Input logic threshold
Low
High
VCC = 3.3V or 5.0V, TxIN, ONLINE,
SHUTDOWN
2.4
V
Input leakage current
TxIN, ONLINE, SHUTDOWN, TAMB = +25°C,
VIN = 0V to VCC
±0.01
±1.0
µA
Output leakage current
Receivers disabled, VOUT = 0V to VCC
±0.05
±10
µA
Output voltage Low
IOUT = 1.6mA
0.4
V
Output voltage High
IOUT = -1.0mA
VCC - 0.6
VCC - 0.1
V
Output voltage swing
All driver outputs loaded with 3kΩ to GND,
TAMB = +25oC
±5.0
±5.4
V
Output resistance
VCC = V+ = V- = 0V, VOUT = +2V
300
Output short-circuit current
VOUT = 0V
Output leakage current
VCC = 0V or 3.0V to 5.5V, VOUT = +12V,
drivers disabled
Driver Outputs
Ω
±35
±60
mA
±25
µA
15
V
Receiver Inputs
Input voltage range
Input threshold Low
Input threshold High
-15
VCC = 3.3V
0.6
1.2
V
VCC = 5.0V
0.8
1.5
V
VCC = 3.3V
1.5
2.4
V
VCC = 5.0V
1.8
2.4
V
7
kΩ
Input hysteresis
0.3
Input resistance
5/24/19
3
Rev 1.0.3
5
V
2
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Electrical Characteristics
Table 4: (Continued) Electrical Characteristics
Parameter
Test Condition
Minimum Typical
Maximum Units
AUTO ON-LINE Circuitry Characteristics (ONLINE = GND, SHUTDOWN = VCC) 25°C
STATUS output voltage Low
IOUT = 1.6mA
STATUS output voltage High
IOUT = -1.0mA
Receiver threshold to drivers enabled
(tONLINE)
Figure 19
350
Receiver positive or negative threshold
to STATUS High (tSTSH)
Figure 19
0.2
Receiver positive or negative threshold
to STATUS Low (tSTSL)
Figure 19
30
0.4
VCC - 0.6
V
V
µs
µs
µs
Timing Characteristics
Maximum data rate
Receiver propagation delay
U
RL = 3kΩ, CL = 250pF, one driver active
1000
kbps
H
RL = 3kΩ, CL = 1000pF, one driver active
460
kbps
B
RL = 3kΩ, CL = 1000pF, one driver active
250
kbps
-
RL = 3kΩ, CL = 1000pF, one driver active
120
kbps
tPHL
tPLH
Receiver input to receiver output, CL = 150pF
0.15
µs
0.15
µs
Receiver output enable time
Normal operation
200
ns
Receiver output disable time
Normal operation
200
ns
Driver skew
Receiver skew
Transition-region slew rate
5/24/19
E, EB
EH, EU
| tPHL - tPLH |
| tPHL - tPLH |
EH, EU VCC = 3.3V, RL = 3kΩ, TAMB = 25°C,
measurements taken from -3.0V to +3.0V or
E, EB
+3.0V to -3.0V
Rev 1.0.3
6
100
500
ns
50
100
ns
50
ns
90
V/µs
30
V/µs
3
SP3243E Data Sheet
Typical Performance Characteristics
Typical Performance Characteristics
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all drivers
loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
200
Transmitter Output Voltage (V)
Skew (ns)
150
100
T1 at 500Kbps
T2 at 31.2Kbps
All TX loaded 3K // CLoad
50
6
4
2
-2
-4
0
-6
0
250
500
1000
Load Capacitance (pF)
1500
2.7
2000
Figure 1: Transmitter Skew vs. Load Capacitance
3
3.5
4
Supply Voltage (V)
4.5
5
Figure 2: Transmitter Output Voltage vs.
Supply Voltage for the SP3243EU
40
6
2Mbps
4
35
1.5Mbps
1Mbps
Supply Current (mA)
Transmitter Output Voltage (V)
1 D rive r a t 1Mbps
O the r D rive rs a t 62.5K bps
A ll Drivers Loa de d w ith 3K // 250pF
0
2
1 TX at full data rate
2 TX’ s at1/16 data rate
0
-2
1Mbps
-4
1.5Mbps
2Mbps
30
120K bps
250K bps
25
20K bps
20
15
1 T ra ns mi tte r a t full D a ta R a te
10
2 T ra ns mi tte rs a t 1 5.5 K bps
5
A ll Tra ns mi tte rs loa de s 3K + Loa d C a p
0
-6
0
250
500
1000
Load Capacitance (pF)
1500
0
2000
3000
4000
5000
Figure 4: Supply Current vs.
Load Capacitance for the SP3243EU
6
Transmitter Output Voltage (V)
25
20
Supply Current (mA)
2000
Load Capacitance (pF)
Figure 3: Transmitter Output Voltage vs.
Load Capacitance for the SP3243EU
15
10
1 T ransmitter at 250Kbps
2 T ransmitters at 15.6Kbps
All drivers loaded with 3K // 1000pF
5
0
2.7
3
3.5
4
4.5
4
TxOUT +
2
0
-2
TxOUT -
-4
-6
5
Supply Voltage (V DC )
0
1000
2000
3000
4000
5000
Load Capacitance (pF)
Figure 6: Transmitter Output Voltage vs.
Load Capacitance for the SP3243EB
Figure 5: Supply Current vs. Supply Voltage
for the SP3243EU
5/24/19
1000
Rev 1.0.3
4
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Pin Information
25
Slew Rate (V/μs)
20
- Slew
+ Slew
15
10
1 Transmitter at 250Kbps
2 Transmitter at 15.6Kbps
All drivers loaded 3K + Load Cap
5
0
0
500
1000
2000
3000
4000
5000
Load Capacitance (pF)
Figure 7: Slew Rate vs. Load Capacitance
Pin Information
24
C1-
R3IN
6
R5IN 8
22 SHUTDOWN
21 STATUS
T1OUT 9
20
R2OUT
T2OUT 10
19
R1OUT
T3OUT 11
18
R2OUT
T3IN 12
17
R3OUT
T2IN 13
16
R4OUT
T1IN 14
15
R5OUT
Figure 8: SP3243E Pinout (Top View) SSOP / TSSOP
5/24/19
24
2
23
3
22
4
21
SP3243E
5
20
6
19
7
18
8
17
9
7
23 ONLINE
1
NC
GND
C1ONLINE
SHUTDOWN
STATUS
R 2 OUT
R1 OUT
T3 OUT
T3 IN
T2 IN
T1 IN
R5OUT
R4OUT
R3OUT
R 2OUT
R4IN
SP3243E
NC
R1 IN
R2 IN
R3 IN
R4 IN
R5 IN
T1OUT
T2OUT
25
5
16
R2IN
26
GND
27
25
15
4
14
R1IN
28
VCC
13
26
29
3
30
V-
12
V+
11
27
31
C2- 2
10
28 C1+
32
C2+ 1
VC2NC
C2+
C1+
NC
V+
VCC
Pin Configuration
Rev 1.0.3
Figure 9: SP3243E Pinout (Top View) QFN32
5
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Pin Descriptions
Pin Descriptions
Table 5: Device Pin Descriptions
Pin Number
Name
Function
SP3243E SSOP SP3243EUCR QFN
and TSSOP
C1+
Positive terminal of the voltage doubler charge-pump capacitor
28
28
V+
Regulated +5.5V output generated by the charge pump
27
26
C1-
Negative terminal of the voltage doubler charge-pump capacitor
24
22
C2+
Positive terminal of the inverting charge-pump capacitor
1
29
C2-
Negative terminal of the inverting charge-pump capacitor
2
31
V-
Regulated -5.5V output generated by the charge pump
3
32
R1IN
RS-232 receiver input
4
2
R2IN
RS-232 receiver input
5
3
R3IN
RS-232 receiver input
6
4
R4IN
RS-232 receiver input
7
5
R5IN
RS-232 receiver input
8
6
R1OUT
TTL / CMOS receiver output
19
17
R2OUT
TTL / CMOS receiver output
18
16
R2OUT
Non-inverting receiver-2 output, active in shutdown
20
18
R3OUT
TTL / CMOS receiver output
17
15
R4OUT
TTL / CMOS receiver output
16
14
R5OUT
TTL / CMOS receiver output
15
13
STATUS
TTL / CMOS output indicating online and shutdown status
21
19
T1IN
TTL / CMOS driver input
14
12
T2IN
TTL / CMOS driver input
13
11
T3IN
TTL / CMOS driver input
12
10
ONLINE
Apply logic HIGH to override AUTO ON-LINE circuitry keeping drivers active 23
(SHUTDOWN must also be logic HIGH, refer to Table 6)
21
T1OUT
RS-232 driver output
9
7
T2OUT
RS-232 driver output
10
8
T3OUT
RS-232 driver output
11
9
GND
Ground
25
23
VCC
+3.0V to +5.5V supply voltage
26
25
SHUTDOWN
Apply logic LOW to SHUTDOWN driver and charge pump.
This overrides all AUTO ON-LINE circuitry and ONLINE (Refer to Table 6)
22
20
NC
No connection
-
1, 24, 27, 30
5/24/19
Rev 1.0.3
6
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Typical Operating Circuit
Typical Operating Circuit
VCC
C5
C1
+
+
26
VCC
0.1μ F
28 C1+
V+
27
0.1μ F
C3
+
0.1μ F
24 C11 C2+
C2
+
0.1μ F
TTL/CMOS
INPUTS
SP3243E
V-
3
C4
2 C214 T1IN
T1OUT
13 T2IN
T2OUT 10
12 T3IN
T3OUT 11
+
0.1μ F
9
RS-232
OUTPUTS
20 R2OUT
19 R1OUT
R1IN
4
R2IN
5
R3IN
6
R4IN
7
R5IN
8
5kΩ
18 R2OUT
5kΩ
TTL/CMOS
OUTPUTS
17 R3OUT
5kΩ
16 R4OUT
RS-232
INPUTS
5kΩ
15
VCC
22
23
To μ P Supervisor
Circuit
R5OUT
5kΩ
SHUTDOWN
ONLINE
21 STATUS
GND
25
Figure 10: SP3243E Typical Operating Circuit
5/24/19
Rev 1.0.3
7
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Description
Description
The SP3243E transceivers meet the EIA / TIA-232 and
ITU-T V.28 / V.24 communication protocols and can be
implemented in battery-powered, portable or hand-held
applications such as notebook or palmtop computers. The
SP3243E devices feature MaxLinear’s proprietary and
patented (U.S. 5,306,954) on-board charge pump circuitry
that generates ±5.5V RS-232 voltage levels from a single
+3.0V to +5.5V power supply. The SP3243EU device can
operate at a data rate of 1000kbps fully loaded.
controller IC by preventing forward biasing of the protection
diodes where VCC may be disconnected.
The SP3243E series is an ideal choice for power sensitive
designs. The SP3243E devices feature AUTO ON-LINE
circuitry which reduces the power supply drain to a 1µA
supply current.
The SP3243E is a 3-driver / 5-receiver device, ideal for
portable or hand-held applications. The SP3243E includes
one complementary always-active receiver that can
monitor an external device (such as a modem) in
shutdown. This aids in protecting the UART or serial
In many portable or hand-held applications, an RS-232
cable can be disconnected or a connected peripheral can
be turned off. Under these conditions, the internal charge
pump and the drivers will be shut down. Otherwise, the
system automatically comes online. This feature allows
design engineers to address power saving concerns
without major design changes.
VCC
+
C5
+
C1
26
VCC
0.1 μF
28 C1+
V+
27
0.1 μF
C3
+
0.1 μF
24 C11 C2+
C2
+
0.1 μF
SP3243E
V-
3
C4
2 C2-
TxD
14 T1 IN
T1 OUT
RTS
13 T2 IN
T2 OUT 10
DTR
12 T3 IN
T3 OUT 11
+
0.1 μF
9
RS-232
OUTPUTS
20 R2 OUT
UART
or
Serial μC
RxD
19 R1 OUT
CTS
18 R2 OUT
R 1 IN 4
5KΩ
R 2 IN
5
R 3 IN
6
R 4 IN
7
R 5 IN
8
5KΩ
DSR
17 R3 OUT
5KΩ
DCD
16 R4OUT
RS-232
INPUTS
5KΩ
15 R5OUT
RI
VCC
22
23
21
5KΩ
SHUTDOWN
ONLINE
STATUS
GND
25
RESET
μP
Supervisor
IC
VIN
Figure 11: Interface Circuitry Controlled by Microprocessor Supervisory Circuit
5/24/19
Rev 1.0.3
8
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Theory of Operation
+3V to +5V
The SP3243E series is made up of four basic circuit blocks:
C5
1. Drivers
2. Receivers
C1
+
0.1 μF
VCC
C1+
+
V+
0.1 μF
3. The MaxLinear proprietary charge pump
C3
+
0.1 μF
C1C2+
4. AUTO ON-LINE circuitry
C2
+
SP3243
VC4
0.1 μF
C2-
Drivers
The drivers are inverting level transmitters that convert TTL
or CMOS logic levels to 5.0V EIA / TIA-232 levels with an
inverted sense relative to the input logic levels. Typically,
the RS-232 output voltage swing is ±5.4V with no load and
±5V minimum fully loaded. The driver outputs are
protected against infinite short-circuits to ground without
degradation in reliability. These drivers comply with the
EIA-TIA-232-F and all previous RS-232 versions. Unused
drivers inputs should be connected to GND or VCC.
TTL/CMOS
INPUTS
Figure 12 shows a loopback test circuit used to test the
RS-232 Drivers. Figure 13 shows the test results where
one driver was active at 1Mbps and all three drivers were
loaded with an RS-232 receiver in parallel with a 250pF
capacitor. Figure 14 shows the test results of the loopback
circuit with all drivers active at 250kbps with typical
RS-232 loads in parallel with 1000pF capacitors. A superior
RS-232 data transmission rate of 1Mbps makes the
SP3243EU an ideal match for high speed LAN and
personal computer peripheral applications.
T1IN
T1OUT
TXIN
TXOUT
+
0.1 μF
R1IN
R1OUT
5KΩ
TTL/CMOS
OUTPUTS
RXIN
RXOUT
5KΩ
The drivers have a minimum data rate of 250kbps (EB) or
1000kbps (EU) fully loaded.
1000pF
VCC
1000pF
SHUTDOWN
ONLINE
To μP Supervisor
Circuit
STATUS
GND
18
Figure 12: Loopback Test Circuit for RS-232 Driver
Data Transmission Rates
Figure 14: Loopback Test Results at 250kbps
Figure 13: Loopback Test Results at 1Mbps
5/24/19
Drivers
Rev 1.0.3
9
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Receivers
Receivers
pump is disabled. This oscillator controls the four phases
of the voltage shifting. A description of each phase follows.
The receivers convert ±5.0V EIA / TIA-232 levels to TTL or
CMOS logic output levels. Receivers are High-Z when the
AUTO ON-LINE circuitry is enabled or when in shutdown.
The truth table logic of the SP3243 driver and receiver
outputs can be found in Table 6.
Phase 1: VSS Charge Storage
Table 6: SP3243E SHUTDOWN Truth Table
SHUTDOWN
TxOUT
RxOUT
R2OUT
0
High-Z
High-Z
Active
1
Active
Active
Active
During this phase of the clock cycle, the positive side of
capacitors C1 and C2 are initially charged to VCC. Cl+ is
then switched to GND and the charge in C1– is transferred
to C2–. Since C2+ is connected to VCC, the voltage
potential across capacitor C2 is now 2 times VCC.
VCC = +5V
1. In AUTO ON-LINE Mode where ONLINE = GND and SHUTDOWN =
VCC, the device will shut down if there is no activity present at the receiver
inputs.
+5V
C1
The SP3243E includes an additional non-inverting receiver
with an output R2OUT. R2OUT is an extra output that
remains active and monitors activity while the other
receiver outputs are forced into high impedance. This
allows a Ring Indicator (RI) signal from a peripheral to be
monitored without forward biasing the TTL / CMOS inputs
of the other devices connected to the receiver outputs.
Since receiver input is usually from a transmission line
where long cable lengths and system interference can
degrade the signal, the inputs have a typical hysteresis
margin of 300mV. This ensures that the receiver is virtually
immune to noisy transmission lines. Should an input be left
unconnected, an internal 5kΩ pull-down resistor to ground
will commit the output of the receiver to a HIGH state.
+
C2
–
–5V
C4
+
–
–
+
+
–
VDD Storage Capacitor
VSS Storage Capacitor
C3
–5V
Figure 15: Charge Pump — Phase 1
Phase 2: VSS Transfer
Phase two of the clock connects the negative terminal of C2
to the VSS storage capacitor and the positive terminal of C2
to GND. This transfers a negative generated voltage to C3.
This generated voltage is regulated to a minimum voltage
of -5.5V. Simultaneous with the transfer of the voltage to
C3, the positive side of capacitor C1 is switched to VCC and
the negative side is connected to GND.
Charge Pump
VCC = +5V
The charge pump is a MaxLinear-patented design (U.S.
5,306,954) and uses a unique approach compared to older,
less-efficient designs. The charge pump still requires four
external capacitors, but uses a four-phase voltage shifting
technique to attain symmetrical 5.5V power supplies. The
internal power supply consists of a regulated dual charge
pump that provides output voltages of 5.5V regardless of
the input voltage (VCC) over the +3.0V to +5.5V range.
This is important to maintain compliant RS-232 levels
regardless of power supply fluctuations.
C4
C1
+
–
C2
+
–
–
+
+
–
-5.5V
VDD Storage Capacitor
VSS Storage Capacitor
C3
Figure 16: Charge Pump — Phase 2
The charge pump operates in a discontinuous mode using
an internal oscillator. If the output voltages are less than a
magnitude of 5.5V, the charge pump is enabled. If the
output voltages exceed a magnitude of 5.5V, the charge
5/24/19
Rev 1.0.3
10
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Phase 3: VDD Charge Storage
The third phase of the clock is identical to the first phase —
the charge transferred in C1 produces -VCC in the negative
terminal of C1, which is applied to the negative side of
capacitor C2. Since C2+ is at VCC, the voltage potential
across C2 is 2 times VCC.
VCC = +5V
+5V
C1
+
C2
–
–5V
–
–
+
VDD Storage Capacitor
VSS Storage Capacitor
C3
–5V
Figure 17: Charge Pump — Phase 3
Phase 4: VDD Transfer
The fourth phase of the clock connects the negative
terminal of C2 to GND, and transfers this positive
generated voltage across C2 to C4, the VDD storage
capacitor. This voltage is regulated to +5.5V. At this
voltage, the internal oscillator is disabled. Simultaneous
with the transfer of the voltage to C4, the positive side of
capacitor C1 is switched to VCC and the negative side is
connected to GND, allowing the charge pump cycle to
begin again. The charge pump cycle will continue as long
as the operational conditions for the internal oscillator are
present.
VCC = +5V
+5.5V
C1
+
–
C2
C4
+
–
–
+
+
–
VDD Storage Capacitor
VSS Storage Capacitor
C3
Figure 18: Charge Pump — Phase 4
Since both V+ and V– are separately generated from VCC,
in a no–load condition V+ and V– will be symmetrical.
Older charge pump approaches that generate V– from V+
will show a decrease in the magnitude of V– compared to
V+ due to the inherent inefficiencies in the design. The
5/24/19
clock rate for the charge pump typically operates at greater
than 250kHz. The external capacitors can be as low as
0.1µF with a 16V breakdown voltage rating.
Table 7: Minimum Recommended Charge Pump
Capacitor Value
Input Voltage VCC
Charge Pump Capacitor Value
3.0V to 3.6V
C1 - C4 = 0.1µF
4.5V to 5.5V
C1 = 0.047µF, C2 - C4 = 0.33µF
3.0V to 5.5V
C1 - C4 = 0.22µF
C4
+
+
–
AUTO ONLINE Circuitry
The MaxLinear-patented charge pumps are designed to
operate reliably with a range of low cost capacitors. Either
polarized or non polarized capacitors may be used. If
polarized capacitors are used they should be oriented as
shown in the Typical Operating Circuit. The V+ capacitor
may be connected to either ground or VCC (polarity
reversed.)
The charge pump operates with 0.1µF capacitors for 3.3V
operation. For other supply voltages, see the table for
required capacitor values. Do not use values smaller than
those listed. Increasing the capacitor values (for example,
by doubling in value) reduces ripple on the transmitter
outputs and may slightly reduce power consumption. C2,
C3, and C4 can be increased without changing C1’s value.
For best charge pump efficiency, locate the charge pump
and bypass capacitors as close as possible to the IC.
Surface mount capacitors are best for this purpose. Using
capacitors with lower equivalent series resistance (ESR)
and self-inductance, along with minimizing parasitic PCB
trace inductance, will optimize charge pump operation.
Designers are also advised to consider that capacitor
values may shift over time and operating temperature.
AUTO ONLINE Circuitry
The SP3243E devices have a patent pending AUTO ONLINE circuitry on board that saves power in applications
such as laptop computers, palmtop (PDA) computers and
other portable systems.
The SP3243E devices incorporate an AUTO ON-LINE
circuit that automatically enables itself when the external
transmitters are enabled and the cable is connected.
Conversely, the AUTO ON-LINE circuit also disables most
of the internal circuitry when the device is not being used
and goes into a standby mode where the device typically
draws 1µA. This function is externally controlled by the
ONLINE pin. When this pin is tied to a logic LOW, the
Rev 1.0.3
11
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
AUTO ON-LINE function is active. Once active, the device
is enabled until there is no activity on the receiver inputs.
The receiver input typically sees at least ±3V, which is
generated from the transmitters at the other end of the
cable with a ±5V minimum.
When the external transmitters are disabled or the cable is
disconnected, the receiver inputs will be pulled down by
their internal 5kΩ resistors to ground. When this occurs
over a period of time, the internal transmitters will be
disabled and the device goes into a shutdown or standby
mode. When ONLINE is HIGH, the AUTO ON-LINE mode
is disabled.
The AUTO ON-LINE circuit has two stages:
1. Inactive Detection
S
H
U
T
D
O
W
N
VCC
The AUTO ON-LINE mode can be disabled by the
SHUTDOWN pin. If this pin is a logic LOW, the AUTO ONLINE function will not operate regardless of the logic state
of the ONLINE pin. Table 8 summarizes the logic of the
AUTO ON-LINE operating modes. The truth table logic of
the SP3243E driver and receiver outputs can be found in
Table 6.
The STATUS pin outputs a logic LOW signal if the device is
shutdown. This pin goes to a logic HIGH when the external
transmitters are enabled and the cable is connected.
For easy programming, the STATUS can be used to
indicate DSR or a Ring Indicator signal. Tying ONLINE and
SHUTDOWN together will bypass the AUTO ON-LINE
circuitry so this connection acts like a shutdown input pin.
STATUS
0V
disabled, the supply current is reduced to 1µA. This can
commonly occur in hand-held or portable applications
where the RS-232 cable is disconnected or the RS-232
drivers of the connected peripheral are turned off.
When the SP3243E devices are shut down, the charge
pumps are turned off. V+ charge pump output decays to
VCC, the V- output decays to GND. The decay time will
depend on the size of capacitors used for the charge pump.
Once in shutdown, the time required to exit the shut down
state and have valid V+ and V- levels is typically 200µs.
2. Accumulated Delay
RECEIVER +2.7V
0V
RS-232 INPUT
VOLTAGES -2.7V
AUTO ONLINE Circuitry
tSTSL
tSTSH
6
The first stage, shown in Figure 23, detects an inactive
input. A logic HIGH is asserted on RXINACT if the cable is
disconnected or the external transmitters are disabled.
Otherwise, RXINACT will be at a logic LOW. This circuit is
duplicated for each of the other receivers.
The second stage of the AUTO ON-LINE circuitry, shown in
Figure 24, processes all the receiver’s RXINACT signals
with an accumulated delay that disables the device to a
1µA supply current.
The STATUS pin goes to a logic LOW when the cable is
disconnected, the external transmitters are disabled, or the
SHUTDOWN pin is invoked. The typical accumulated
delay is around 20µs.
-2
8.6
4.93
3.46
2.67
1.82
1.57
1.38
1.23
1.12
1.02
Figure 19: AUTO ON-LINE Timing Waveforms
0
0.939
-5V
Vout+
Vout-
2
0.869
0V
4
0.62
+5V
DRIVER
RS-232 OUTPUT
VOLTAGES
Transmitter Output Voltage [V]
tONLINE
-4
-6
Load Current Per Transmitter [mA]
Figure 20: SP3243E Driver Output Voltages vs. Load
Current per Transmitter
The SP3243E driver outputs are able to maintain voltage
under loading of up to 2.5mA per driver, ensuring sufficient
output for mouse-driving applications.
When the SP3243E drivers or internal charge pump are
5/24/19
Rev 1.0.3
12
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
AUTO ONLINE Circuitry
VOUT +
0
0
VOUT -
1
Figure 21: Mouse Drive Application
VCC
+
C5
26
VCC
0.1 μF
28 C1+
+
V+
27
0.1 μF
C1
+
C3
0.1 μF
24 C11 C2+
SP3243E
V- 3
+
C2
0.1 μF
C4
2 C214 T1IN
T1OUT
13 T2IN
T2OUT 10
12 T3IN
T3OUT 11
+
0.1 μF
9
20 R2OUT
R1IN 4
19 R1OUT
5k Ω
R2IN 5
18 R2OUT
5k Ω
R3IN
17 R3OUT
6
5k Ω
R4IN 7
16 R4OUT
5k Ω
15 R5OUT
VCC
22
23
To μP Supervisor
Circuit
R5IN
8
5k Ω
DB-9
Connector
SHUTDOWN
ONLINE
21 STATUS
6
7
8
9
GND
25
DB-9 Connector Pins:
1. Received Line Signal Detector
2. Received Data
3. Transmitted Data
4. Data Terminal Ready
5. Signal Ground (Common)
6.
7.
8.
9.
1
2
3
4
5
DCE Ready
Request to Send
Clear to Send
Ring Indicator
Figure 22: Attaching SP3243E to a DB-9 Connector
5/24/19
Rev 1.0.3
13
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
AUTO ONLINE Circuitry
Table 8: AUTO ON-LINE Logic
RS-232 Signal at
Receiver Input
SHUTDOWN Input
ONLINE Input
STATUS Output
Transceiver Status
Yes
High
Low
High
Normal operation
(Auto-Online)
No
High
High
Low
Normal operation
No
High
Low
Low
Shutdown (Auto-Online)
Yes
Low
High / Low
High
Shutdown
No
Low
High / Low
Low
Shutdown
Inactive Detection Block
RXIN
RS-232
Receiver Block
RXINACT
RXOUT
Figure 23: Stage I of AUTO ON-LINE Circuitry
Delay
Stage
Delay
Stage
Delay
Stage
Delay
Stage
Delay
Stage
STATUS
R1INACT
R2INACT
R3INACT
R4INACT
R5INACT
SHUTDOWN
Figure 24: Stage II of AUTO ON-LINE Circuitry
5/24/19
Rev 1.0.3
14
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
ESD Tolerance
ESD Tolerance
The SP3243E series incorporates ruggedized ESD cells on
all driver output and receiver input pins. The ESD structure
is improved over our previous family for more rugged
applications and environments sensitive to electro-static
discharges and associated transients. The improved ESD
tolerance is at least ±15kV without damage nor latch-up.
There are different methods of ESD testing applied:
a. MIL-STD-883, Method 3015.7
b. IEC61000-4-2 Air-Discharge
c. IEC61000-4-2 Direct Contact
The Human Body Model has been the generally accepted
ESD testing method for semiconductors. This method is
also specified in MIL-STD-883, Method 3015.7 for ESD
testing. The premise of this ESD test is to simulate the
human body’s potential to store electro-static energy and
discharge it to an integrated circuit. The simulation is
performed by using a test model as shown in Figure 25.
This method will test the IC’s capability to withstand an
ESD transient during normal handling such as in
manufacturing areas where the ICs tend to be handled
frequently.
The IEC-61000-4-2, formerly IEC801-2, is generally used
for testing ESD on equipment and systems. For system
manufacturers, they must guarantee a certain amount of
ESD protection since the system itself is exposed to the
outside environment and human presence. The premise
with IEC61000-4-2 is that the system is required to
withstand an amount of static electricity when ESD is
applied to points and surfaces of the equipment that are
accessible to personnel during normal usage. The
transceiver IC receives most of the ESD current when the
ESD source is applied to the connector pins. The test
circuit for IEC61000-4-2 is shown on Figure 26. There are
two methods within IEC61000-4-2, the Air Discharge
method and the Contact Discharge method.
humidity will tend to change the discharge current. For
example, the rise time of the discharge current varies with
the approach speed.
The Contact Discharge Method applies the ESD current
directly to the EUT. This method was devised to reduce the
unpredictability of the ESD arc. The discharge current rise
time is constant since the energy is directly transferred
without the air-gap arc. In situations such as hand held
systems, the ESD charge can be directly discharged to the
equipment from a person already holding the equipment.
The current is transferred on to the keypad or the serial port
of the equipment directly and then travels through the PCB
and finally to the IC.
The circuit models in Figure 25 and Figure 26 represent the
typical ESD testing circuit used for all three methods. The
CS is initially charged with the DC power supply when the
first switch (SW1) is on. Now that the capacitor is charged,
the second switch (SW2) is on while SW1 switches off.
The voltage stored in the capacitor is then applied through
RS, the current limiting resistor, onto the device under test
(DUT). In ESD tests, the SW2 switch is pulsed so that the
device under test receives a duration of voltage.
For the Human Body Model, the current limiting resistor
(RS) and the source capacitor (CS) are 1.5kΩ and 100pF,
respectively. For IEC-61000-4-2, the current limiting
resistor (RS) and the source capacitor (CS) are 330Ω and
150pF, respectively.
The higher CS value and lower RS value in the
IEC61000-4-2 model are more stringent than the Human
Body Model. The larger storage capacitor injects a higher
voltage to the test point when SW2 is switched on. The
lower current limiting resistor increases the current charge
onto the test point.
With the Air Discharge Method, an ESD voltage is applied
to the equipment under test (EUT) through air. This
simulates an electrically charged person ready to connect a
cable onto the rear of the system only to find an unpleasant
zap just before the person touches the back panel. The
high energy potential on the person discharges through an
arcing path to the rear panel of the system before he or she
even touches the system. This energy, whether discharged
directly or through air, is predominantly a function of the
discharge current rather than the discharge voltage.
Variables with an air discharge such as approach speed of
the object carrying the ESD potential to the system and
5/24/19
Rev 1.0.3
15
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
ESD Tolerance
RS
RC
SW1
SW2
Device
Under
Test
CS
DC Power
Source
Figure 25: ESD Test Circuit for Human Body Model
Contact-Discharge Model
RS
RC
RV
SW1
SW2
Device
Under
Test
CS
DC Power
Source
R S and RV add up to 330Ω for IEC1000-4-2.
Figure 26: ESD Test Circuit for IEC61000-4-2
I→
Table 9: Transceiver ESD Tolerance Levels
30A
IEC 61000-4-2
Device Pin
Tested
Human
Body
Model
Air
Discharge
Direct
Contact
Level
Driver outputs
±15kV
±15kV
±8kV
4
Receiver inputs
±15kV
±15kV
±8kV
4
15A
0A
t = 0ns
t→
t = 30ns
Figure 27: ESD Test Waveform for IEC61000-4-2
5/24/19
Rev 1.0.3
16
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Mechanical Dimensions
Mechanical Dimensions
QFN32
BOTTOM VIEW
TOP VIEW
SIDE VIEW
TERMINAL DETAILS
Drawing No.: POD-00000036
Revision: B
Figure 28: Mechanical Dimensions, QFN32
5/24/19
Rev 1.0.3
17
SP3243E Data Sheet
Recommended Land Pattern and Stencil
Recommended Land Pattern and Stencil
QFN32
TYPICAL RECOMMENDED LAND PATTERN
TYPICAL RECOMMENDED STENCIL
Drawing No.: POD-00000036
Revision: B
Figure 29: Recommended Land Pattern and Stencil, QFN32
5/24/19
Rev 1.0.3
18
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Mechanical Dimensions
Mechanical Dimensions
SSOP28
TOP VIEW
SIDE VIEW 1
SIDE VIEW 2
DETAIL A
TERMINAL DETAILS
Drawing No.: POD-000000 133
Figure 30: Mechanical Dimensions, SSOP28
5/24/19
Rev 1.0.3
19
SP3243E Data Sheet
Recommended Land Pattern and Stencil
Recommended Land Pattern and Stencil
SSOP28
TYPICAL RECOMMENDED LAND PATTERN
TYPICAL RECOMMENDED STENCIL
Drawing No.: POD-000000 133
Revision: A
Figure 31: Recommended Land Pattern and Stencil, SSOP28
5/24/19
Rev 1.0.3
20
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5V RS-232 Transceivers Data Sheet
Mechanical Dimensions
Mechanical Dimensions
TSSOP28
TOP VIEW
SIDE VIEW 1
SIDE VIEW 2
©
©
DETAIL A
©
©
TERMINAL DETAILS
Drawing No.: POD-000000 134
Revision: A
Figure 32: Mechanical Dimensions, TSSOP28
5/24/19
Rev 1.0.3
21
SP3243E Data Sheet
Recommended Land Pattern and Stencil
Recommended Land Pattern and Stencil
TSSOP28
TYPICAL RECOMMENDED LAND PATTERN
TYPICAL RECOMMENDED STENCIL
Drawing No.: POD-000000 134
Revision: A
Figure 33: Recommended Land Pattern and Stencil, TSSOP28
5/24/19
Rev 1.0.3
22
SP3243E Data Sheet
Ordering Information
Ordering Information
Table 10: Ordering Information(1)
Ordering Part Number
Operating Temperature Range
Package
Packaging Method
Lead-Free(2)
0°C to 70°C
28-pin SSOP
Tube
Yes
120kbps Data Rate
SP3243ECA-L
SP3243ECA-L/TR
0°C to 70°C
28-pin SSOP
Reel
Yes
SP3243ECY-L/TR
0°C to 70°C
28-pin TSSOP
Reel
Yes
SP3243EEA-L
-40°C to 85°C
28-pin SSOP
Tube
Yes
SP3243EEA-L/TR
-40°C to 85°C
28-pin SSOP
Reel
Yes
SP3243EEY-L
-40°C to 85°C
28-pin TSSOP
Tube
Yes
SP3243EEY-L/TR
-40°C to 85°C
28-pin TSSOP
Reel
Yes
0°C to 70°C
28-pin SSOP
Reel
Yes
250kbps Data Rate
SP3243EBCA-L/TR
SP3243EBCY-L/TR
0°C to 70°C
28-pin TSSOP
Reel
Yes
SP3243EBEA-L/TR
-40°C to 85°C
28-pin SSOP
Reel
Yes
SP3243EBEY-L
-40°C to 85°C
28-pin TSSOP
Tube
Yes
SP3243EBEY-L/TR
-40°C to 85°C
28-pin TSSOP
Reel
Yes
SP3243EHCA-L/TR
0°C to 70°C
28-pin SSOP
Reel
Yes
SP3243EHEA-L/TR
-40°C to 85°C
28-pin SSOP
Reel
Yes
460kbps Data Rate
1Mbps Data Rate
SP3243EUCA-L/TR
0°C to 70°C
28-pin SSOP
Reel
Yes
SP3243EUCY-L/TR
0°C to 70°C
28-pin TSSOP
Reel
Yes
SP3243EUEA-L/TR
-40°C to 85°C
28-pin SSOP
Reel
Yes
SP3243EUEY-L/TR
-40°C to 85°C
28-pin TSSOP
Reel
Yes
SP3243EUER-L/TR
-40°C to 85°C
32-pin QFN
Reel
Yes
1. Refer to www.maxlinear.com/SP3243E, www.maxlinear.com/SP3243EB, www.maxlinear.com/SP3243EH, www.maxlinear.com/SP3243EU for most upto-date Ordering Information.
2. Visit www.maxlinear.com for additional information on Environmental Rating.
5/24/19
Rev 1.0.3
23
SP3243E 3 Driver / 5 Receiver Intelligent +3.0V to +5.5VRS-232 Transceivers Data Sheet
Disclaimer
SP3243 E U EY L /TR
Tape and Reel options
“L” suffix indicates Lead Free packaging
Package Type
Part Number
A= SSOP
Y= TSSOP
R= QFN
Temperature Range C= Commercial Range 0ºc to 70ºC
E= Extended Range -40ºc to 85ºC
Speed Indicator
ESD Rating
Blank= 120Kbps
B= 250Kbps
H= 460kbps
U= 1Mbps
E= 15kV HBM and IEC 1000-4
Figure 34: Part Nomenclature
MaxLinear, Inc.
5966 La Place Court, Suite 100
Carlsbad, CA 92008
760.692.0711 p.
760.444.8598 f.
www.maxlinear.com
The content of this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by
MaxLinear, Inc. MaxLinear, Inc. assumes no responsibility or liability for any errors or inaccuracies that may appear in the informational content contained in this
guide. Complying with all applicable copyright laws is the responsibility of the user. Without limiting the rights under copyright, no part of this document may be
reproduced into, stored in, or introduced into a retrieval system, or transmitted in any form or by any means (electronic, mechanical, photocopying, recording, or
otherwise), or for any purpose, without the express written permission of MaxLinear, Inc.
Maxlinear, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be
expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless
MaxLinear, Inc. receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c)
potential liability of MaxLinear, Inc. is adequately protected under the circumstances.
MaxLinear, Inc. may have patents, patent applications, trademarks, copyrights, or other intellectual property rights covering subject matter in this document. Except
as expressly provided in any written license agreement from MaxLinear, Inc., the furnishing of this document does not give you any license to these patents,
trademarks, copyrights, or other intellectual property.
MaxLinear, the MaxLinear logo, and any MaxLinear trademarks, MxL, Full-Spectrum Capture, FSC, G.now, AirPHY and the MaxLinear logo are all on the products
sold, are all trademarks of MaxLinear, Inc. or one of MaxLinear’s subsidiaries in the U.S.A. and other countries. All rights reserved. Other company trademarks and
product names appearing herein are the property of their respective owners.
© 2002 - 2019 MaxLinear, Inc. All rights reserved.
工商网监
湘ICP备2023018690号
