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SZA-5044

SZA-5044

  • 厂商:

    SIRENZA

  • 封装:

  • 描述:

    SZA-5044 - 4.9 - 5.9 GHz 5V Power Amplifier - SIRENZA MICRODEVICES

  • 数据手册
  • 价格&库存
SZA-5044 数据手册
Product Description Sirenza Microdevices’ SZA-5044 is a high efficiency class AB Heterojunction Bipolar Transistor (HBT) amplifier housed in a low-cost surface-mountable plastic package. This HBT amplifier is made with InGaP on GaAs device technology and fabricated with MOCVD for an ideal combination of low cost and high reliability. This product is specifically designed as a final or driver stage for 802.11a equipment in the 4.9 - 5.9 GHz band for a 5V supply. Optimized on-chip impedance matching circuitry provides a 50 Ω n ominal RF input impedance. A single external output matching circuit covers the entire 4.95.9GHz band simultaneously. The external output match allows for load line optimization for other applications or optimized performance over narrower bands. This product is available in a RoHS Compliant and Green package with matte tin finish, designated by the “Z” package suffix. SZA-5044 SZA-5044Z Pb RoHS Compliant & GreenPackage 4.9 – 5.9 GHz 5V Power Amplifier 4mm x 4mm QFN Package Product Features • • • • • • • • • • Functional Block Diagram Vcc Power Up/Down Control Active Bias Active Bias Active Bias 802.11a 54Mb/s Class AB Performance Pout = 22dBm @ 3% EVM, 5V, 343mA High Gain = 33dB Output Return Loss < -11dB for Linear Tune On-chip Output Power Detector P1dB = 30dBm @ 5V Simultaneous 4.9- 5.9GHz Performance Robust - Survives RF Input Power = +15dBm Power up/down control < 1µ s, Vpc 2.9V to 5V RFIN RFOUT Applications 802.11a WLAN, OFDM 5.8GHz ISM Band, 802.16 WiMAX Power Detector Vout Key Specifications Symbol fO P1dB Parameters: Test Conditions, App circuit page 4 Z0 = 50Ω, VCC = 5.0V, Icq = 270mA, TBP = 25ºC Frequency of Operation Output Power at 1dB Compression – 5.15 GHz Output Power at 1dB Compression – 5.875 GHz Gain at 4.9 GHz S21 Gain at 5.15 GHz Gain at 5.875 GHz Pout NF IM3 IRL ORL Vdet Range Icq I VPC ILEAK R th, j-l Output power at 3% EVM 802.11a 54Mb/s - 5.15GHz Output Power at 3% EVM 802.11a 54Mb/s - 5.875GHz Noise Figure at 5.875 GHz Third Order Intermod at 18dBm per tone - 5.875GHz Worst Case Input Return Loss 4.9-5.875GHz Worst Case Output Return Loss 4.9-5.875GHz Output Voltage Range for Pout=10dBm to 26dBm Vcc Quiescent Current Power Up Control Current, Vpc=5V ( IVPC1 + I VPC2 + IVPC3 ) Off Vcc Leakage Current Vpc=0V Thermal Resistance (junction - lead) Unit MHz dBm dB dB dB dBm dB dBc dB V mA mA uA ºC/W 230 8.6 9.3 25.7 Min. 4900 30.2 27.5 30.7 29 32.7 33.0 27.7 21 22 6.3 -39 11.6 12.3 0.8 to 1.9 270 1.7 8 24 100 310 -35 29.7 34.7 Typ. Max. 5900 T he information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for ina ccuracies or ommisions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2002 Sirenza Microdevices, Inc. All worldwide rights reserved. 303 South Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 1 http://www.sirenza.com EDS-103585 Rev H SZA-5044 4.9-5.9 GHz Power Amp Pin Out Description Pin # 1,3,5,9, 11,15,17 Function N/C Description Pins are not used. May be grounded, left open, or connected to adjacent pin. VPC1 is the bias control pin for the stage 1 active bias circuit and can be run from 2.9V to 5V control. An external series resistor is required for proper setting of bias levels depending on control voltage. Refer to the evaluation board schematic for resistor value. To prevent potential damage, do not apply voltage to this pin that is +1V greater than voltage applied to pin 20 (Vbias) unless Vpc supply current capability is less than 10 mA. VPC2 is the bias control pin for the stage 2 active bias circuit and can be run from 2.9V to 5V control. An external series resistor is required for proper setting of bias levels depending on control voltage. Refer to the evaluation board schematic for resistor value. To prevent potential damage, do not apply voltage to this pin that is +1V greater than voltage applied to pin 20 (Vbias) unless Vpc supply current capability is less than 10 mA. VPC3 is the bias control pin for the stage 3 active bias circuit and can be run from 2.9V to 5V control. An external series resistor is required for proper setting of bias levels depending on control voltage. Refer to the evaluation board schematic for resistor value. To prevent potential damage, do not apply voltage to this pin that is +1V greater than voltage applied to pin 20 (Vbias) unless Vpc supply current capability is less than 10 mA. Ouput power detector voltage. Load with 10K-100K ohms to ground for best performance. RF input pins. This is DC grounded internal to the IC. Do not apply voltage to this pin. All three pins must be used for proper operation. RF output pin. This is also another connection to the 3rd stage collector 3rd stage collector bias pin. Apply 5V to this pin. 2nd stage collector bias pin. Apply 5V to this pin. 1st stage collector bias pin. Apply 5V to this pin. Active bias network VCC. Apply 5V to this pin. Exposed area on the bottom side of the package needs to be soldered to the ground plane of the board for optimum thermal and RF performance. Several vias should be located under the EPAD as shown in the recommended land pattern (page 5). 6 VPC1 7 VPC2 8 VPC3 10 2,4 12,13,14 16 18 19 20 EPAD Vdet RFIN RFOUT VC3 VC2 VC1 Vbias Gnd Simplified Device Schematic Pin 6 Pin 20 Pin 19 Pin 7 Pin 18 Pin 8 Pin 16 Absolute Maximum Ratings Parameters VC3 Collector Bias Current (pin16) VC2 Collector Bias Current (pin18) VC1 Collector Bias Current (pin19) Value 500 225 75 7.0 3.4 -40 to +85 15 2 -40 to +150 +150 >1000 Unit mA mA mA V W ºC dBm dBm ºC ºC V Stage 1 Bias Stage 2 Bias Stage 3 Bias Device Voltage (VD ) Power Dissipation Operating Lead Temperature (TL) Pin 12,13,14 RF Input Power for 50 ohm RF out load RF Input Power for 10:1 VSWR RF out load Storage Temperature Range Pin 2, 4 EPAD EPAD Pin 10 EPAD Operating Junction Temperature (TJ ) ESD Human Body Model Caution: ESD Sensitive Appropriate precaution in handling, packaging and testing devices must be observed. Operation of this device beyond any one of these limits may cause permanent damage. For reliable continuous operation the device voltage and current must not exceed the maximum operating values specified in the table on page one. Bias conditions should also satisfy the following expression: ID VD < (TJ - TL ) / RTH’ j -l 303 South Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 2 http://www.sirenza.com EDS-103585 Rev H SZA-5044 4.9-5.9 GHz Power Amp 4.9 - 5.9 GHz Evaluation Board Data (V BIAS = 5.0V, Iq = 270mA) Broadband S11 - Input Return Loss 0 -5 -10 30 40 Broadband S21 - Forward Gain 35 S11(dB) -15 -20 -25 -30 -35 0.0 S21(dB) 1.0 2.0 3.0 4.0 5.0 6.0 7.0 25 20 15 10 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 Frequency(GHz) -40C +25C +85C Frequency(GHz) -40C +25C +85C Broadband S22 - Output Return Loss 0 -5 -10 -15 -20 -25 Typical Gain vs Pout, T=+25C 38 36 34 Gain(dB) 32 30 28 S22(dB) -30 26 -35 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 24 16 18 4.9GHz Frequency(GHz) -40C +25C +85C 20 22 5.15GHz 24 26 Pout(dBm) 5.35GHz 28 30 5.875GHz 32 5.725GHz DC Supply Current vs Pout, T=+25c 0.8 0.6 0.5 0.4 Icq (DC bias point) vs Vsupply (V+ and Vpc) 0.7 Idc(A) Idc(A) 0.6 0.3 0.2 0.1 0 2.8 0.5 0.4 0.3 16 18 4.9GHz 20 22 24 26 28 Pout(dBm) 5.35GHz 5.725GHz 30 5.875GHz 32 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 Vsupply(V) 5.15GHz -40c +25c +85c 303 South Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 3 http://www.sirenza.com EDS-103585 Rev H SZA-5044 4.9-5.9 GHz Power Amp 4.9 - 5.9 GHz Evaluation Board Data (V BIAS = 5.0V, Iq = 270mA) 802.11a EVM, OFDM, 54Mb/s, 64QAM EVM vs Pout T=+25c 802.11g, OFDM 54Mb/S, 64QAM 6 5 4 EVM(%) 3 2 1 0 12 14 4.9GHz EVM vs Pout F=4.9GHz 802.11g, OFDM 54Mb/S, 64QAM 6 5 4 EVM(%) 3 2 1 0 16 5.15GHz 18 Pout(dBm) 5.35GHz 20 5.725GHz 22 5.875GHz 24 8 10 12 14 -40c 16 Pout(dBm) +25c 18 +85c 20 22 24 EVM vs Pout F=5.15GHz 802.11g, OFDM 54Mb/S, 64QAM 6 5 4 EVM(%) 3 2 1 0 8 10 12 14 -40c 16 Pout(dBm) +25c 18 +85c 20 22 24 EVM(%) 6 5 4 3 2 1 0 8 10 EVM vs Pout F=5.35GHz 802.11g, OFDM 54Mb/S, 64QAM 12 14 -40c 16 Pout(dBm) +25c 18 +85c 20 22 24 EVM vs Pout F=5.725GHz 802.11g, OFDM 54Mb/S, 64QAM 6 5 4 EVM(%) EVM(%) 3 2 1 0 8 10 12 16 18 20 Pout(dBm) -40c +25c +85c 14 22 24 6 5 4 3 2 1 0 8 10 EVM vs Pout F=5.875GHz 802.11g, OFDM 54Mb/S, 64QAM 12 14 -40c 16 Pout(dBm) +25c 18 +85c 20 22 24 303 South Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 4 http://www.sirenza.com EDS-103585 Rev H SZA-5044 4.9-5.9 GHz Power Amp 4.9 - 5.9 GHz Evaluation Board Data (V BIAS = 5.0V, Iq = 270mA) IM3 vs Pout (2 Tone Avg.),T=+25c Tone Spacing = 1MHz -30 -35 1.8 -40 Vdet(V) IM3(dBc) -45 -50 -55 -60 -65 8 10 4.9GHz RF Power Detector (Vdet) vs Pout, F=4.9GHz 2.2 2 1.6 1.4 1.2 1 0.8 12 14 5.15GHz 16 18 Pout(dBm) 5.35GHz 20 22 5.875GHz 24 16 18 20 22 5.725GHz 24 26 28 Pout(dBm) -40c +25c +85c 30 32 RF Power Detector (Vdet) vs Pout, F=5.15GHz 2.2 2 1.8 Vdet(V) 1.6 1.4 1.2 1 0.8 16 18 20 22 24 26 28 Pout(dBm) -40c +25c +85c 30 32 Vdet(V) 2.2 2 1.8 1.6 1.4 1.2 1 0.8 16 RF Power Detector (Vdet) vs Pout, F=5.35GHz 18 20 22 24 26 28 Pout(dBm) -40c +25c +85c 30 32 RF Power Detector (Vdet) vs Pout, F=5.725GHz 2.6 2.4 2.2 2 Vdet(V) 1.8 1.6 1.4 1.2 1 0.8 16 18 20 22 24 26 28 Pout(dBm) -40c +25c +85c 30 32 Vdet(V) 2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 RF Power Detector (Vdet) vs Pout, F=5.875GHz 16 18 20 22 24 26 28 Pout(dBm) -40c +25c +85c 30 32 303 South Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 5 http://www.sirenza.com EDS-103585 Rev H SZA-5044 4.9-5.9 GHz Power Amp 4.9 - 5.9 GHz Evaluation Board Schematic For V+ = Vcc = 5.0V Notes: Pins 1,3,5,9,11,15 and 17 are unwired (N/C) inside the package. Refer to page 2 for detailed pin descriptions. Some of these pins are wired to adjacent pins or grounded as shown in the application circuit. This is to maintain consistency with the evaluation board layout shown below. It is recommended to use this layout and wiring to achieve the specified performance. To prevent potential damage, do not apply voltage to the Vpc pin that is +1V greater than voltage applied to pin 20 (Vbias/Vcc) unless Vpc supply current capability is less than 10 mA. 4.9 - 5.9 GHz Evaluation Board Layout For V+ = Vcc = 5.0V - Board material GETEK, 10mil thick, Dk=3.9, 2 oz. copper finish C1 C10 C3 C2 C5 R4 R6 C6 C4 Q1 C7 R2 R1 R3 C8 C9 R5 L1 SZA5044 303 South Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 6 http://www.sirenza.com EDS-103585 Rev H SZA-5044 4.9-5.9 GHz Power Amp Part Symbolization The part will be symbolized with an “SZA-5044” for Sn/Pb plating or “SZA-5044Z” for RoHS green compliant product. Marking designator will be on the top surface of the package. Part Number Ordering Information Part Number SZA-5044 SZA-5044Z Reel Size 13” 13” Devices/Reel 3000 3000 Package Outline Drawing (dimensions in mm): Refer to package outlline drawing for more detail. Recommended Land Pattern (dimensions in mm[in]) Recommended PCB Soldermask (SMBOC) for Land Pattern (dimensions in mm[in]): 303 South Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 7 http://www.sirenza.com EDS-103585 Rev H
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