SNR032

SNR032 32M-bit Mask ROM ======== 1. 2. 3. 4. 5. 6. 7. 8. Contents ======== INTRODUCTION......................................................................................................................... 3 FEATURES ................................................................................................................................... 3 PIN ASSIGNMENTS.................................................................................................................... 3 BUS INTERFACE ........................................................................................................................ 4 ABSOLUTE MAXIMUM RATINGS ......................................................................................... 5 ELECTRICAL CHARACTERISTICS ...................................................................................... 5 APPLICATION CIRCUIT .......................................................................................................... 6 BONDING PAD ............................................................................................................................ 9 Ver. 1.2 1 October 21, 2005 SNR032 32M-bit Mask ROM AMENDENT HISTORY Version Ver 0.1 Ver 1.0 Ver 1.1 Ver 1.2 Date June 10, 2004 September 10, 2004 November 1, 2004 October 21, 2005 first issue Added application circuit Modify the 310 application circuit. Modify Supply Voltage from Max 6V to Max 3.6V Description Ver. 1.2 2 October 21, 2005 SNR032 32M-bit Mask ROM 1. INTRODUCTION The SNR032 is a signal power, 32M-bit, read only memory. It is organized as 4M bytes, operates for single 3V power supply, support static standby mode. The SNR032 embedded two different interfaces, one is a standard 8-bit/16-bit interface bus which compatible with SNL310, another one is a special 8-bit AD (address/data) bus which compatible with SNC710. SNR032 offers automatic power-down, with power-down controlled by the chip enable “CEB”. When chip enable goes to high, SNR032 will entry power-down mode in order to save the power consumption. 2. ♦ ♦ ♦ ♦ ♦ FEATURES Power supply: 2.4V ~ 3.6V Memory Size: 32M-bit Totally static operation Embedded a standard 8-bit/16-bit bus interface compatible with SNL310 or a 8-bit AD (address/data) bus interface compatible with SNC710 Access time: 200ns @3V 3. TYPE PIN ASSIGNMENTS IO I I I I I I I I I I Standard Interface Bus mode select pin “1”->AD bus Bus mode select pin “0”->byte mode “1” word mode interface TESTM BS4 BS3 BS2 ALECLK READY AD-Bus D[0..7] Chip enable pin Positive Power supply (3.3volt) Negative Power supply (3.3volt) 3 Standard ROM A[21..8] Standard ROM A[7] / TESTM Standard ROM A[6] / BS4 ~ BS2 Standard ROM A[5] / BS4 ~ BS2 Standard ROM A[4] / BS4 ~ BS2 Standard ROM A[3..2] Standard ROM A[1] Standard ROM A[0] (for word mode only) AD Bus Interface “1”: AD bus mode - Symbol “0” for 8-bit/16-bit interface “0”: Standard mode MODE A[21..8] A[[7] A[6] A[5] A[4] A[3..2] A[1] A[0] D[8..15] D[0..7] CEB OEB VDD GND I/O Data bus D[8..15] I/O Data bus D[0..7] I I Chip enable pin Output enable pin P Positive Power supply (3.3volt) P Negative Power supply (3.3volt) Ver. 1.2 October 21, 2005 SNR032 32M-bit Mask ROM 4. BUS INTERFACE SNR032 provides three different bus modes to connect to host CPU, AD-bus mode, byte mode and word mode. And the switching between different modes is depended on the pin option “TYPE” and “MODE”. The following table is shown the relation ship of “TYPE”, “MODE” pins and mode switching. Mode AD-Bus Interface Byte Mode Interface Word Mode Interface TYPE pin VDD GND GND MODE pin Don’t care GND VDD 4.1 AD-Bus Interface For 8-bit AD (address/data) bus interface, all the address and data communication between SNC710 and SNR032 are through data bus D[0..7]. SNC710 allows user to connect maximum 2 external mask ROM. The option pin “TYPE” must connected to VDD then the AD-bus interface to be enable. In AD-Bus mode, SNR032 has three bank select pins BS2~BS4 to specify the memory region of SNR032. The address region setting of SNR032 is shown as bellow. BS4~BS2 001 010 011 100 101 110 111 Address Region 0x0200000 ~ 0x03FFFFF 0x0400000 ~ 0x05FFFFF 0x0600000 ~ 0x07FFFFF 0x0800000 ~ 0x09FFFFF 0x0A00000 ~ 0x0BFFFFF 0x0C00000 ~ 0x0DFFFFF 0x0E00000 ~ 0x0FFFFFF Table-1 Note: For the address region 0x00000~0x01FFFFF are reserved, so the setting of bank select pins BS4~BS2 CAN’T be the range 0000~0x0011. Ver. 1.2 4 October 21, 2005 SNR032 32M-bit Mask ROM 5. ABSOLUTE MAXIMUM RATINGS Items Supply Voltage Input Voltage Operating Temperature Storage Temperature Symbol VDD-V VIN TOP TSTG Min -0.3 GND-0.3 0 -55.0 Max 3.6 VDD+0.3 55 125.0 Unit. V V o C o C 6. ELECTRICAL CHARACTERISTICS Item Sym. VDD ISBY IOPR tAA Min. 2.4 Typ. 1.5 4 Max. 3.6 2.0 150 Unit V uA ns VDD=3V, no load Vdd=3V mA VDD=3V, no load Condition Operating Voltage Standby current Operating Current Address access time Ver. 1.2 5 October 21, 2005 SNR032 32M-bit Mask ROM 7. 7.1 Application circuit AD Bus Interface (with SNC710) VDD CVDD U1 VCC SNR032 VDD VDD VDD READYB/A0 ALECLK/A1 A2 A3 BS2/A4 BS3/A5 BS4/A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 U2 9 VDD VDD VDD SNC710 CVDD CVDD CVDD 12 33 53 4.7uF VDD 45 58 47uF 220K 51 RST TEST LXIN 22 15pF 32768 LXOUT P0.0 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 31 32 33 34 35 36 37 38 41 42 43 44 45 46 47 48 AD0/D0 AD1/D1 AD2/D2 AD3/D3 AD4/D4 AD5/D5 AD6/D6 AD7/D7 D8 D9 D10 D11 D12 D13 D14 D15 27 40 50 3 4 5 6 7 8 9 10 14 15 16 17 18 19 20 21 22 23 24 25 26 51 CVDD C8 0.1uF READY ALECLK CVDD 21 50 54 55 56 57 60 61 62 1 2 3 4 5 6 7 8 15pF 0.1uF VDD 49 48 20 330 330 330 330 CEB OEB CKSEL P0.1 EXTM P0.2 P0.3 1 CEB 75K 26 13 XIN P0.4 330 330 330 330 CVDD OEB 11 12 TYPE GND GND GND GND 39 XOUT P0.6 P0.7 MODE 2 29 30 49 GND 110K 27 P0.5 (0x0200000~0x03FFFFF) 44 46 BP0 BN0 VO AVDD SPEAKER 24 23 25 AGND P0.8 P0.9 P0.10 P0.11 P0.12 P0.13 P0.14 P0.15 1.5V 3V J1 CVDD VDD AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 CEB READY ALECLK VDD3V VDD5V VDD3V CVDD VDD5V VDD CVDD AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 CEB READY ALECLK J2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 TR1 10 11 14 15 16 17 18 19 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 TR2 TR3 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 CE_ CEIN_ READY ALE_CLK CLKIN 42 41 40 39 37 36 35 34 32 31 30 29 28 TR4 TR5 TR6 TR7 TR8 GND GND GND GND GND GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 CVDD AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 CEB READY ALECLK 13 38 43 47 52 59 CON18 CON18 VDD CVDD U1 SNR032 VCC U2 9 45 SNC710 VDD VDD VDD LXIN VDD 58 CVDD CVDD CVDD 12 33 53 22 4.7uF 15pF AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 47uF 220K 51 49 31 32 33 34 35 36 37 38 41 42 43 44 45 46 47 48 32768 RST TEST P0.0 AD0/D0 AD1/D1 AD2/D2 AD3/D3 AD4/D4 AD5/D5 AD6/D6 AD7/D7 D8 D9 D10 D11 D12 D13 D14 D15 LXOUT 21 50 54 55 56 57 60 61 62 1 2 3 4 5 6 7 8 42 41 40 39 37 36 35 34 32 31 30 29 28 15pF 0.1uF VDD 48 20 330 330 330 CKSEL P0.1 EXTM CEB 1 P0.2 P0.3 75K 330 330 330 330 330 CVDD OEB CEB 26 13 XIN P0.4 P0.5 OEB 11 12 TYPE GND GND GND XOUT P0.6 P0.7 MODE 2 29 30 39 49 GND 27 GND 110K CVDD 27 40 50 READY 3 ALECLK READYB/A0 4 ALECLK/A1 5 A2 6 A3 7 CVDD BS2/A4 8 BS3/A5 9 BS4/A6 10 A7 14 A8 15 A9 16 A10 17 A11 18 A12 19 A13 20 A14 21 A15 22 A16 23 A17 24 A18 25 A19 26 A20 51 A21 VDD VDD VDD C8 0.1uF (0x0200000~0x03FFFFF) 44 46 BP0 BN0 VO AVDD SPEAKER 24 23 25 AGND P0.8 P0.9 P0.10 P0.11 P0.12 P0.13 P0.14 P0.15 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 CE_ CEIN_ READY ALE_CLK CLKIN 1.5V 3V VDD3V CVDD J1 J2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 U3 SNR032 VDD VDD VDD READYB/A0 ALECLK/A1 A2 A3 BS2/A4 BS3/A5 BS4/A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 VCC VDD5V TR1 10 11 14 15 16 17 18 19 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 TR2 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 CEB READY ALECLK VDD VDD3V CVDD VDD5V VDD CVDD AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 CEB READY ALECLK TR3 TR4 TR5 TR6 TR7 TR8 GND GND GND GND GND GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 CVDD AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 CEB READY ALECLK AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 31 32 33 34 35 36 37 38 41 42 43 44 45 46 47 48 AD0/D0 AD1/D1 AD2/D2 AD3/D3 AD4/D4 AD5/D5 AD6/D6 AD7/D7 D8 D9 D10 D11 D12 D13 D14 D15 27 40 50 CVDD C9 0.1uF CEB 13 38 43 47 52 59 CON18 1 CON18 CEB OEB CVDD 13 OEB 11 12 TYPE GND GND GND GND MODE 2 29 30 39 49 GND READY 3 ALECLK 4 5 6 7 8 CVDD 9 10 14 15 16 17 18 19 20 21 22 23 24 25 26 51 (0x0400000~0x05FFFFF) Ver. 1.2 6 October 21, 2005 SNR032 32M-bit Mask ROM 7.2 Standard ROM interface (with SNL310) VDD VDD VDD U1 C10 47uF 3 19 VDD 37 48 R1 220K RST 60 79 83 52 53 C5 15pF 6 16MHZ Y2 XIN VDD VDD VDD VDD VDD VDD RST CKSEL TESTM P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 P2.8 P2.9 P2.10 P2.11 P2.12 P2.13 P2.14 P2.15 P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 P3.8 P3.9 P3.10 P3.11 P3.12 P3.13 P3.14 P3.15 GND GND GND GND 90 89 88 87 86 82 81 80 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 61 59 58 57 56 55 54 51 41 46 84 50 P2_0 P2_1 P2_2 P2_3 P2_4 P2_5 P2_6 P2_7 P2_8 P2_9 P2_10 P2_11 P2_12 P2_13 P2_14 P2_15 LXOUT 1 SNL310 CVDD CVDD LXIN 26 1.5V 85 2 32768HZ Y1 C2 15pF VDD U2 SNR032 VDD VDD VDD READYB/A0 ALECLK/A1 A2 A3 BS2/A4 BS3/A5 BS4/A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 27 40 50 3 4 5 6 7 8 9 10 14 15 16 17 18 19 20 21 22 23 24 25 26 28 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 C6 0.1uF VDD D0 D1 D2 D3 D4 D5 D6 D7 C1 15pF C3 4.7uF 1.5V VDD C4 0.1uF 31 32 33 34 35 36 37 38 41 42 43 44 45 46 47 48 AD0/D0 AD1/D1 AD2/D2 AD3/D3 AD4/D4 AD5/D5 AD6/D6 AD7/D7 D8 D9 D10 D11 D12 D13 D14 D15 CEB OEB TYPE GND GND GND GND 39 MODE 7 XOUT C7 15pF 47 49 SPEAKER A16 A17 A18 A19 A20 A21 RDB D0 D1 D2 D3 D4 D5 D6 D7 4 25 24 23 22 21 20 18 16 15 14 13 12 11 10 9 8 5 17 28 BP0 BN0 VO P5.0 P5.1 P5.2 P5.3 P5.4 P5.5 P5.6 P5.7 P5.8 P5.9 P5.10 P5.11 P5.12 P5.13 P5.14 P5.15 GND GND GND CEB1 RDB 1 13 11 12 2 29 30 49 CSB2 CSB1 GND (0x0400000~0x05FFFFF) A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 27 29 30 31 32 33 34 35 36 38 39 40 42 43 44 45 P4.15 P4.14 P4.13 P4.12 P4.11 P4.10 P4.9 P4.8 P4.7 P4.6 P4.5 P4.4 P4.3 P4.2 P4.1 P4.0 Ver. 1.2 7 October 21, 2005 SNR032 32M-bit Mask ROM Device No. 1st external device(CS0) 2nd external device(CS1) 3rd external device(CS2) 4th external device(CS3) Start address 0x0200000 0x0400000 0x0800000 0x0C00000 End Address 0x03FFFFF 0x07FFFFF 0x0BFFFFF 0x0FFFFFF Memory Size 2M words 4M words 4M words 4M words CVDD VDD VDD U1 C10 47uF 3 19 VDD 37 48 R1 220K RST 60 79 83 52 53 C5 15pF 6 16MHZ Y2 XIN VDD VDD VDD VDD VDD VDD RST CKSEL TESTM P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 P2.8 P2.9 P2.10 P2.11 P2.12 P2.13 P2.14 P2.15 P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 P3.8 P3.9 P3.10 P3.11 P3.12 P3.13 P3.14 P3.15 GND GND GND GND 90 89 88 87 86 82 81 80 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 61 59 58 57 56 55 54 51 41 46 84 50 D0 D1 D2 D3 D4 D5 D6 D7 31 32 33 34 35 36 37 38 41 42 43 44 45 46 47 48 CEB2 RDB 1 13 11 12 P2_0 P2_1 P2_2 P2_3 P2_4 P2_5 P2_6 P2_7 P2_8 P2_9 P2_10 P2_11 P2_12 P2_13 P2_14 P2_15 LXOUT 1 SNL310 CVDD CVDD LXIN 26 1.5V 85 2 32768HZ Y1 C1 15pF C3 4.7uF 1.5V C3 104 VDD A22 GND GND CS_ GND VCC 1 2 3 4 5 6 U5 A0 A1 A2 E1_ E2_ E3 16 VDD Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 GND 15 14 13 12 11 10 9 7 VCC A_CE_ B_CE_ 8 74AC138 C2 15pF VDD U2 SNR032 VDD VDD VDD READYB/A0 ALECLK/A1 A2 A3 BS2/A4 BS3/A5 BS4/A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 27 40 50 3 4 5 6 7 8 9 10 14 15 16 17 18 19 20 21 22 23 24 25 26 28 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 VDD C4 0.1uF D0 D1 D2 D3 D4 D5 D6 D7 31 32 33 34 35 36 37 38 41 42 43 44 45 46 47 48 AD0/D0 AD1/D1 AD2/D2 AD3/D3 AD4/D4 AD5/D5 AD6/D6 AD7/D7 D8 D9 D10 D11 D12 D13 D14 D15 CEB OEB TYPE GND GND GND GND MODE C6 0.1uF 7 XOUT C7 15pF 47 49 SPEAKER A16 A17 A18 A19 A20 RDB D0 D1 D2 D3 D4 D5 D6 D7 4 25 24 23 22 21 20 18 16 15 14 13 12 11 10 9 8 5 17 28 BP0 BN0 VO P5.0 P5.1 P5.2 P5.3 P5.4 P5.5 P5.6 P5.7 P5.8 P5.9 P5.10 P5.11 P5.12 P5.13 P5.14 P5.15 GND GND GND CEB1 RDB 1 13 11 12 29 30 39 49 2 CSB2 CSB1 GND (0x0400000~0x05FFFFF) VDD U2 SNR032 VDD VDD VDD READYB/A0 ALECLK/A1 A2 A3 BS2/A4 BS3/A5 BS4/A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 27 40 50 3 4 5 6 7 8 9 10 14 15 16 17 18 19 20 21 22 23 24 25 26 28 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 VDD AD0/D0 AD1/D1 AD2/D2 AD3/D3 AD4/D4 AD5/D5 AD6/D6 AD7/D7 D8 D9 D10 D11 D12 D13 D14 D15 CEB OEB TYPE GND GND GND GND MODE A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 27 29 30 31 32 33 34 35 36 38 39 40 42 43 44 45 P4.15 P4.14 P4.13 P4.12 P4.11 P4.10 P4.9 P4.8 P4.7 P4.6 P4.5 P4.4 P4.3 P4.2 P4.1 P4.0 C6 0.1uF 2 29 30 39 49 GND (0x0600000~0x07FFFFF) Ver. 1.2 8 October 21, 2005 8. Ver. 1.2 28 27 A21 VD D 26 A2 0 25 A1 9 24 23 A1 8 A1 7 A1 6 A1 5 20 A1 4 19 18 A1 3 A1 2 17 A11 16 A1 0 15 14 A9 A8 13 OE B MOD E 12 11 T YPE 10 A7 9 BS 4 / A6 8 BS 3 / A 5 7 22 21 GN D 29 3 0 GN D BONDING PAD 31 AD 0 / D 0 32 33 AD 2 / D 2 34 AD 3 / D 3 35 AD 4 / D 4 36 AD 5 / D 5 AD 6 / D 6 37 38 AD 7 / D 7 3 9 40 GN D VD D 41 D8 Note: The substrate MUST be connected to Vss in PCB layout. ( 0 . 00, 0. 0 0 ) 6 A3 5 A2 4 AL E C L K / A 1 3 RE AD Y / A 0 GND 2 1 CE B 9 42 4 3 D9 D1 0 44 D11 D1 2 45 46 D1 3 D1 4 47 48 D1 5 GN D 49 50 VD D SNR032 32M-bit Mask ROM October 21, 2005 SNR032 32M-bit Mask ROM DISCLAIMER The information appearing in SONiX web pages (“this publication”) is believed to be accurate. However, this publication could contain technical inaccuracies or typographical errors. The reader should not assume that this publication is error-free or that it will be suitable for any particular purpose. SONiX makes no warranty, express, statutory implied or by description in this publication or other documents which are referenced by or linked to this publication. In no event shall SONiX be liable for any special, incidental, indirect or consequential damages of any kind, or any damages whatsoever, including, without limitation, those resulting from loss of use, data or profits, whether or not advised of the possibility of damage, and on any theory of liability, arising out of or in connection with the use or performance of this publication or other documents which are referenced by or linked to this publication. This publication was developed for products offered in Taiwan. SONiX may not offer the products discussed in this document in other countries. Information is subject to change without notice. Please contact SONiX or its local representative for information on offerings available. Integrated circuits sold by SONiX are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. The application circuits illustrated in this document are for reference purposes only. SONIX DISCLAIMS ALL WARRANTIES, INCLUDING THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. SONIX reserves the right to halt production or alter the specifications and prices, and discontinue marketing the Products listed at any time without notice. Accordingly, the reader is cautioned to verify that the data sheets and other information in this publication are current before placing orders. Products described herein are intended for use in normal commercial applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are specifically not recommended without additional processing by SONIX for such application. Ver. 1.2 10 October 21, 2005