SNA-200

Product Description Stanford Microdevices’ SNA-200 is a GaAs monolithic broadband amplifier (MMIC) in die form. This amplifier provides 16dB of gain when biased at 50mA and 4V. External DC decoupling capacitors determine low frequency response. The use of an external resistor allows for bias flexibility and stability. These unconditionally stable amplifiers are designed for use as general purpose 50 ohm gain blocks. Also available in packaged form (SNA-276, -286 & -287), its small size (0.33mm x 0.33mm) and gold metallization make it an ideal choice for use in hybrid circuits. The SNA-200 is available in gel paks at 100 devices per container. SNA-200 DC-6.5 GHz, Cascadable GaAs MMIC Amplifier Output Power vs. Frequency 16 15 dBm 14 13 12 0.5 1 1.5 2 4 6 8 10 Product Features • Cascadable 50 Ohm Gain Block • 16dB Gain, +14dBm P1dB • 1.5:1 Input and Output VSWR • Operates From Single Supply • Chip Back Is Ground Applications • Narrow and Broadband Linear Amplifiers • Commercial and Industrial Applications 50 Ohm Gain Blocks GHz Electrical Specifications at Ta = 25° C S ym bol P a r a m e te r s : T e s t C o n d itio n s : Id = 5 0 m A , Z 0 = 5 0 O h m s S m a ll S ig n a l P o w e r G a in f = 0 . 1 - 2 .0 G H z f = 2 . 0 - 4 .0 G H z f = 4 . 0 - 6 .5 G H z f = 0 . 1 - 4 .0 G H z U n its dB dB dB dB GHz f = 2 .0 G H z f = 2 .0 G H z f = 0 . 1 - 6 .5 G H z f = 2 .0 G H z f = 2 .0 G H z f = 0 . 1 - 6 .5 G H z dBm dB M in . 1 5 .0 1 4 .0 1 3 .0 Ty p . 1 6 .0 1 5 .0 1 4 .0 + /1 .0 6 .5 1 4 .0 5 .5 1 .5 :1 2 7 .0 100 20 3 .5 4 .0 - 0 .0 0 1 8 - 4 .0 4 .5 6 .0 M ax. G P G F G a i n F la t n e s s 3 d B B a n d w id t h O u t p u t P o w e r a t 1 d B C o m p r e s s io n N o is e F ig u r e In p u t/O u tp u t T h ir d O r d e r In te r c e p t P o in t G r o u p D e la y BW 3dB P 1dB NF VSW R IP T 3 dBm psec dB V D IS O L V D R e v e r s e Is o la tio n D e v ic e V o lta g e D e v i c e G a i n T e m p e r a t u r e C o e ff i c i e n t D e v ic e V o lta g e Te m p e ra tu r e C o e ff i c i e n t d G /d T d V /d T d B /d e g C m V /d e g C The information provided herein is believed to be reliable at press time. Stanford Microdevices assumes no responsibility for inaccuracies or omissions. Stanford Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Stanford Microdevices does not authorize or warrant any Stanford Microdevices product for use in life-support devices and/or systems. Copyright 1999 Stanford Microdevices, Inc. All worldwide rights reserved. 522 Almanor Ave., Sunnyvale, CA 94086 Phone: (800) SMI-MMIC http://www.stanfordmicro.com 5-21 SNA-200 DC-6.5 GHz Cascadable MMIC Amplifier Typical Performance at 25° C (Vds =4.0V, Ids = 50mA) |S11| vs. Frequency 0 -5 14 13 |S21| vs. Frequency dB -10 -15 -20 0.5 1 1.5 2 4 6 8 10 dB 12 11 10 0.5 1 1.5 2 4 6 8 10 GHz GHz |S12| vs. Frequency 0 -5 -10 0 -5 |S22| vs. Frequency dB -15 -20 -25 0.5 1 1.5 2 4 6 8 10 dB -10 -15 -20 0.5 1 1.5 2 4 6 8 10 GHz GHz 50 Ohm Gain Blocks Noise Figure vs. Frequency 8 7.5 27 28 TOIP vs. Frequency 7 dB 6.5 6 dBm 26 25 5.5 5 0.1 0.5 1 1.5 2 4 6 8 10 24 0.5 1 1.5 2 4 6 8 10 GHz GHz Suggested Bonding Arrangement Simplified Schematic of MMIC 522 Almanor Ave., Sunnyvale, CA 94086 Phone: (800) SMI-MMIC http://www.stanfordmicro.com 5-22 SNA-200 DC-6.5 GHz Cascadable MMIC Amplifier Absolute Maximum Ratings P a r a m ete r A b s o lu te M a xim u m Part Number Ordering Information Part Number SNA-200 Devices Per Pak 100 D e vic e C urre nt Po w e r D issipa tion R F In p ut Po w er Ju n ction Te m p e ra ture O p e ra tin g Te m p e ra tu re Sto ra g e Te m pe ra tu re 70mA 3 2 0m W 1 0 0m W +2 0 0 C -4 5 C to +8 5 C -6 5 C to +1 5 0 C Notes: 1. Operation of this device above any one of these parameters may cause permanent damage. MTTF vs. Temperature @ Id = 50mA Die Bottom Temperature +55C Junction Temperature +155C MTTF (hrs) 1000000 +90C +190C 100000 +120C +220C 10000 50 Ohm Gain Blocks Thermal Resistance (Lead-Junction): 500° C/W Typical Biasing Configuration Die Attach The die attach process mechanically attaches the die to the circuit substrate. In addition, it electrically connects the ground to the trace on which the die is mounted and establishes the thermal path by which heat can leave the die. Wire Bonding Electrical connections to the die are through wire bonds. Stanford Microdevices recommends wedge bonding or ball bonding to the pads of these devices. Recommended Wedge Bonding Procedure Assembly Techniques Epoxy die attach is recommended. The top and bottom metallization is gold. Conductive silver-filled epoxies are recommended. This method involves the use of epoxy to form a joint between the backside gold of the chip and the metallized area of the substrate. A 150 C cure for 1 hour is necessary. Recommended epoxy is Ablebond 84-1LMIT1 from Ablestik. 1. Set the heater block temperature to 260C +/- 10C. 2. Use pre-stressed (annealed) gold wire between 0.0005 to 0.001 inches in diameter. 3. Tip bonding pressure should be between 15 and 20 grams and should not exceed 20 grams. The footprint that the wedge leaves on the gold wire should be between 1.5 and 2.5 wire diameters across for a good bond. 522 Almanor Ave., Sunnyvale, CA 94086 Phone: (800) SMI-MMIC http://www.stanfordmicro.com 5-23