74LCXH16245
LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER WITH 5V TOLERANT INPUTS AND OUTPUT (3-STATE)
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5V TOLERANT INPUTS AND OUTPUTS HIGH SPEED: tPD = 4.5 ns (MAX.) at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2.0V to 3.6V (1.5V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES H16245 BUS HOLD PROVIDED ON BOTH SIDES LATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17) ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V
TSSOP
ORDER CODES
PACKAGE TSSOP TUBE T&R 74LCXH16245TTR
PIN CONNECTION
DESCRIPTION The 74LCXH16245 is a low voltage CMOS 16 BIT BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and outputs. This IC is intended for two-way asynchronous communication between data buses; the direction of data transmission is determined by DIR input. The two enable inputs nG can be used to disable the device so that the buses are effectively isolated. Bus hold on data inputs is provided in order to eliminate the need for external pull-up or pull-down resistor. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW.
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74LCXH16245
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No 1 2, 3, 5, 6, 8, 9, 11, 12 13, 14, 16, 17, 19, 20, 22, 23 24 25 36, 35, 33, 32, 30, 29, 27, 26 47, 46, 44, 43, 41, 40, 38, 38 48 4, 10, 15, 21, 28, 34, 39, 45 7, 18, 31, 42 SYMBOL NAME AND FUNCTION
IEC LOGIC SYMBOLS
1DIR Directional Control 1B1 to 1B8 Data Inputs/Outputs 2B1 to 2B8 Data Inputs/Outputs 2DIR Directional Control 2G Output Enable Input 2A1 to 2A8 Data Inputs/Outputs 1A1 to 1A8 Data Inputs/Outputs 1G GND VCC Output Enable Input Ground (0V) Positive Supply Voltage
TRUTH TABLE
INPUTS G L L H DIR L H X FUNCTION A BUS B BUS OUTPUT Yn A=B B=A Z
OUTPUT INPUT INPUT OUTPUT Z Z
X : Don‘t Care Z : High Impedance
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ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VI/O VI/O IIK IOK IO ICC IGND Tstg TL Supply Voltage DC Input Voltage (DIR, G) Bus I/O Voltage (OFF State) Bus I/O Voltage (High or Low State) (note 1) DC Input Diode Current DC Output Diode Current (note 2) DC Output Current DC Supply Current per Supply Pin DC Ground Current per Supply Pin Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 50 - 50 ± 50 ± 100 ± 100 -65 to +150 300 Unit V V V V mA mA mA mA mA °C °C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) IO absolute maximum rating must be observed 2) VO < GND
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO VO IOH, IOL IOH, IOL Top dt/dv Supply Voltage (note 1) Input Voltage Output Voltage (OFF State) Output Voltage (High or Low State) High or Low Level Output Current (VCC = 3.0 to 3.6V) High or Low Level Output Current (VCC = 2.7V) Operating Temperature Input Rise and Fall Time (note 2) Parameter Value 2.0 to 3.6 0 to 5.5 0 to 5.5 0 to VCC ± 24 ± 12 -55 to 125 0 to 10 Unit V V V V mA mA °C ns/V
1) Truth Table guaranteed: 1.5V to 3.6V 2) VIN from 0.8V to 2V at VCC = 3.0V
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DC SPECIFICATIONS
Test Condition Symbol Parameter VCC (V) -40 to 85 °C Min. 2.0 2.7 to 3.6 0.8 2.7 to 3.6 2.7 3.0 VOL Low Level Output Voltage 2.7 to 3.6 2.7 3.0 II II(HOLD) Input Leakage Current Input Hold Current 2.7 to 3.6 3.0 3.6 Ioff IOZ Power Off Leakage Current High Impedance Output Leakage Current Quiescent Supply Current ICC incr. per Input 0 2.7 to 3.6 IO=-100 µA IO=-12 mA IO=-18 mA IO=-24 mA IO=100 µA IO=12 mA IO=16 mA IO=24 mA VI = 0 to 5.5V VI = 0.8V VI = 2V VI = 0 to 3.6V VI or VO = 5.5V VI = VIH or VIL VO = 0 to VCC VI = VCC or GND 75 -75 ± 500 10 ± 10 20 ± 20 500 VCC-0.2 2.2 2.4 2.2 0.2 0.4 0.4 0.55 ±5 75 -75 ± 500 10 ± 10 20 ± 20 500 µA µA µA µA µA VCC-0.2 2.2 2.4 2.2 0.2 0.4 0.4 0.55 ±10 µA V V 0.8 V Max. Value -55 to 125 °C Min. 2.0 Max. V Unit
VIH VIL VOH
High Level Input Voltage Low Level Input Voltage High Level Output Voltage
ICC ∆ICC
VI or VO= 3.6 to 5.5V VIH = VCC - 0.6V 2.7 to 3.6
2.7 to 3.6
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition Symbol Parameter VCC (V) 3.3 CL = 50pF VIL = 0V, VIH = 3.3V Value TA = 25 °C Min. Typ. 0.8 -0.8 Max. V Unit
VOLP VOLV
Dynamic Low Level Quiet Output (note 1)
1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the LOW state.
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AC ELECTRICAL CHARACTERISTICS
Test Condition Symbol Parameter VCC (V) 2.7 3.0 to 3.6 2.7 3.0 to 3.6 2.7 3.0 to 3.6 3.0 to 3.6 CL (pF) 50 50 50 50 RL (Ω) 500 500 500 500 ts = tr (ns) 2.5 2.5 2.5 2.5 -40 to 85 °C Min. 1.5 1.5 1.5 1.5 1.5 1.5 Max. 5.2 4.5 7.2 6.5 6.9 6.4 1.0 Value -55 to 125 °C Min. 1.5 1.5 1.5 1.5 1.5 1.5 Max. 6.0 5.3 8.3 7.3 7.5 7.2 1.0 ns ns ns ns Unit
tPLH tPHL tPZL tPZH tPLZ tPHZ tOSLH tOSHL
Propagation Delay Time Output Enable Time Output Disable Time Output To Output Skew Time (note1, 2)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|) 2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS
Test Condition Symbol Parameter VCC (V) 3.3 3.3 3.3 fIN = 10MHz VIN = 0 or VCC Value TA = 25 °C Min. Typ. 4 10 50 Max. pF pF pF Unit
CIN COUT CPD
Input Capacitance Output Capacitance Power Dissipation Capacitance (note 1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/16 (per circuit)
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TEST CIRCUIT
TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ
CL = 50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω)
SWITCH Open 6V GND
WAVEFORM 1: PROPAGATION DELAY TIMES(f=1MHz; 50% duty cycle)
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WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
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TSSOP48 MECHANICAL DATA
mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0˚ 0.50 6.0 0.5 BSC 8˚ 0.75 0˚ 0.020 0.17 0.09 12.4 8.1 BSC 6.2 0.236 0.0197 BSC 8˚ 0.030 0.05 0.9 0.27 0.20 12.6 0.0067 0.0035 0.488 0.318 BSC 0.244 TYP MAX. 1.2 0.15 0.002 0.035 0.011 0.0079 0.496 MIN. TYP. MAX. 0.047 0.006 inch
A
A2 A1 b e K c L E
D
E1
PIN 1 IDENTIFICATION
1
7065588C
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Tape & Reel TSSOP48 MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 8.7 13.1 1.5 3.9 11.9 12.8 20.2 60 30.4 8.9 13.3 1.7 4.1 12.1 0.343 0.516 0.059 0.153 0.468 TYP MAX. 330 13.2 0.504 0.795 2.362 1.197 0.350 0.524 0.067 0.161 0.476 MIN. TYP. MAX. 12.992 0.519 inch
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