74VHC238MTR

74VHC238 3 TO 8 LINE DECODER ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 238 IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74VHC238 is an advanced high-speed CMOS 3 TO 8 LINE DECODER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. If the device is enabled, 3 binary select inputs (A, B, and C) determine which one of the outputs will go high. If enable input G1 is held low or either G2A or G2B is held high, decoding function is inhibited and all the 8 outputs go to low. SOP Table 1: Order Codes d o r P e t e l o T&R 74VHC238MTR 74VHC238TTR s b O Tree enable inputs are provided to ease cascade connection and application of address decoders for memory systems. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. ) (s t c u u d o r P e PACKAGE SOP TSSOP ) s ( ct TSSOP t e l o s b O Figure 1: Pin Connection And IEC Logic Symbols November 2004 Rev. 4 1/12 74VHC238 Figure 2: Input Equivalent Circuit Table 2: Pin Description PIN N° SYMBOL 1, 2, 3 4, 5 6 15, 14, 13, 12, 11, 10, 9, 7 8 16 A, B, C G2A, G2B G1 Y0 to Y7 GND VCC NAME AND FUNCTION Address Inputs Enable Inputs Enable Input Outputs Ground (0V) Positive Supply Voltage ) s ( ct Table 3: Truth Table u d o INPUTS OUTPUTS ENABLE G2B G2A G1 C B A Y0 Y1 Y2 Y3 X X H L L L L L L L L X H X L L L L L L L L L X X H H H H H H H H X X X L L L L H H H H X X X L L H H L L H H X X X L H L H L H L H L L L H L L L L L L L L L L L H L L L L L L L L L L L H L L L L L L L L L L L H L L L L Figure 3: Logic Diagram t e l o s b O This logic diagram has not be used to estimate propagation delays Y4 let o s b O ) s ( t c u d o r P e X : Don’t care 2/12 r P e SELECT L L L L L L L H L L L Y5 Y6 Y7 L L L L L L L L H L L L L L L L L L L L H L L L L L L L L L L L H 74VHC238 Table 4: Absolute Maximum Ratings Symbol VCC Parameter Supply Voltage VI DC Input Voltage VO DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Current Unit -0.5 to +7.0 V -0.5 to +7.0 V -0.5 to VCC + 0.5 - 20 V mA ± 20 mA ICC or IGND DC VCC or Ground Current Storage Temperature Tstg TL Value ± 25 mA ± 75 mA ) s ( ct -65 to +150 Lead Temperature (10 sec) 300 °C °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied Table 5: Recommended Operating Conditions Symbol VCC Unit 0 to 5.5 V 0 to VCC V -55 to 125 °C 0 to 100 0 to 20 ns/V Value let Supply Voltage Input Voltage VO Output Voltage Top Operating Temperature dt/dv r P e Parameter VI O ) o s b Input Rise and Fall Time (note 1) (VCC = 3.3 ± 0.3V) (VCC = 5.0 ± 0.5V) u d o 2 to 5.5 V s ( t c 1) VIN from 30% to 70% of VCC u d o r P e t e l o s b O 3/12 74VHC238 Table 6: DC Specifications Test Condition Symbol VIH Parameter VIL High Level Input Voltage VOH Low Level Input Voltage VOL High Level Output Voltage II Low Level Output Voltage ICC Input Leakage Current Quiescent Supply Current Value TA = 25°C VCC (V) Min. 2.0 3.0 to 5.5 2.0 3.0 to 5.5 Typ. Max. -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 1.5 1.5 0.7VCC 0.7VCC 0.7VCC Max. V 0.5 0.5 0.5 0.3VCC 0.3VCC 0.3VCC 2.0 IO=-50 µA 1.9 2.0 1.9 1.9 3.0 IO=-50 µA 2.9 3.0 2.9 2.9 4.5 IO=-50 µA 4.4 4.5 4.4 4.4 3.0 IO=-4 mA 2.58 2.48 2.4 4.5 IO=-8 mA 3.94 3.8 2.0 IO=50 µA 0.0 0.1 3.0 IO=50 µA 0.0 0.1 4.5 IO=50 µA 0.0 3.0 IO=4 mA 4.5 IO=8 mA 0 to 5.5 VI = 5.5V or GND 5.5 VI = VCC or GND t e l o 0.1 ) s ( ct u d o r P e V V 3.7 0.1 0.1 0.1 0.1 0.1 0.1 0.36 0.44 0.55 0.36 0.44 0.55 ± 0.1 ±1 ±1 µA 4 40 40 µA s b O ) (s Unit t c u V Table 7: AC Electrical Characteristics (Input tr = tf = 3ns) Symbol tPLH tPHL Parameter tPLH tPHL ol Propagation Delay Time A, B, C, to Y bs O ete Propagation Delay Time G1 to Y Pr VCC (V) Propagation Delay Time G2A, G2B to Y (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5V 4/12 CL (pF) Value TA = 25°C Min. -40 to 85°C -55 to 125°C Typ. Max. Min. Max. Min. Max. 3.3(*) 15 8.0 12.3 1.0 14.5 1.0 14.5 (*) 50 10.5 15.8 1.0 18.0 1.0 18.0 (**) 15 5.5 8.1 1.0 9.5 1.0 9.5 5.0(**) 50 7.0 10.1 1.0 11.5 1.0 11.5 3.3(*) 15 8.1 12.8 1.0 15.0 1.0 15.0 (*) 50 10.6 16.3 1.0 18.5 1.0 18.5 (**) 15 5.4 8.1 1.0 9.5 1.0 9.5 5.0(**) 50 6.9 10.1 1.0 11.5 1.0 11.5 3.3(*) 15 8.1 12.3 1.0 14.5 1.0 14.5 3.3(*) 50 10.6 15.8 1.0 18.0 1.0 18.0 5.0(**) 15 5.7 8.1 1.0 9.5 1.0 9.5 5.0(**) 50 7.2 10.1 1.0 11.5 1.0 11.5 3.3 5.0 3.3 5.0 tPLH tPHL od Test Condition Unit ns ns ns 74VHC238 Table 8: Capacitive Characteristics Test Condition Symbol Value TA = 25°C Parameter Min. Typ. Max. 10 CIN Input Capacitance 4 CPD Power Dissipation Capacitance (note 1) 18 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC ) s ( ct Figure 4: Test Circuit u d o r P e t e l o ) (s s b O t c u d o r CL =15/50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) P e Figure 5: Waveform - Propagation Delays For Inverting Outputs (f=1MHz; 50% duty cycle) t e l o s b O 5/12 74VHC238 Figure 6: Waveform 2: Propagation Delays For Non-inverting Outputs (f=1MHz; 50% duty cycle) ) s ( ct u d o r P e t e l o ) (s t c u d o r P e t e l o s b O 6/12 s b O 74VHC238 SO-16 MECHANICAL DATA mm. DIM. MIN. inch TYP MAX. A MIN. TYP. a1 1.75 MAX. 0.1 0.068 0.25 a2 0.004 0.010 1.64 0.063 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 c1 45° (typ.) D 9.8 10 0.385 E 5.8 6.2 0.228 e u d o 0.393 1.27 e3 ) s ( ct 0.019 Pr 0.050 e t e l 8.89 0.244 0.350 F 3.8 4.0 0.149 G 4.6 5.3 0.181 L 0.5 1.27 M 0.62 so 0.019 ) (s S b O 0.157 0.208 0.050 0.024 8° (max.) t c u d o r P e t e l o s b O 0016020D 7/12 74VHC238 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 c 0.09 0.20 0.004 D 4.9 5 5.1 0.193 E 6.2 6.4 6.6 0.244 E1 4.3 4.4 4.48 0.169 1 e K 0˚ L 0.45 A O ) 0.60 r P e 0.197 bs 8˚ 0.75 s ( t c u d o 0.0079 t e l o 0.65 BSC ) s ( ct 0.012 0.201 0.252 0.260 0.173 0.176 0.0256 BSC 0˚ 8˚ 0.018 0.024 0.030 u d o r P e A2 let A1 o s b b O e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 8/12 74VHC238 Tape & Reel SO-16 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A MIN. TYP. MAX. 330 13.2 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 0.504 0.519 ) s ( ct 22.4 0.882 Ao 6.45 6.65 0.254 Bo 10.3 10.5 0.406 Ko 2.1 2.3 0.082 Po 3.9 4.1 0.153 P 7.9 8.1 0.311 ) (s 0.262 ro P e let so b O du 0.414 0.090 0.161 0.319 t c u d o r P e t e l o s b O 9/12 74VHC238 Tape & Reel TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A TYP. MAX. 330 13.2 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 0.504 0.519 ) s ( ct 22.4 0.882 Ao 6.7 6.9 0.264 Bo 5.3 5.5 0.209 Ko 1.6 1.8 0.063 Po 3.9 4.1 0.153 P 7.9 8.1 0.311 ) (s t c u d o r P e t e l o s b O 10/12 MIN. 0.272 ro P e let so b O du 0.217 0.071 0.161 0.319 74VHC238 Table 9: Revision History Date Revision 12-Nov-2004 4 Description of Changes Order Codes Revision - pag. 1. ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 11/12 74VHC238 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. 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