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74VHCT16245ATTR

74VHCT16245ATTR

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    TSSOP48_12.5X6.1MM

  • 描述:

    IC TXRX NON-INVERT 5.5V 48TSSOP

  • 数据手册
  • 价格&库存
74VHCT16245ATTR 数据手册
74VHCT16245A 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS (NON INVERTED) s s s s s s s s s HIGH SPEED: tPD = 4.5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.9V (MAX.) TSSOP ORDER CODES PACKAGE TSSOP TUBE T&R 74VHCT16245ATTR PIN CONNECTION DESCRIPTION The 74VHCT16245A is an advanced high-speed CMOS 16-BIT BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. This IC is intended for two-way asynchronous communication between data busses; the direction of data transmission is determined by DIR input. The enable input G can be used to disable the device so that the busses are effectively isolated. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW. July 2003 1/10 74VCHT16245A INPUT EQUIVALENT CIRCUIT IEC LOGIC SYMBOLS PIN DESCRIPTION PIN No 1 2, 3, 5, 6, 8, 9, 11, 12 13, 14, 16, 17, 19, 20, 22, 23 24 25 36, 35, 33, 32, 30, 29, 27, 26 47, 46, 44, 43, 41, 40, 38, 38 48 4, 10, 15, 21, 28, 34, 39, 45 7, 18, 31, 42 SYMBOL NAME AND FUNCTION 1DIR Directional Control 1B1 to 1B8 Data Inputs/Outputs 2B1 to 2B8 Data Inputs/Outputs 2DIR Directional Control 2G Output Enable Input 2A1 to 2A8 Data Inputs/Outputs 1A1 to 1A8 Data Inputs/Outputs 1G GND VCC Output Enable Input Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS G L L H DIR L H X FUNCTION A BUS B BUS OUTPUT Yn A=B B=A Z OUTPUT INPUT INPUT OUTPUT Z Z X : Don‘t Care Z : High Impedance 2/10 74VCHT16245A ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VI/O VI/O IIK IOK IO Supply Voltage DC Input Voltage (DIR, G) DC BUS I/O Voltage (see note 1) DC BUS I/O Voltage (see note 2) DC Input Diode Current DC Output Diode Current DC Output Current Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 ± 20 ± 25 ± 75 -65 to +150 300 Unit V V V V mA mA mA mA °C °C ICC or IGND DC VCC or Ground Current Storage Temperature Tstg TL Lead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) Output in OFF State 2) High or Low State RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VI/O VI/O Top dt/dv Supply Voltage Input Voltage BUS I/O Voltage (see note 1) BUS I/O Voltage (see note 2) Operating Temperature Input Rise and Fall Time (see note 3) (VCC = 5.0 ± 0.5V) Parameter Value 4.5 to 5.5 0 to 5.5 0 to 5.5 0 to VCC -55 to 125 0 to 20 Unit V V V V °C ns/V 1) Output in OFF State 2) High or Low State 3) VIN from 0.8V to 2V 3/10 74VCHT16245A DC SPECIFICATIONS Test Condition Symbol Parameter VCC (V) 4.5 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.5 5.5 0 to 5.5 5.5 5.5 0 IO=-50 µA IO=-8 mA IO=50 µA IO=8 mA VI = VIH or VIL VO = 0V to 5.5V VI = 5.5V or GND VI = VCC or GND One Input at 3.4V, other input at VCC or GND VOUT = 5.5V TA = 25°C Min. 2 0.8 4.4 3.94 0.0 0.1 0.36 ±0.25 ± 0.1 4 1.35 0.5 4.5 4.4 3.8 0.1 0.44 ± 2.5 ± 1.0 40 1.5 5.0 Typ. Max. Value -40 to 85°C Min. 2 0.8 4.4 3.7 0.1 0.55 ± 2.5 ± 1.0 40 1.5 5.0 Max. -55 to 125°C Min. 2 0.8 Max. V V V V µA µA µA mA µA Unit VIH VIL VOH VOL Ioz High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current Additional Worst Case Supply Current Output Leakage Current II ICC ICC AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns) Test Condition Symbol Parameter VCC (*) CL (V) (pF) 5.0 5.0 5.0 5.0 5.0 5.0 15 50 15 50 50 50 RL = 1KΩ RL = 1KΩ TA = 25°C Min. Typ. 4.5 5.3 9.0 9.7 10.0 Max. 7.5 8.7 13.8 14.8 15.4 1.0 Value -40 to 85°C Min. 1.0 1.0 1.0 1.0 1.0 Max. 8.5 9.5 15.0 16.0 16.5 1.0 -55 to 125°C Min. 1.0 1.0 1.0 1.0 1.0 Max. 10.0 11.0 16.0 17.0 17.5 1.0 ns ns ns ns Unit tOSLH tOSHL (*) Voltage range is 5.0V ± 0.5V Note 1: Parameter guaranteed by design. tsoLH = |tpLHm - tpLHn|, tsoHL = |tpHLm - tpHLn| 4/10 + IOPD tPLH tPHL tPZL tPZH tPLZ tPHZ Propagation Delay Time Output Enable Time Output Disable Time Output to Output Skew Time (note 1) 74VCHT16245A CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter Min. CIN CI/O CPD Input Capacitance Bus Input Capacitance Power Dissipation Capacitance (note 1) TA = 25°C Typ. 6 8 18 Max. 10 Value -40 to 85°C Min. Max. 10 -55 to 125°C Min. Max. 10 pF pF pF Unit 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit) DYNAMIC SWITCHING CHARACTERISTICS Test Condition Symbol Parameter VCC (V) 5.0 TA = 25°C Min. Typ. 0.6 -0.9 CL = 50 pF 2.0 -0.6 V Max. 0.9 Value -40 to 85°C Min. Max. -55 to 125°C Min. Max. Unit VOLP VOLV VIHD VILD Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) 5.0 5.0 0.8 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.0V, (n-1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.0V. Inputs under test switching: 3.0V to threshold (V ILD), 0V to threshold (VIHD), f=1MHz. 5/10 74VCHT16245A TEST CIRCUIT TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ CL =15/ 50pF or equivalent (includes jig and probe capacitance) RL = R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω SWITCH Open VCC GND WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) 6/10 74VCHT16245A WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 7/10 74VCHT16245A TSSOP48 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0˚ 0.50 6.0 0.5 BSC 8˚ 0.75 0˚ 0.020 0.17 0.09 12.4 8.1 BSC 6.2 0.236 0.0197 BSC 8˚ 0.030 0.05 0.9 0.27 0.20 12.6 0.0067 0.0035 0.488 0.318 BSC 0.244 TYP MAX. 1.2 0.15 0.002 0.035 0.011 0.0079 0.496 MIN. TYP. MAX. 0.047 0.006 inch A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 7065588C 8/10 74VCHT16245A Tape & Reel TSSOP48 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 8.7 13.1 1.5 3.9 11.9 12.8 20.2 60 30.4 8.9 13.3 1.7 4.1 12.1 0.343 0.516 0.059 0.153 0.468 TYP MAX. 330 13.2 0.504 0.795 2.362 1.197 0.350 0.524 0.067 0.161 0.476 MIN. TYP. MAX. 12.992 0.519 inch 9/10 74VCHT16245A Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com 10/10
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