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EMIF06-HSD03F3

EMIF06-HSD03F3

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    FlipChip17

  • 描述:

    FILTER RLC 1NH/2.5PF ESD SMD

  • 数据手册
  • 价格&库存
EMIF06-HSD03F3 数据手册
EMIF06-HSD03F3 Datasheet 6-line low capacitance EMI filter array with integrated ESD protections for microSD CardTM Features • • • • • • • EMI filter with integrated ESD protection on each SD card pins in one easy routing package Very low line capacitance to compensate long PCB tracks Ultra-low leakage current at VRM: 20 nA max Very low PCB space consumption: 1.1 mm x 2.4 mm ECOPACK2 RoHS compliant component Benefits – Very good matching between lines thanks to proprietary solid-state silicon technology – Very low capacitance between lines to GND for optimized data integrity and speed – Enhanced ESD protection with fast response time and low clamping voltage: IEC 61000-4-2 level 4 compliance guaranteed at device level, hence greater immunity at system level – Integrated ESD protection of VCC and DET minimizes PCB space – Easy PCB routing thanks to flow-through package pinout Complies with following standards: – UL94, V0 – IEC 61000-4-2 exceeding level 4: ±18 kV (air discharge – Ix pins) – IEC 61000-4-2 exceeding level 4: ±18 kV (contact discharge – Ix pins) Applications Product status link EMIF06-HSD03F3 Product summary Order code EMIF06-HSD03F3 Package CSP P 0.4 mm Packing Tape and reel • • SD3.0, UHS-1 SDR104 (208 MHz) Secure Digital (SD) Memory Card Interfaces – Mobile phones – Digital still cameras – Portable electronic equipment – Navigation systems – Security cameras Description The EMIF06-HSD03F3 is a 6-line highly integrated low pass filter designed to suppress EMI / RFI noise for micro secure digital interface. This filter integrates ESD protection diodes, designed to protect sensitive devices from damage when subjected to ESD surges up 18 kV contact. The very low line capacitance ensures a high level of signal integrity without compromising protection of sensitive ICs against transient surge events. DS9928 - Rev 5 - June 2022 For further information contact your local STMicroelectronics sales office. www.st.com EMIF06-HSD03F3 Pin configuration and functions 1 Pin configuration and functions Table 1. Pin description Pin # Name Description A1 O1 Filtered line – IC side A3 I1 Filtered line – SD card side B2 VCC C1 O2 Filtered line – IC side C3 I2 Filtered line – SD card side D2 GND E1 O3 Filtered line – IC side E3 I3 Filtered line – SD card side F2 GND G1 O4 Filtered line – IC side G3 I4 Filtered line – SD card side H2 GND I1 O5 Filtered line – IC side I3 I5 Filtered line – SD card side J2 DET K1 O6 Filtered line – IC side K3 I6 Filtered line – SD card side Power supply input Ground Ground Ground Card detection pin Figure 1. Pinout (bump side) Note: DS9928 - Rev 5 For lower ground parasitics leading to better filtering performances and ESD robustness, GND bumps must be connected together on PCB. Ground loop inductance can be reduced by using multiple vias to make the connection to the ground plane. page 2/13 EMIF06-HSD03F3 Characteristics 2 Characteristics Table 2. Absolute maximum ratings (Tamb = 25 °C) Symbol Parameter Value Unit IEC 61000-4-2 level 4 - C = 150 pF, R = 330 Ω for IX pins: VPP Tj Peak pulse voltage Air discharge ±18 Contact discharge ±18 kV IEC 61000-4-2 level 4 - C = 150 pF, R = 330 Ω for OX pins: Air discharge ±10 Contact discharge ±10 Maximum junction temperature range 125 °C Top Maximum operating temperature range -40 to +125 °C Tstg Storage temperature range -55 to +150 °C Figure 2. Electrical characteristics (definitions) Table 3. Electrical characteristics (Tamb = 25 °C) Symbol Parameter Test conditions Min. Typ. Max. Unit VRM Reverse stand-off voltage IRM Reverse leakage current at VRM VRM = 3.0 V per line VBR Reverse breakdown voltage IBR = 1 mA RI/O Serial resistance Between any Ix and Ox 1.0 Ω L(1) Serial inductance Between any Ix and Ox 1.0 nH VCL(1) ESD clamping voltage IEC 61000-4-2–C = 150 pF, R = 330 Ω, +8 kV contact discharge, measured at 30 ns 18.5 V RD(1) Dynamic resistance Tp = 100ns IO-GND (positive polarity) 650 mΩ GND-IO (negative polarity) 320 mΩ Line capacitance between Ix/Ox / GND VR = 0 V, 1 MHz, VOSC = 30 mV 2.5 CVCC-GND(1) Line capacitance between VCC / GND VR = 0 V, 1 MHz, VOSC = 30 mV 40 pF CDET-GND(1) Line capacitance between DET / GND VR = 0 V, 1 MHz, VOSC = 30 mV 40 pF CI/O-GND(1) 5 3 V 20 nA 9 V 3.0 pF 1. Specified by design, not tested in production. DS9928 - Rev 5 page 3/13 EMIF06-HSD03F3 Characteristics (curves) 2.1 Characteristics (curves) Figure 3. Insertion Loss (S21) - I/Os Figure 5. Digital crosstalk I6-O1 Figure 4. Insertion Loss (S21) - Vcc, DET Figure 6. Analog crosstalk versus frequency Figure 7. TLP characteristic DS9928 - Rev 5 page 4/13 EMIF06-HSD03F3 Characteristics (curves) Figure 8. Response to IEC61000-4-2 – Ix pins (+8 kV contact) Figure 9. Response to IEC61000-4-2 – Ix pins (-8 kV contact) Figure 10. Response to IEC61000-4-2 – DET pin (+8 kV contact) Figure 11. Response to IEC61000-4-2 – DET pin (-8 kV contact) DS9928 - Rev 5 page 5/13 EMIF06-HSD03F3 Technical information 3 Technical information 3.1 Application diagram Figure 12. Layout recommendation Note: More information is available in the application notes: • • DS9928 - Rev 5 AN1751, “EMI filters: recommendations and measurements” AN4541: “EMI Filters for SD3.0 card: High speed SD card protection and filtering devices” page 6/13 EMIF06-HSD03F3 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 4.1 Chip scale package (CSP) pitch 0.4 mm package information • Epoxy meets UL94, V0 Figure 13. Chip scale package (CSP) pitch 0.4 mm package outline Table 4. Chip scale package (CSP) pitch 0.4 mm package mechanical data Dimensions Millimeters Ref. Min. Typ. Max. A 0.560 0.605 0.650 A1 0.180 0.205 0.230 A2 0.380 0.400 0.420 b 0.230 0.250 0.290 D 1.060 1.100 1.140 D1 0.692 SD 0.346 E 2.360 2.40 E1 2.00 SE 0.200 e 0.400 fD 0.194 0.204 0.214 fE 0.190 0.200 0.210 ccc DS9928 - Rev 5 2.440 0.075 page 7/13 EMIF06-HSD03F3 Chip scale package (CSP) pitch 0.4 mm package information Figure 14. Footprint recommendations Figure 16. Package orientation in reel Figure 18. 7'' reel dimension values DS9928 - Rev 5 Figure 15. Marking Figure 17. Tape and reel orientation Figure 19. Inner box dimensions (mm) page 8/13 EMIF06-HSD03F3 Chip scale package (CSP) pitch 0.4 mm package information Figure 20. Tape and reel outline Table 5. Tape dimension values Dimensions Millimeters Ref. Min. Typ. Max. D0 1.45 1.50 1.60 D1 0.35 0.40 0.45 F 3.45 3.50 3.55 K0 0.64 0.69 0.74 P0 3.90 4.00 4.10 P1 3.90 4.00 4.10 P2 1.95 2.00 2.05 W 7.90 8.00 8.30 Figure 21. Tape leader and trailer dimensions DS9928 - Rev 5 page 9/13 EMIF06-HSD03F3 Recommendation on PCB assembly 5 Recommendation on PCB assembly 5.1 Reflow profile Figure 22. ST ECOPACK® recommended soldering reflow profile for PCB mounting 250 240-245 °C Temperature (°C) -2 °C/s 2 - 3 °C/s 60 sec (90 max) 200 -3 °C/s 150 -6 °C/s 100 0.9 °C/s 50 Time (s) 0 Note: DS9928 - Rev 5 30 60 90 120 150 180 210 240 270 300 Minimize air convection currents in the reflow oven to avoid component movement. Maximum soldering profile corresponds to the latest IPC/JEDEC J-STD-020. page 10/13 EMIF06-HSD03F3 Ordering information 6 Ordering information Figure 23. Ordering information scheme Table 6. Ordering information Part number Marking Package Weight Base qty. Delivery mode EMIF06-HSD03F3 KK(1) CSP P 0.4 mm 3.4 mg 5000 Tape and reel (7”) 1. The marking can be rotated by multiples of 90° to differentiate assembly locations. DS9928 - Rev 5 page 11/13 EMIF06-HSD03F3 Revision history Table 7. Document revision history DS9928 - Rev 5 Date Version Changes 19-Nov-2013 1 Initial release. 09-Jan-2014 2 Corrected typographical error. 06-Jan-2015 3 Added mention for new AN4541. 06-Oct-2016 4 Updated Figure 1. Pin configuration (bump side). 10-Jun-2022 5 Updated Section 4.1 Chip scale package (CSP) pitch 0.4 mm package information. Minor text changes. page 12/13 EMIF06-HSD03F3 IMPORTANT NOTICE – READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgment. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2022 STMicroelectronics – All rights reserved DS9928 - Rev 5 page 13/13
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