ESDA5-1BF4

ESDA5-1BF4 Low clamping single line bidirectional ESD protection Datasheet - production data Features d Low clamping voltage: 11 V (IEC 61000-4-2 contact discharge 8 kV at 30 ns) d Bidirectional device d Low leakage current d 0201 package d Ultra low PCB area: 0.18 mm2 d ECOPACK®2 compliant component Complies with the following standards TEGOEKI Figure 1. Functional diagram d IEC 61000-4-2: – ±15 kV (air discharge) – ±8 kV (contact discharge) Applications Where transient over voltage protection in ESD sensitive equipment is required, such as: d Smartphones, mobile phones and accessories d Tablet, PC, netbooks and notebooks d Portable multimedia devices and accessories d Digital cameras and camcorders d Communication and highly integrated systems Description The ESDA5-1BF4 is a bidirectional single line TVS diode designed to protect the data line or other I/O ports against ESD transients. The device is ideal for applications where both reduced line capacitance and board space saving are required. April 2014 This is information on a product in full production. DocID025812 Rev 1 1/10 www.st.com Characteristics 1 ESDA5-1BF4 Characteristics Table 1. Absolute maximum ratings Symbol Parameter Value Unit 30 30 kV IEC 61000-4-2 contact discharge IEC 61000-4-2 air discharge VPP (1) Peak pulse voltage PPP(1) Peak pulse power (8/20 µs) 110 W IPP(1) Peak pulse current (8/20 µs) 10 A Operating junction temperature range -40 to 150 °C Tstg Storage temperature range -65 to +150 °C TL Maximum lead temperature for soldering during 10 s 260 °C Tj 1. For a surge greater than the maximum values, the diode will fail in short-circuit. Figure 2. Electrical characteristics (definitions) 7]QFSP :&6 :'0 -61 :61 -44 6H 8 ! ! ! ! ! 4EVEQIXIV &VIEOHS[RZSPXEKI 'PEQTMRKZSPXEKI 0IEOEKIGYVVIRX$ :61 7XERHSJJZSPXEKI 4IEOTYPWIGYVVIRX ! ! (]REQMGVIWMWXERGI :SPXEKIXIQTIVEXYVI ' 0-2) ! -6 ! 0MRIGETEGMXERGI &VIEOHS[RGYVVIRX :'0 :'0 7PSTI 6H -44 Table 2. Electrical characteristics (values, Tamb = 25 °C) Value Symbol Min. Typ. Max. VBR IR = 1 mA IRM VRM = 5 V VCL 8 kV contact discharge after 30 ns, IEC 61000-4-2 11 V VLINE= 0 V, F = 1 MHz, VOSC = 30 mV 45 pF CLINE 2/10 Unit Test conditions 5.8 V 100 DocID025812 Rev 1 nA ESDA5-1BF4 Characteristics Figure 3. Leakage current versus junction temperature (typical values) Figure 4. Junction capacitance versus applied voltage (typical values) -6 R% 'T*   :6 !:61 !: 8N !”' *!1L^ :37' !Q:       8N ”'        Figure 5. ESD response to IEC 61000-4-2 (+8 kV contact discharge)         Figure 6. ESD response to IEC 61000-4-2 (-8 kV contact discharge) :HMZ :HMZ  :'04IEOGPEQTMRKZSPXEKI  :'0 GPEQTMRKZSPXEKIEXRW  :'0 GPEQTMRKZSPXEKIEXRW  :'0 GPEQTMRKZSPXEKIEXRW  :  :  :  :  :  :   :     :'04IEOGPEQTMRKZSPXEKI :'0 GPEQTMRKZSPXEKIEXRW :'0 GPEQTMRKZSPXEKIEXRW :'0 GPEQTMRKZSPXEKIEXRW RWHMZ RWHMZ Figure 7. Dynamic resistance Figure 8. S21 attenuation measurement result  -44 %  7H&         4SWMXMZITSPEVMX] 2IKEXMZITSPEVMX]    :'0 :      *,^  / 1 1 1 + + )7(%&* DocID025812 Rev 1 3/10 10 Package information 2 ESDA5-1BF4 Package information d Epoxy meets UL94, V0 d Lead-free package In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 9. 0201 package dimension definitions ( ) 8ST % 7MHI J( ( J) ) &SXXSQ F Table 3. 0201 package dimension values Dimensions Ref. Millimeters Min. Max. Min. Typ. Max. 0.0126 A 0.28 0.3 0.32 0.0110 0.0118 b 0.125 0.14 0.155 0.0049 0.0055 0.0061 D 0.57 0.6 0.63 0.0224 0.0236 0.0248 D1 4/10 Typ. Inches 0.35 0.0138 E 0.27 0.3 0.33 0.0106 0.0118 0.0130 E1 0.175 0.19 0.205 0.0069 0.0075 0.0081 fD 0.065 0.08 0.095 0.0026 0.0031 0.0037 fE 0.11 0.125 0.13 0.0043 0.0049 0.0051 DocID025812 Rev 1 ESDA5-1BF4 Package information Figure 10. Footprint in mm (inches)     Figure 11. Marking   4MR 4MR     Note: The marking codes can be rotated by 90° or 180° to differentiate assembly location.In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. Figure 12. Tape and reel specification &EVMRHMGEXIW4MR  •  • ¼•   •  •  • %PPHMQIRWMSRWMRQQ 9WIVHMVIGXMSRSJYRVIIPMRK DocID025812 Rev 1 5/10 10 Recommendation on PCB assembly ESDA5-1BF4 3 Recommendation on PCB assembly 3.1 Stencil opening design 1. General recommendations on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness). Figure 13. Stencil opening dimensions 0 8 b) ; General design rule Stencil thickness (T) = 75 ~ 125 µm W Aspect Ratio = ----- 1,5 T L»W Aspect Area = ---------------------------2T  L + W 2. 0,66 Recommended stencil window a) Stencil opening thickness: 80 µm b) Other dimensions: see Figure 14 Figure 14. Recommended stencil window position, stencil opening thickness: 80 µm                 QQ MRGLIW *SSXTVMRX 6/10 DocID025812 Rev 1 7XIRGMP[MRHS[ ESDA5-1BF4 3.2 3.3 3.4 Recommendation on PCB assembly Solder paste 1. Use halide-free flux, qualification ROL0 according to ANSI/J-STD-004. 2. “No clean” solder paste recommended. 3. Offers a high tack force to resist component displacement during PCB movement. 4. Use solder paste with fine particles: Type 4 (powder particle size 20-48 µm per IPC J STD-005). Placement 1. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering. 3. Standard tolerance of ± 0.05 mm is recommended. 4. 1.0 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. PCB design preference 1. To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. DocID025812 Rev 1 7/10 10 Recommendation on PCB assembly 3.5 ESDA5-1BF4 Reflow profile Figure 15. ST ECOPACK® recommended soldering reflow profile for PCB mounting ”' 8IQTIVEXYVI”'   ”'W ”'W  WIG  QE\   ”'W   ”'W  ”'W  8MQIW Note: 8/10 Minimize air convection currents in the reflow oven to avoid component movement. DocID025812 Rev 1 ESDA5-1BF4 4 Ordering information Ordering information Figure 16. Ordering information scheme )7(%&* )7(%EVVE] &VIEOHS[RZSPXEKI ! :QMR 2YQFIVSJPMRIW (MVIGXMSREP &!&MHMVIGXMSREP 4EGOEKI *! Table 4. Ordering information Order code Marking Package Weight Base qty Delivery mode ESDA5-1BF4 5(1) 0201 0.116 mg 15000 Tape and reel 1. The marking codes can be rotated by 90° or 180° to differentiate assembly location 5 Revision history Table 5. Document revision history Date Revision 07-Apr-2014 1 Changes First issue DocID025812 Rev 1 9/10 10 ESDA5-1BF4 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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