HCF4518BEY

HCF4518B DUAL BCD UP COUNTER ■ ■ ■ ■ ■ ■ ■ ■ MEDIUM SPEED OPERATION : 6MHz (Typ.) at 10V POSITIVE -OR NEGATIVE- EDGE TRIGGERING SYNCHRONOUS INTERNAL CARRY PROPAGATION QUIESCENT CURRENT SPECIF. UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B "STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES" DESCRIPTION HCF4518B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. HCF4518B Dual BCD Up Counter consists of two identical, internal 4 stage counters. The counter stages are D-type Flip-Flops having interchangeable Clock and Enable lines for ) s ( ct DIP SOP ORDER CODES PACKAGE TUBE DIP SOP HCF4518BEY HCF4518BM1 ) s t( T&R c u d HCF4518M013TR o r P incrementing on either the positive-going or negative going transitions. For single-unit operations the Enable input is maintained High and the counter advances on each positive going transition of the Clock. The counters are cleared by high levels on their Reset lines. The counter can be cascaded in the ripple mode by connecting Q4 to the enable input of the subsequent counter while the clock input of the latter is held low. e t le o s b O - u d o r P e t e l o PIN CONNECTION s b O October 2002 1/11 HCF4518B IINPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1 2 7 3, 4, 5, 6 9 10 15 11,12,13,14 8 CLOCK A ENABLE A RESET A Q1A to Q4A CLOCK B ENABLE B RESET B Q1B to Q4B VSS 16 VDD Clock A input Enable A Input Reset A Input Data Outputs Clock B input Enable B Input Reset B Input Data Outputs Negative Supply Voltage Positive Supply Voltage FUNCTIONAL DIAGRAM c u d e t le TRUTH TABLE u d o CLOCK r P e L t e l o bs O o s b O RESET ACTION H L INCREMENT COUNTER L INCREMENT COUNTER L NO CHANGE L NO CHANGE L NO CHANGE L NO CHANGE H Q1 THRU Q4 = 0 X L H X o r P ENABLE X X : Don’t Care 2/11 ) s ( ct ) s t( X HCF4518B LOGIC DIAGRAM c u d e t le TIMING CHART ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O 3/11 HCF4518B ABSOLUTE MAXIMUM RATINGS Symbol VDD Parameter Supply Voltage VI DC Input Voltage II DC Input Current PD Value Unit -0.5 to +22 V -0.5 to VDD + 0.5 ± 10 V mA 200 100 mW mW Top Power Dissipation per Package Power Dissipation per Output Transistor Operating Temperature -55 to +125 °C Tstg Storage Temperature -65 to +150 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to VSS pin voltage. RECOMMENDED OPERATING CONDITIONS Symbol VDD Parameter Value Supply Voltage 3 to 20 VI Input Voltage Top Operating Temperature 0 to VDD c u d -55 to 125 e t le ) s ( ct u d o r P e t e l o s b O 4/11 o s b O - o r P Unit ) s t( V V °C HCF4518B DC SPECIFICATIONS Test Condition Symbol IL Parameter Quiescent Current 0/5 0/10 0/15 0/20 0/5 0/10 0/15 5/0 10/0 15/0 High Level Output Voltage VOH Low Level Output Voltage VOL High Level Input Voltage VIH Low Level Input Voltage VIL Output Drive Current IOH 0/5 0/5 0/10 0/15 0/5 0/10 0/15 Output Sink Current IOL Input Leakage Current Input Capacitance II CI VO (V) VI (V) 0.5/4.5 1/9 1.5/13.5 4.5/0.5 9/1 13.5/1.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 |IO| VDD (µA) (V)