L4925

L4925 Very low drop voltage regulator Features ■ Operating DC supply voltage range 6 V to 28 V ■ Transient supply voltage up to 40 V ■ Extremely low quiescent current ■ High precision output voltage ■ Output current capability up to 500 mA ■ Very low dropout voltage less than 0.6 V ■ Reset circuit sensing the output voltage ■ Programmable reset pulse delay with external capacitor ■ Thermal shutdown and short circuit protections PowerSO-20 Description The L4925 is a monolithic integrated 5 V voltage regulator with a very low dropout output and additional functions such as power-on reset and programmable reset delay time. It is designed for supplying microcomputer controlled systems especially in automotive applications. Table 1. Device summary Order codes Package PowerSO-20 September 2013 Doc ID 1770 Rev 8 Tube Tape and reel L4925PD L4925PD013TR 1/14 www.st.com 1 Contents L4925 Contents 1 Block and pin connections diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 2 3 4 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2 Reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1 Supply voltage transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.2 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 Package Informations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/14 Doc ID 1770 Rev 8 L4925 List of tables List of tables Table 2. Table 3. Table 4. Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Doc ID 1770 Rev 8 3/14 List of figures L4925 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. 4/14 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 PowerSO-20 pin connections (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Foldback characteristics of VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Output voltage vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Quiescent current vs supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Block circuit diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Reset output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Application circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 PowerSO-20 mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Doc ID 1770 Rev 8 L4925 1 Block and pin connections diagrams Block and pin connections diagrams Figure 1. Block diagram VO Vz PREREGULATOR 5V VREF 1.23V L4925 CT VS Vz CS RES 2μ + - = 2V GND REG RESET D95AT151 Figure 2. PowerSO-20 pin connections (top view) Connected to pin 1-10-11-20 GND 1 20 GND N.C. 2 19 N.C. VS 3 18 N.C. VS 4 17 VOUT N.C. 5 16 VOUT N.C. 6 15 N.C. RES 7 14 CT N.C. 8 13 N.C. N.C. 9 12 N.C. GND 10 11 GND D95AT152 1.1 Thermal data Table 2. Symbol Rth(j-amb) Rth(j-c) Thermal data Parameter Thermal resistance junction to ambient Thermal resistance junction to case (max) Doc ID 1770 Rev 8 PowerSO-20 Unit 15 to 60 °C/W 3.5 °C/W 5/14 Electrical specifications L4925 2 Electrical specifications 2.1 Absolute maximum ratings Table 3. Absolute maximum ratings Symbol Parameter Value Unit VSDC DC operating supply voltage 28 V VSTR Transient supply voltage (t < 1s) 40 V IO Output current internally limited VO Output voltage 20 V VRES Output voltage 20 V IRES Output current 5 mA Tstg Storage temperature -55 to 150 C Operating junction temperature -40 to 150 C 165 C Tj Tj-SD Thermal shutdown-junction temperature Note: The circuit is ESD protected according to MIL-STD-883C. According to ISO/DIS 7637 the transients must be clamped with external circuitry (see Application Circuit). 2.2 Electrical characteristics VS =14 V; Tj = –40 to 125 °C unless otherwise specified. Table 4. Symbol Electrical characteristics Parameter Test condition VO Output voltage VI = 6 to 28 V; IO = 1 to 500 mA VO Output voltage VI = 35 V; T < 1 s; IO = 1 to 500 mA VDP Dropout voltage VIO Input to output voltage difference in undervoltage condition VOL VOLO Typ. Max. Unit 4.90 5 5.10 V 5.50 V IO = 100 mA 0.2 0.3 V IO = 500 mA 0.3 0.6 V VI = 4 V; IO = 100 mA 0.5 V Line regulation VI = 6 to 28 V; IO = 1 to 1 mA 10 mV Load regulation IO = 1 to 500 mA 50 mV 1500 mA ILIM Current limit IQSE IQ 6/14 Min. VO = 4.5 V; 550 1000 VO = 0; Foldback characteristic 250 Quiescent current IO = 0.3 mA 190 Quiescent current IO = 500 mA Doc ID 1770 Rev 8 mA 360 µA 20 mA L4925 Table 4. Symbol Electrical specifications Electrical characteristics (continued) Parameter Test condition Min. Typ. Max. Unit 4.8 V Reset VRT Reset threshold voltage 4.2 VRTH Reset threshold 50 100 200 mV 60 100 140 ms 5 30 µs 0.4 V 1 µA tRD Reset pulse delay CT = 100 nF; tR 100 µs tRR Reset reaction time CT = 100 nF; VRL Reset output low voltage RRES = 10 Kto VO; VS = 3 V IRH Reset output high leakage current VRES = 5 V VCTth Delay comparator threshold 2 V VCTth hy Delay comparator threshold hysteresis 200 mV Doc ID 1770 Rev 8 7/14 Functional description 3 L4925 Functional description The L4925 is a monolithic integrated voltage regulator, based on the STM modular voltage regulator approach. Several outstanding features and auxiliary functions are implemented to meet the requirements of supplying microprocessor systems in automotive applications. Nevertheless, it is suitable also in other applications where the present functions are required. The modular approach of this device allows to get easily also other features and functions when required. 3.1 Voltage regulator The voltage regulator uses an Isolated Collector Vertical PNP transistor as a regulating element. With this structure very low dropout voltage at currents up to 500 mA is obtained. Figure 3. Foldback characteristics of VO The dropout operation of the standby regulator is maintained down to 3 V input supply voltage. The output voltage is regulated up to the transient input supply voltage of 35 V. With this feature no functional interruption due to overvoltage pulses is generated. The typical curve showing the standby output voltage as a function of the input supply voltage is shown in Figure 4. The current consumption of the device (quiescent current) is less than 250 µA. To reduce the quiescent current peak in the undervoltage region and to improve the transient response in this region, the dropout voltage is controlled. The quiescent current as a function of the supply input voltage is shown in Figure 5. 8/14 Doc ID 1770 Rev 8 L4925 3.2 Functional description Figure 4. Output voltage vs input voltage Figure 5. Quiescent current vs supply voltage Reset circuit The block circuit diagram of the reset circuit is shown in Figure 6. The reset circuit supervises the output voltage. The reset threshold of 4.5 V is defined with the internal reference voltage and standby output divider. The reset pulse delay time tRD, is defined with the charge time of an external capacitor CT: C T  2V t RD = ------------------2A The reaction time of the reset circuit originates from the discharge time limitation of the reset capacitor CT and it is proportional to the value of CT. The reaction time of the reset circuit increases the noise immunity. Standby output voltage drops below the reset threshold only a bit longer than the reaction time results in a shorter reset delay time. The nominal reset delay time is generated for standby output voltage drops longer than approximately 50 ms. The typical reset output waveforms are shown in Figure 7. Doc ID 1770 Rev 8 9/14 Functional description 10/14 L4925 Figure 6. Block circuit diagram Figure 7. Reset output waveforms Doc ID 1770 Rev 8 L4925 Application information 4 Application information 4.1 Supply voltage transients High supply voltage transients can cause a reset output signal disturbance. For supply voltage greater than 8 V the circuit shows a high immunity of the reset output against supply transients of more than 100 V/ms. For supply voltage lower than 8 V, supply transients of more than 0.4 V/ms. can cause a reset signal disturbance. 4.2 Application circuit Figure 8. Application circuit diagram Vo Vz PREREGULATOR 5V VBAT VS VREF 1.23V Co L4925 CT Vz CS RES 2μ + Vout RES = 2V GND REG RESET D95AT153 For stability: CS  1 µF; CO  10 µF; ESR  2.5  at 10 KHz Recommended for application: CS = CO = 10 µF to 100 µF Doc ID 1770 Rev 8 11/14 Package Informations L4925 5 Package Informations Figure 9. PowerSO-20 mechanical data and package dimensions DIM. mm MIN. TYP. A a1 inch MAX. MIN. TYP. 3.6 0.1 0.3 a2 0.142 0.004 0.012 3.3 a3 0.130 0 0.1 0.000 0.004 b 0.4 0.53 0.016 0.021 c 0.23 0.32 0.009 0.013 D (1) 15.8 16 0.622 0.630 D1 (2) 9.4 9.8 0.370 0.386 E 13.9 14.5 0.547 e 1.27 e3 E1 (1) E3 0.570 0.450 11.1 E2 0.429 0.437 0.228 0.244 2.9 5.8 6.2 0.114 G 0 0.1 0.000 0.004 H 15.5 15.9 0.610 0.626 0.8 1.1 0.031 0.043 h L 1.1 0.043 N 8˚(typ.) S 8˚(max. ) T Weight: 1.9gr 0.050 11.43 10.9 OUTLINE AND MECHANICAL DATA MAX. 10 JEDEC MO-166 0.394 PowerSO-20 (1) “D and E1” do not include mold flash or protusions. - Mold flash or protusions shall not exceed 0.15mm (0.006”) - Critical dimensions: “E”, “G” and “a3”. (2) For subcontractors, the limit is the one quoted in jedec MO-166 N R N a2 b A e DETAIL A c a1 DETAIL B E e3 H DETAIL A lead D slug a3 DETAIL B 20 11 0.35 Gage Plane -C- S SEATING PLANE L G E2 E1 BOTTOM VIEW C (COPLANARITY) T E3 1 h x 45˚ 1 0 PSO20MEC D1 0056635 I 12/14 Doc ID 1770 Rev 8 L4925 6 Revision history Revision history Table 5. Document revision history Date Revision Changes 01-Oct-2003 4 First issue in EDOCD DMS 18-Nov-2005 5 Added GND pins to fig. 4 Added order code and changed the formatting style in compliance with the new template 03-Feb-2006 6 Reset Threshold Voltage changed from 4.5V / 5.2V (min/max) to 4.2V / 4.8V on Table 4. 09-Feb-2010 7 Reformatted entire document. Removed PENTAWATT package Updated Table 2: Thermal data 20-Sep-2013 8 Updated disclaimer. Doc ID 1770 Rev 8 13/14 L4925 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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