L4938E/ED
L4938EPD
®
ADVANCED VOLTAGE REGULATOR
ENABLE AND SENSE INPUTS (EN, SI) PROTECTED AGAINST NEGATIVE TRANSIENTS
DOWN TO -5V
RESET THRESHOLD ADJUSTABLE FROM
3.8 TO 4.7V
EXTREMELY LOW QUIESCENT CURRENT,
65µA (LESS THAN 90µA) IN STANDBY
MODE
OPERATING DC SUPPLY VOLTAGE RANGE
5V - 28V
OPERATING TRANSIENT SUPPLY VOLTAGE UP TO 40V
HIGH PRECISION STANDBY OUTPUT VOLTAGE 5V ± 1% WITH 100mA CURRENT CAPABILITY
OUTPUT 2 VOLTAGE 5V ± 2% WITH 400mA
CURRENT CAPABILITY (ADJ WIRED TO
VOUT2)
OUTPUT 2 VOLTAGE ADJUSTABLE BY EXTERNAL VOLTAGE DIVIDER
OUTPUT 2 DISABLE FUNCTION FOR
STANDBY MODE
)
s
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ct
PIN CONNECTIONS
PR
r
P
e
1
16
t
e
l
o
CT
u
d
o
2
SI
DIP (12+2+2)
SO20 (12+4+4)
PowerSO20
c
u
d
)
s
t(
ORDERING NUMBERS: L4938E (DIP)
L4938ED (SO)
L4938EPD (PSO)
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P
DESCRIPTION
The L4938E/ED/EPD is a monolithic integrated
dual voltage regulator with two very low dropout
outputs and additional functions as power-on reset and input voltage sense. It is designed for
supplying the microcomputer controlled systems
especially in automotive applications.
e
t
le
o
s
b
O
-
PR
1
20
SI
CT
2
19
VS1
GND
1
20
GND
N.C.
2
19
N.C.
OUT2
15
VS1
EN
3
18
VS2
3
18
14
VS2
VS2
GND
4
17
GND
VS1
4
17
ADJ
4
13
GND
GND
5
16
GND
SI
5
16
OUT1
5
12
GND
GND
6
15
GND
PR
6
15
SO
6
11
N.C.
GND
7
14
GND
CT
7
14
RESET
SO
7
10
OUT2
RES
8
13
N.C.
EN
8
13
N.C.
OUT1
8
9
SO
9
12
OUT2
N.C.
9
12
N.C.
11
ADJ
GND
10
11
GND
EN
GND
bs
GND
O
RES
3
D94AT075A
ADJ
OUT1
10
D94AT076A
DIP (12+2+2)
February 1999
SO (12+4+4)
L4938EPD
PowerSO20
1/12
L4938E - L4938ED - L4938EPD
ABSOLUTE MAXIMUM RATINGS
Symbol
VINDC
VINTR
IO
VSI
ISI
VEN
IEN
VRES , VSO
IRES , ISO
PO
Tstg
Tj
TJSD
Parameter
DC Operating Supply Voltage
Transient Operating Supply Voltage (T < 400ms)
Output Current
Sense Input Voltage (Voltage Forced) (note 2)
Sense Input Current (Current Forced) (note 2)
Enable Input Voltage (Voltage Forced) (note 2)
Sense Input Current (Current Forced) (note 2)
Output Voltages
Output Currents (Output Low)
Power Dissipation at Tamb = 80°C (note 3)
Powerdip 12+2+2
Storage Temperature
Operating Junction Temperature
Thermal shutdown junction temperature Output 2 will shut-down
typically at Tj 10K lower than output 1
Value
28
-14 to 40
internally limited
-20 to 20
±1
-20 to 20
±1
-0.3 to 20
5
875
Unit
V
V
-65 to 150
-40 to 150
165
°C
°C
°C
Note 1: The circuit is ESD protected according to MIL-STD-883C
Note 2: Current forced means voltage unlimited but current limited to the specified value
Voltage forced means voltage limited to the specified valueswhile the current is not limited
Note 3: Typical value soldered on a PC board with 8cm 2 copper ground plane (35mm thick).
BLOCK DIAGRAM
e
t
le
c
u
d
b
O
-
1.23V
)
s
(
ct
REG1
VS2
u
d
o
EN
r
P
e
OUT1
REFERENCE
OUT2
ADJ
1.23V
REG2
t
e
l
o
1.23V
s
b
O
)
s
t(
o
r
P
so
VS1
V
mA
V
mA
V
mA
mW
CT
RES
PR
1.4V
RESET
SO
SI
1.23V
SENSE
GND
D94AT074A
2/12
L4938E - L4938ED - L4938EPD
THERMAL DATA
Symbol
Parameter
DIP 12+2+2 SO 12+4+4 PowerSO20
Rth j-amb
Thermal Resistance Junction to ambient
Rth j-case
Thermal Resistance Junction to case
Unit
40
50
-
°C/W
-
-
1.3V
TJ < 85°C; RPR = 0
Enable = LOW; VS = 6 to 28V;
I02 = 5 to 400mA
IOUT2 = 100mA
IOUT2 = 400mA; VS = 4.8V
IOUT1 = 5 to 400mA
(after regulation setting)
V02 = 0.8 to 4.5V
IOUT1 = 100mA; IOUT2 = 400mA
Min.
Typ.
Max.
Unit
4.9
5
5.1
V
4.8
5
0.1
0.2
5.2
0.2
0.4
25
V
V
V
mV
100
200
65
400
90
mA
µA
µA
75
4.9
60
450
5.1
V
0.2
0.3
0.3
0.6
50
V
V
mV
100
650
150
1300
20
mA
mA
mA
20
mV
OUT1, OUT 2
VOLi 1,2
Line Regulation
VS = 6 to 28V; IO1 = 1mA,
IO2 = 5mA,
(after regulation setting)
3/12
L4938E - L4938ED - L4938EPD
ELECTRICAL CHARACTERISTICS (Continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
1
V
ENABLE INPUT
VENL
Enable Input Low Voltage
(Output 2 Active)
-20
VENH
VENhyst
Enable Input High Voltage
1.4
20
V
Enable Hysteresis
Enable Input Current Low
VEN = 0
20
-20
30
-8
60
-3
mV
µA
Enable Input Current High
VEN = 1.1 to 7V; T J < 130°C;
-1
0
1
µA
VEN = 1.1 to 7V;
TJ = 130 to 150°C;
-10
0
10
µA
IEN LOW
IEN HIGH
RESET CIRCUIT
RPR = ∞
4.5
3.65
3.8
3.95
V
Reset Theresold Hysteresis
Reset Pulse Delay
RPR = 0
RPR = ∞
CRES = 47nF; t r ≤ 30µs; (note 5)
30
40
60
60
120
100
mV
ms
Reset Pulse Delay
CRES = 47nF; (note 6)
60
100
140
ms
tRR
ICT
Reset Reaction Time
Pull Down Capability of the
Discharge circuit
CRES = 47nF
VOUT1 < VRT
10
3
50
6
150
15
uc
µs
mA
ICT
Charge Current
Reset Output Low Voltage
VOUT1 > VRT
R RES = 10KΩ to VOUT1
VOUT1 ≥ 1.5V
-1
0.7
µA
0.4
V
Reset Output High Leakage
current
VRES = 5V
1
µA
VRT
VRTH
tRD min
tRD nom
VRESL
VRESH
Reset Theresold Voltage
(note4)
SENSE COMPARATOR
VSI
VSIT
Functional Range
Sense Threshold Voltage
VSITH
VSOL
Sense Threshold Hysteresis
Sense Output Low Voltage
ISOH
Sense Output Leakage
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r
P
e
c
u
d
ISI HIGH
Sense Input Current High
ISI LOW
Sense Input Current Low
t
e
l
o
d
o
r
-1.3
P
e
let
o
s
b
O
-
Falling Edge; TJ
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