L5962

L5962 Multiple linear/switching voltage regulator for car-radio Features ■ ■ ■ Step-down synchronous switching voltage regulator – Internal high-side/ Low-side NDMOS – 1.2 < Vout < 8 V selectable through external resistors – 1.2/2.5 A load current selected through dedicated pin – 185 kHz free-run frequency – SYNC function (220 < fsw < 400 kHz) Linear regulators – 3.3/5 V @ 150 mA standby regulator selected through dedicated pin (VSTBYSEL) – 5/8.5 V @ 350 mA switched linear regulator enabled and selected through I2C bus (VLR1) – 3.3/10 V @ 1 A switched linear regulator enabled and selected through I2C bus (VLR2) 2 High side drivers (0.5 V max drop @ 0.5 A) enabled through I2C bus and equipped with protection circuit against: – short to ground and battery – loss of ground and battery – unsupplied short to battery ■ Reset function with configurable delay (RST, RSTDLY) ■ I2C bus Table 1. PowerSO36 (slug-up) ■ Enable pin to drive switching regulator and I2C bus logic ■ Under/over voltage battery detector (VBATVW) – Under voltage threshold adjustable through dedicated pin (LVWIN) ■ Load dump protection ■ Independent thermal protection on all regulators Description L5962 is a very versatile device exploiting BCD technology characteristics to provide a complete set of regulated voltages covering all the needs of a car-radio set. In standby condition the device guarantees extremely low quiescent current (90 µA max 40 °C < T < 85 °C) and minimum operating voltage (4.5 V using an external Schottky diode for the back-up function). Device summary Order code Package Packing L5962 PowerSO36 Tray L5962TR PowerSO36 Tape and reel September 2013 Doc ID 16819 Rev 3 1/24 www.st.com 1 Contents L5962 Contents 1 Block and application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.1 4.2 5 4.1.1 Linear regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.1.2 Switching regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 High side drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Operating mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.1 6 Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Battery detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 I2C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.1 Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.2 Start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.3 Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7 Software specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2/24 Doc ID 16819 Rev 3 L5962 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Chip address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 IB1 data byte. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 VLR2 output level selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Doc ID 16819 Rev 3 3/24 List of figures L5962 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. 4/24 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Low voltage warning high level block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Data validity on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Timing diagram on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Acknowledge on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 PowerSO36 (slug-up) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . 22 Doc ID 16819 Rev 3 L5962 1 Block and application diagram Block and application diagram Figure 1. Block diagram VINSW VBATP Bandgap External Storage Reference PH Switching Regulator POR & Startup Logic CBS CLIM VFB VCMP SOST Standby Regulator Oscillator SYNCH LVWIN VBATVW RST RSTDLY VSTBYSEL VSTBY Clock UV / OV Detect Linear Regulator #1 Synch Logic Reset & Delay Linear Regulator #2 SDA SCL I2Cbus Logic VLR1 VINLR2 VLR2 HSD HSD1 HSD HSD2 EN Ground AC00428 TAB PGND AGND SUBS Doc ID 16819 Rev 3 VBAT 5/24 6/24 22K Doc ID 16819 Rev 3 0.1µ VLR2 2.7nF 3.3nF 1µ 0.1µ 1µ VLR1 VSTBY 10K RESET 1.8nF 75k 22k/(VDCOUT-1) S2 VBATW SCL SDA EN R2 R1 VBAT VSTBY 10K +5V 47K SYNC 47K S1 L5962 NC 18 19 NC 0.1µ NC 17 AGND 16 20 NC 21 LVWIN VSTBYS 15 VSTBY 14 23 VLR1 22 VBATW RSTDLY 13 VBATP 12 HSD2 11 VBAT 10 HSD1 9 VINsw 8 24 SDA 25 VINLR 26 VLR2 27 RESET 28 EN 29 SCL SUBGND 7 NC 6 30 SYNC NC 5 31 SOST PHASE 4 33 VFB 32 VCMP CBS 3 35 NC 34 CLIM TAB 1 PGND 2 36 NC S3 0.1µF 1µ VSTBY 30µ/35V 0.1µ 0.1µ 0.1µ 200u/10V 470µ/25V 4.7µ 1500pF 22 22µH HSD2 HSD1 2.2µ VBAT VDCOUT Figure 2. 470 +5V Block and application diagram L5962 Application diagram 1000u/50V 0.1µ L5962 2 Pin description Pin description Figure 3. Pin connection (top view) N.C. 36 1 TAB N.C. 35 2 PGND CLIM 34 3 CBS VFB 33 4 PH VCMP 32 5 N.C. SOST 31 6 N.C. SYNC 30 7 SUBGND SCL 29 8 VINsw EN 28 9 HSD1 RST 27 10 VBAT VLR2 26 11 HSD2 VINLR2 25 12 VBATP SDA 24 13 RSTDLY VLR1 23 14 VSTBY VBATW 22 15 VSTBYSEL LVWIN 21 16 AGND N.C. 20 17 N.C. N.C. 19 18 N.C. AC00429 Table 2. Pin description Pin # Pad name 1 TAB 2 PGND 3 CBS 4 Function Description This pin must be connected to GND Switching regulator ground It is the power ground reference Bootstrap for switching regulator Bootstrap capacitor Input for the switching regulator PH Switching stage output Phase output. It is the switching output of the switching regulator. It also provides phase reference for bootstrap drive. 5 N.C. Not connected - 6 N.C. Not connected - 7 SUBGND Substrate ground Substrate ground 8 VINsw Switching regulator supply voltage Battery voltage for the switching regulator 9 HSD1 High side driver 1 Output of the 1st high side driver 10 VBAT VLR1/HSD1/HSD2 supply voltage Voltage input for linear regulator #1 high side driver and battery warnings 11 HSD2 High side driver 2 Output of the 2nd high side driver 12 VBATP Standby regulator supply voltage Protected battery input for bias, bandgap, oscillator, and VSTBY regulator 13 RSTDLY Reset delay function Input 14 VSTBY Standby regulator output Output of the standby regulator Doc ID 16819 Rev 3 7/24 Pin description Table 2. Pin # 15 L5962 Pin description (continued) Pad name Function VSTBYSEL Standby regulator selector Description Selection input for standby regulator output (3.3 V or 5 V) 16 AGND Analog ground Analog voltage reference 17 N.C. Not connected - 18 N.C. Not connected - 19 N.C. Not connected - 20 N.C. Not connected - 21 LVWIN Battery detector adjustment input Low-voltage warning input 22 VBATW Battery detector output (open-drain) Battery voltage warning output 23 VLR1 Switched linear regulator 1 Output of the 1st linear regulator 24 SDA I2C bus data I2C data line 25 VINLR2 VLR2 supply voltage Battery supply for the 2nd linear regulator 26 VLR2 Switched linear regulator 2 Output of the 2nd linear regulator 27 RST Reset Output 28 EN Enable Active mode enable input. Active high 29 SCL I2C bus clock I2C clock source supplied by the master device 30 SYNC Switching regulator SYNC function Synchronization Input 31 SOST Switching regulator soft-start Soft start external capacitor 32 VCMP Switching regulator compensation Feedback compensation input. 33 VFB Switching regulator feedback Regulated output voltage sense 34 CLIM Switching regulator current limit selector Choose between two current limits 35 N.C. Not connected - 36 N.C. Not connected - 8/24 Doc ID 16819 Rev 3 L5962 Electrical specification 3 Electrical specification 3.1 Absolute maximum ratings Table 3. Absolute maximum ratings Pin name/Symbol VsMAX VpinMAX AGND, PGND, SUBGND, TAB 3.2 Parameter Value Unit Operating supply voltage (VBAT, VBATP, VINSW, VINLR2) -0.3 to 27 V Transient supply voltage (VBAT, VBATP, VINSW, VINLR2) -0.3 to 50 V Input pin voltage (EN, RSTDLY, VSTBYSEL, SYNCH, SCL, SDA, VCMP, VFB, CLIM, SOST) -0.3 to 6 V -0.3 to +0.3 V Ground pin voltage Top Operating temperature range -40 to 85 °C Tstg Storage temperature range -55 to 150 °C Value Unit 2 °C/W Thermal data Table 4. Thermal data Symbol Rth j-case 3.3 Parameter Thermal resistance junction-to-case (max) Electrical characteristics VBAT= VINSW = VINLR2 = 14.4 V, Tamb = 25 °C unless otherwise specified. Table 5. ( Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit 4.1 - - V - - 90 75 µA 27 29 31 V Input supplies Vmin VBATP operating voltage - Iq Total quiescent current EN = 0; IVSTBY=100 µA @ T = -40 °C @ 25 °C < T < 85 °C VOV Overvoltage shut-down VBAT rising Hysteresis on VOV - - 400 - mV VBAT undervoltage threshold VBAT falling; VBATVW transition to 0 V 7 7.5 8 V HYSOV VUV Doc ID 16819 Rev 3 9/24 Electrical specification Table 5. L5962 Electrical characteristics (continued) Symbol HYSUV Parameter Test conditions Min. Typ. Max. Unit - 1 - V Hysteresis on VUV - VoutVSTBY3 Output voltage 0 < Iload < 150 mA 3.2 3.3 3.4 V LnRVSTBY3 Line regulation 4.1