LD59100PUR

LD59100 Datasheet 1 A ultra low-dropout regulator with reverse current protection Features DFN8 (3 x 3 mm) • • • • • • • • • • Input voltage range: 2.2 V to 5.5 V Ultra low-dropout: 200 mV typ. at 1 A NMOS topology Very high PSRR: 78 dB @ 100 Hz, 70 dB @ 100 kHz Very fast response to load variation Stable with 1 μF capacitor Thermal shutdown Current limit Adjustable from 1.2 V High output voltage accuracy: 1 % typ. (3 % max.) Applications • • • • Post-regulation generic POL Portable equipment Industrial applications Telecom infrastructure Description Maturity status link LD59100 The LD59100 is a 1 A LDO regulator designed for use in various environments. Its NMOS topology allows reduction of the Rdson of the pass-element, maintaining a very low-dropout voltage even with very low input power supply voltage. The device features very high PSRR characteristics over a wide frequency band, rendering it suitable for use as a secondary regulator for noise-sensitive applications. The enable function can be used to further decrease the overall current consumption in shutdown mode. The LD59100 embeds protection features, such as current limit, thermal shutdown and reverse output current protection. DS12170 - Rev 2 - November 2018 For further information contact your local STMicroelectronics sales office. www.st.com LD59100 Diagram 1 Diagram Figure 1. Block diagram, adjustable version AMG260520171100MT DS12170 - Rev 2 page 2/19 LD59100 Pin configuration 2 Pin configuration Figure 2. Pin connection (top view) 1 8 2 7 3 6 4 5 AMG260520171102MT Table 1. Adjustable version: pin description Pin DFN8-3x3 DS12170 - Rev 2 Symbol Function 1 OUT Regulated output voltage of the LDO 3 FB 4 GND 5 EN Enable pin logic input: Low = shutdown, High = active 2, 6, 7 NC Not connected 8 IN Input pin Tab EXP Feedback to set the output voltage Ground Exposed pad. Connect to GND on PCB. page 3/19 LD59100 Typical application 3 Typical application Figure 3. Typical application circuit for adjustable version VIN VI LD59100 CIN ON OFF VOUT VO EN R1 COUT FB GND R2 Adjustable version AMG260520171103MT DS12170 - Rev 2 page 4/19 LD59100 Maximum ratings 4 Maximum ratings Table 2. Absolute maximum ratings Symbol VIN Note: Parameter DC input voltage Value Unit - 0.3 to 6 V - 0.3 to 5.5 V VOUT DC output voltage VEN Enable input voltage - 0.3 to 6 V VFB Feedback pin voltage - 0.3 to 6 V IOUT Output current Internally limited mA PD Power dissipation Internally limited mW TST Storage temperature range - 65 to 150 °C TOP Operating temperature range - 40 to 125 °C Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All values are referred to GND. Table 3. Thermal data Symbol Parameter DFN8-3x3 Unit RthJA Thermal resistance junction-ambient 55 °C/W RthJC Thermal resistance junction-case 10 °C/W DFN8-3x3 Unit +/-2 kV +/-500 V Table 4. Electrostatic discharge Symbol DS12170 - Rev 2 Parameter HBM Human body model CDM Charged device model page 5/19 LD59100 Electrical characteristics 5 Electrical characteristics TA = TJ = -40 °C to +125 °C, typical values refer to TA = +25 °C, VEN = 2.2 V, VIN = VOUT + 1 V, IOUT = 10 mA, CIN = COUT = 1 μF, unless otherwise specified (see note 1). Table 5. Electrical characteristics for LD59100 adjustable Symbol Parameter Test condition VIN Operating input voltage IOUT Guaranteed output current Output voltage range VOUT Nominal VIN = VOUT(NOM) + 0.5 V to 5.5 V VOUT accuracy IOUT = 0 mA to 1 A VFB Internal reference IFB Adjustable pin leakage current ΔVOUT Static line regulation ΔVOUT Static load regulation VDROP Dropout voltage eN Min. Max. Unit 2.2 5.5 V 0 1 A VFB 5.5 - VDROP -1 1 % -3 3 % 1.204 1.216 V 0.1 0.6 µA 1.192 VIN = VOUT(NOM) + 0.5 V to 5.5 V IOUT = 10 mA IOUT = 1 mA to 1 A IOUT = 1 A, VOUT > 2.4 V VIN = VOUT(NOM) - 0.1 V f = 10 Hz to 100 kHz, IOUT = 10 mA COUT = 10 µF Output noise voltage(1) VIN = VOUT(NOM) + 1 V+/-VRIPPLE VRIPPLE = 0.5 V, IOUT = 10 mA Typ. 0.005 %/V 0.0001 %/mA 200 27 x VOUT 500 mV µVRMS 78 f = 100 Hz VIN = VOUT(NOM) + 1 V+/-VRIPPLE VRIPPLE = 0.5 V, IOUT = 10 mA 62 f = 10 Hz SVR Supply voltage rejection (2) VIN = VOUT(NOM) + 1 V+/-VRIPPLE VRIPPLE = 0.5 V, IOUT = 10 mA 70 dB f = 100 Hz VIN = VOUT(NOM) + 1 V+/-VRIPPLE VRIPPLE = 0.5 V, IOUT = 1 A 58 f = 100 Hz VIN = VOUT(NOM) + 1 V+/-VRIPPLE VRIPPLE = 0.5 V, IOUT = 1 A 37 f = 10 Hz DS12170 - Rev 2 page 6/19 LD59100 Electrical characteristics Symbol IQ Parameter Quiescent current Test condition Min. Typ. IOUT = 0 mA 130 IOUT = 10 mA 140 IOUT = 1 A 280 VIN Input current in OFF mode Max. Unit µA 0.02 VEN = GND ICL Output current limit VOUT = 0.9 x VOUT(NOM) ISC Short-circuit current RL = 0 450 mA IREV Reverse leakage current VEN < 0.5 V, 0 < VIN < VOUT 0.1 µA VEN IEN TSHDN TSTR 1.05 1.6 Enable input logic low 0.5 Enable input logic high Enable pin input current 1.7 VEN = VIN = 5.5 V 20 Thermal shutdown (2) 160 Hysteresis (2) 20 Start-up time 2.2 VOUT = 3 V, RL = 30 Ω, COUT = 1 µF 600 A V nA °C µs 1. Values at below 0 °C are guaranteed by design and/or characterization tested at TA = ~ TJ. Low duty cycle pulse techniques are used. 2. Guaranteed by design, not tested in production. DS12170 - Rev 2 page 7/19 LD59100 Application information 6 Application information 6.1 Output voltage setting for adjustable version In the adjustable version, the output voltage can be set from 1.204 V (VFB) up to the input voltage minus the voltage drop across the pass transistor (dropout voltage), by connecting a resistor divider between the FB pin and the output, thereby implementing remote voltage sensing. With reference to the typical circuit shown in Figure 4. Line regulation vs. temperature (VIN = 2.5 to 5.5 V, VOUT = VFB, IOUT = 10 mA), the resistor divider can be designed by using the following equation: Equation 1 VOUT  =  VFB  1 +  R1 /R2 ,  witℎ VFB  = 1.204 V typ . (1) It is recommended to use resistors with values in the range of 10 kΩ to 100 kΩ. Lower values can also be suitable, but will result in an increase in current consumption. The following table shows an example of R1, R2 choices, among standard 1% resistors, to obtain the most common output voltages. Table 6. Resistor divider settings for common output voltages 6.2 VOUT R1 R2 1.204 (VFB) Short Open 1.5 23.2 kΩ 95.3 kΩ 1.8 28.0 kΩ 56.2 kΩ 2.5 39.2 kΩ 36.5 kΩ 2.8 44.2 kΩ 33.2 kΩ 3 46.4 kΩ 30.9 kΩ 3.3 52.3 kΩ 30.1 kΩ Input and output capacitors Input capacitor An input capacitor with a minimum value of 1 μF must be located as close as possible to the input pin of the device and returned to a clean analog ground. A good quality, low-ESR ceramic capacitor is recommended. This capacitor helps to ensure stability of the control loop, reduces the effects of inductive sources and improves ripple rejection. A capacitance value larger than 1 µF can be used in the case of fast load transients in the application. Output capacitor The LD59100 requires a capacitor connected to its output, to keep the control loop stable and reduce the risk of ringing and oscillations. The control loop is designed to be stable with any good quality ceramic capacitor (such as X5R/X7R types) with a minimum value of 1 µF and equivalent series resistance in the 5 mΩ to 1 Ω range. It is important to highlight that the output capacitor must maintain its capacitance and ESR in the stable region over the full operating temperature, load and input voltage ranges, to assure stability. Therefore, capacitance and ESR variations must be taken into account in the design phase to ensure the device works in the expected stability region. There is no maximum limit to the output capacitance, provided that the above conditions are respected. DS12170 - Rev 2 page 8/19 LD59100 Typical characteristics 7 Typical characteristics CIN = COUT = 1 μF, VEN = VIN = 2.5 V, VOUT = VFB, TJ = 25 °C, unless otherwise specified. Figure 4. Line regulation vs. temperature (VIN = 2.5 to 5.5 V, VOUT = VFB, IOUT = 10 mA) Figure 5. Load regulation vs. temperature (VIN = 2.5 V, VOUT = VFB ) 0.04 0.0005 Loa d Re gula tion [% / mA] Line Re gula tion [% / V] 0.0004 0.03 0.02 0.01 0.0003 0.0002 0.0001 0 -40 -25 0 25 55 85 0 125 -40 Te mpe ra ture [°C] -25 0 25 55 Te mpe ra ture [°C] AMG260520171106MT Figure 6. Reference voltage vs. temperature 85 125 AMG260520171107MT Figure 7. Current limit vs. input voltage 2 1.24 IS HORT 1.8 ILIM 1.6 1.22 1.2 Curre nt limit [A] Output Volta ge [V] 1.4 1.18 1.2 1 0.8 0.6 0.4 1.16 0.2 0 1.14 -40 -25 0 25 55 Te mpe ra ture [°C] DS12170 - Rev 2 85 125 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5 5.2 5.4 5.5 Input volta ge [V] AMG260520171108MT AMG260520171109MT page 9/19 LD59100 Typical characteristics Figure 8. Quiescent current vs. temperature (VIN = 2.2 V) Figure 9. Quiescent current vs. temperature (VIN = 5.5 V) 3000 600 IOUT = 0 mA IOUT = 0 mA IOUT = 10 mA IOUT = 10 mA 2500 IOUT = 1 A IOUT = 1 A 2000 Iq [uA] Iq [uA] 400 1500 1000 200 500 0 0 -40 -25 0 25 55 85 Te mpe ra ture [°C] -40 125 -25 0 25 55 Te mpe ra ture [°C] AMG260520171110MT Figure 10. Quiescent current vs. output current 85 125 AMG260520171111MT Figure 11. Off-state current vs. temperature 5 600 -40°C VIN=2.2V 25°C VIN=5.5V 125°C 4 Iq [uA] IQ [uA] 400 3 2 200 1 0 0 100 200 300 400 500 600 700 Output Curre nt [mA] 800 900 0 1000 -40 -25 0 25 Figure 12. Enable thresholds vs. temperature 55 Te mpe ra ture [°C] AMG260520171112MT 85 125 AMG260520171113MT Figure 13. Enable pin current vs. temperature 1.5 100 Ven-Lo, Vin=2.2V Ven-Hi, Vin=2.2V 1.4 90 Ven-Lo, Vin=5.5V Ven-Hi, Vin=5.5V 1.3 80 70 IEN [nA] VEN Ena ble [V] 1.2 1.1 60 50 1 40 0.9 30 0.8 20 0.7 10 0.6 -40 -25 0 25 55 85 125 Te mpe ra ture [°C] -40 -25 0 25 55 85 125 Te mpe ra ture [°C] AMG260520171114MT DS12170 - Rev 2 0 AMG260520171115MT page 10/19 LD59100 Typical characteristics Figure 14. Feedback pin current vs. temperature Figure 15. Reverse current vs. temperature 100 5 90 80 4 70 3 IREV [µA] IFB [nA] 60 50 2 40 30 1 20 10 0 0 -40 -25 0 25 55 Te mpe ra ture [°C] 85 -40 125 -25 0 Figure 16. Dropout voltage vs. temperature 25 55 85 125 Temperature [°C] AMG260520171116MT AMG260520171117MT Figure 17. Dropout voltage vs. output current 300 260 240 280 200 240 180 160 220 VDROP [mV] VDROP [mV] 220 260 200 180 140 120 100 80 160 60 40 140 20 120 -40 -25 0 25 55 85 0 125 0 0.2 0.4 Te mpe ra ture [°C] 0.6 0.8 IOUT [A] AMG260520171118MT 1 1.2 AMG260520171119MT Figure 19. RMS noise vs. CFB Figure 18. Dropout voltage vs. input voltage 400 90 350 80 70 300 60 e N [µVRMS ] VDROP [mV] 250 200 150 50 40 30 100 20 50 10 0 0 2 3 4 5 6 VIN [V] AMG260520171120MT DS12170 - Rev 2 0.1 1 10 100 1000 C FB[nF] VOUT = VFB ; C FB conne cte d be twe e n VOUT a nd FB AMG260520171121MT page 11/19 LD59100 Typical characteristics Figure 21. PSRR vs. frequency Figure 20. Noise spectral density 90 1.2 1mA 10mA 100mA 1A 80 1.0 60 P S RR [dB] e N [uV/S QRT(Hz)] 70 0.8 0.6 50 40 30 0.4 20 0.2 10 0 0.0 10 100 1000 10000 100000 0.1 1 VOUT = VFB; C OUT =10μF 10 100 f [kHz] f [Hz] AMG260520171122MT AMG210720171100MT Figure 22. Line transient Figure 23. Load transient VOUT VIN VOUT IOUT VIN from 2.5V to 5.5V, IOUT=10mA, tr=tf=5µs , C IN=C OUT=1µF VIN=VOUT+1V, IOUT from 10mA to 1A, tr=tf =5µs , C IN=C OUT=1µF AMG260520171124MT AMG260520171125MT Figure 24. Startup waveform VIN VIN VEN VEN VOUT VOUT VIN = VEN from 0 to 2.5V, IOUT=10mA, tr=5µs , C IN=C OUT=1µF AMG260520171126MT DS12170 - Rev 2 Figure 25. Enable transient VIN = 2.5V, VEN from 0 to 2.5V, IOUT=10mA, tr=5µs , C IN=C OUT=1µF AMG260520171127MT page 12/19 LD59100 Package information 8 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 8.1 DFN8 (3 x 3 mm) package information Figure 26. DFN8 (3 x 3 mm) package outline DS12170 - Rev 2 page 13/19 LD59100 DFN8 (3 x 3 mm) package information Table 7. DFN8 (3 x 3 mm) mechanical data Dim. mm Min. Typ. Max. A 0.80 0.85 0.90 A1 0.00 - 0.05 A3 b 0.20 REF. 0.28 D D2 0.31 0.34 3.00 BSC 1.70 1.75 e 0.65 BSC E 3.00 BSC 1.80 E2 1.45 1.50 1.55 L 0.35 0.40 0.45 k 0.20 N 8 Figure 27. DFN8 (3 x 3 mm) recommended footprint DS12170 - Rev 2 page 14/19 LD59100 DFN8 (3 x 3 mm) packing information 8.2 DFN8 (3 x 3 mm) packing information Figure 28. DFN8 (3 x 3 mm) tape outline Table 8. DFN8 (3 x 3 mm) tape mechanical data Dim. DS12170 - Rev 2 mm Value Ao 3.30 ±0.10 Bo 3.30 ±0.10 Ko 1.10 ±0.10 page 15/19 LD59100 DFN8 (3 x 3 mm) packing information Figure 29. DFN8 (3 x 3 mm) reel outline DS12170 - Rev 2 page 16/19 LD59100 Ordering information 9 Ordering information Table 9. Order codes DFN8-3x3 DS12170 - Rev 2 Order code Marking LD59100PUR 5910 Output voltage Adjustable page 17/19 LD59100 Revision history Table 10. Document revision history DS12170 - Rev 2 Date Revision Changes 06-Sep-2017 1 Initial release 21-Nov-2018 2 Updated Figure 15. Reverse current vs. temperature page 18/19 LD59100 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS12170 - Rev 2 page 19/19