LRI64-W4

LRI64 Memory TAG IC, 64-bit Unique ID with WORM User Area 13.56MHz, ISO15693 and ISO18000-3 Mode 1 Compliant FEATURES SUMMARY ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ISO 15693 Compliant ISO 18000-3 Mode 1 Compliant 13.56MHz ±7kHz Carrier Frequency Supported data transfer to the LRI64: 10% ASK modulation using “1-out-of-4” pulse position coding (26 kbit/s) Supported data transfer from the LRI64: Load modulation using Manchester coding with 423kHz single sub-carrier in fast data rate (26 kbit/s) Internal Tuning Capacitor 7 x 8 bits WORM User Area 64-bit Unique Identifier (UID) Read Block and Write Block Commands (8-bit blocks) 7ms Programming Time (typical) More than 40-Year Data Retention Electrical Article Surveillance capable (software controlled) Figure 1. Delivery Forms Antenna (A1) Antenna (A6) Antenna (A7) UFDFPN8 (MB) 2x3mm² (MLP) Wafer September 2005 1/38 LRI64 TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Memory Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 SIGNAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 AC1, AC0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 COMMANDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Stay Quiet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Read Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Write Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Get_System_Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Initial Dialogue for Vicinity Cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 POWER TRANSFER. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Operating Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 COMMUNICATION SIGNAL FROM VCD TO LRI64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 DATA RATE AND DATA CODING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 VCD TO LRI64 FRAMES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 COMMUNICATIONS SIGNAL FROM LRI64 TO VCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Load Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Subcarrier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Bit Representation and Coding using One Subcarrier, at the High Data Rate . . . . . . . . . . . . 10 Logic 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Logic 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 LRI64 TO VCD FRAMES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 LRI64 SOF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 LRI64 EOF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 SPECIAL FIELDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Unique Identifier (UID). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Application Family Identifier (AFI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Data Storage Format Identifier (DSFID) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Cyclic Redundancy Code (CRC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/38 LRI64 LRI64 PROTOCOL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 LRI64 STATES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Power-off State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Ready State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Quiet State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Addressed Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Non-Addressed Mode (General Request) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 FLAGS AND ERROR CODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Request Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Response Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Response Error Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 ANTI-COLLISION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Request Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Mask Length and Mask Value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Inventory Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 REQUEST PROCESSING BY THE LRI64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Explanation of the Possible Cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 TIMING DEFINITIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 LRI64 Response Delay, t1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 VCD New Request Delay, t2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 VCD New Request Delay when there is No LRI64 Response, t3 . . . . . . . . . . . . . . . . . . . . . . . . 19 COMMANDS CODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Stay Quiet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Read Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Write Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Get System Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 APPENDIX A.ALGORITHM FOR PULSED SLOTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 3/38 LRI64 APPENDIX B.C-EXAMPLE TO CALCULATE OR CHECK THE CRC16 ACCORDING TO ISO/IEC 13239 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 CRC Calculation Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 APPENDIX C.APPLICATION FAMILY IDENTIFIER (AFI) CODING . . . . . . . . . . . . . . . . . . . . . . . . . . 36 REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 4/38 LRI64 SUMMARY DESCRIPTION The LRI64 is a contactless memory, powered by an externally transmitted radio wave. It contains a 120-bit non-volatile memory. The memory is organized as 15 blocks of 8 bits, of which 7 blocks are accessible as Write-Once Read-Many (WORM) memory. Figure 2. Logic Diagram LRI64 Power Supply Regulator 120-bit WORM Memory ASK Demodulator Manchester Load Modulator AC1 0 1 2 3 4 5 AC0 AI08590 Memory Mapping The LRI64 is organized as 15 blocks of 8 bits as shown in Figure 4. Each block is automatically write-protected after the first valid write access. Figure 4. LRI64 Memory Mapping 01234567 UID 0 UID 1 UID 2 UID 3 UID 4 UID 5 = IC_ID UID 6 = 02h UID 7 = E0h AFI (WORM Area) DSFID (WORM Area) WORM Area WORM Area WORM Area WORM Area WORM Area AI09741 6 Block Addr 7 8 9 10 11 12 13 14 The LRI64 is accessed using a 13.56MHz carrier wave. Incoming data are demodulated from the received Amplitude Shift Keying (ASK) signal, 10% modulated. The data are transferred from the reader to the LRI64 at 26Kbit/s, using the “1-outof-4” pulse encoding mode. Outgoing data are sent by the LRI64, generated by load variation on the carrier wave, using Manchester coding with a single sub-carrier frequency of 423kHz. The data are transferred from the LRI64 to the reader at 26Kbit/s, in the high data rate mode. The LRI64 supports the high data rate communication protocols of ISO 15693 and ISO 18000-3 Mode 1 recommendations. All other data rates and modulations are not supported by the LRI64. Table 1. Signal Names AC1 AC0 Antenna Coil Antenna Coil Figure 3. MLP Connections AC0 n/c n/c n/c 1 2 3 4 8 7 6 5 AC1 n/c n/c n/c AI11612 The LRI64 uses the first 8 blocks (blocks 0 to 7) to store the 64-bit Unique Identifier (UID). The UID is used during the anti-collision sequence (Inventory). It is written, by ST, at time of manufacture, but part of it can be customer-accessible and customer-writable, on special request. The LRI64 has an AFI register, in which to store the Application Family Identifier value, which is also used during the anti-collision sequence. The LRI64 has a DSFID register, in which to store the Data Storage Format Identifier value, which is used for the LRI64 Inventory answer. The five following blocks (blocks 10 to 14) are Write-Once Read-Many (WORM) memory. It is possible to write to each of them once. After the first valid write access, the block is automatically locked, and only read commands are possible. 5/38 LRI64 SIGNAL DESCRIPTION AC1, AC0. The pads for the Antenna Coil. AC1 and AC0 must be directly bonded to the antenna. COMMANDS The LRI64 supports the following commands: Inventory. Used to perform the anti-collision sequence. The LRI64 answers to the Inventory command when all of the 64 bits of the UID have been correctly written. Stay Quiet. Used to put the LRI64 in Quiet mode. In this mode, the LRI64 only responds to commands in Addressed mode. Read Block. Used to output the 8 bits of the selected block. Write Block. Used to write a new 8-bit value in the selected block, provided that the block is not locked. This command can be issued only once to each block. Get_System_Info. Used to allow the application system to identify the product. It gives the LRI64 memory size, and IC reference (IC_ID). Initial Dialogue for Vicinity Cards The dialogue between the Vicinity Coupling Device (VCD) and the LRI64 is conducted according to a technique called Reader Talk First (RTF). This involves the following sequence of operations: 1. activation of the LRI64 by the RF operating field of the VCD 2. transmission of a command by the VCD 3. transmission of a response by the LRI64 POWER TRANSFER Power transfer to the LRI64 is accomplished by inductive coupling of the 13.56MHz radio signal between the antennas of the LRI64 and VCD. The RF field transmitted by the VCD induces an AC voltage on the LRI64 antenna, which is then rectified, smoothed and voltage-regulated. Any amplitude modulation present on the signal is demodulated by the Amplitude Shift Keying (ASK) demodulator. Frequency ISO 15693 and ISO 18000-3 Mode 1 standards define the carrier frequency (fC) of the operating field to be 13.56MHz±7kHz. Operating Field The LRI64 operates continuously between Hmin and Hmax. – The minimum operating field is Hmin and has a value of 150mA/m (rms). – The maximum operating field is Hmax and has a value of 5A/m (rms). A VCD generates a field of at least Hmin and not exceeding Hmax in the operating volume. 6/38 LRI64 COMMUNICATION SIGNAL FROM VCD TO LRI64 Communications between the VCD and the LRI64 involves a type of Amplitude Modulation called Amplitude Shift Keying (ASK). The LRI64 only supports the 10% modulation mode specified in ISO 15693 and ISO 18000-3 Mode 1 standards. Any request that the VCD might send using the 100% modulation mode, is ignored, and the LRI64 remains in its current state. However, the LRI64 is, in fact, operational for any degree of modulation index from between 10% and 30%. Figure 5. 10% Modulation Waveform The modulation index is defined as (a-b)/(a+b) where a and b are the peak and minimum signal amplitude, respectively, of the carrier frequency, as shown in Figure 5. Table 2. 10% Modulation Parameters Parameter hr hf Min – – Max 0.1 x (a-b) 0.1 x (a-b) hf hr tRFF tRFSFL tRFR a b t AI06655B Figure 6. “1-out-of-4” Coding Example 10 00 01 11 75.52 µs 75.52 µs 75.52 µs 75.52 µs AI06659B 7/38 LRI64 DATA RATE AND DATA CODING The data coding method involves pulse position modulation. The LRI64 supports the “1-out-of-4” pulse coding mode. Any request that the VCD might send in the “1-out-of-256” pulse coded mode, is ignored, and the LRI64 remains in its current state. Two bit values are encoded at a time, by the positioning of a pause of the carrier frequency in one of four possible 18.88µs (256/fc) time slots, as shown in Figure 7. Figure 7. “1-out-of-4” Coding Mode Pulse position for "00" Four successive pairs of bits form a byte. The transmission of one byte takes 302.08 µs and, consequently, the data rate is 26.48 kbits/s (fc/ 512). The encoding for the least significant pair of bits is transmitted first. For example Figure 6. shows the transmission of E1h (225d, 1110 0001b) by the VCD. 9.44 µs 9.44 µs 75.52 µs Pulse position for "01" (1=LSB) 28.32 µs 9.44 µs 75.52 µs Pulse position for "10" (0=LSB) 47.20µs 9.44 µs Pulse position for "11" 75.52 µs 66.08 µs 75.52 µs 9.44 µs AI06658 8/38 LRI64 VCD TO LRI64 FRAMES Request Frames are delimited by a Start of Frame (SOF) and an End of Frame (EOF) and are implemented using a code violation mechanism. Unused options are reserved for future use. The LRI64 is ready to receive a new command frame from the VCD after a delay of t2 (see Table 14.) after having sent a response frame to the VCD. The LRI64 generates a Power On delay of tPOR (see Table 14.) after being activated by the powering field. After this delay, the LRI64 is ready to receive a command frame from the VCD. In ISO 15693 and ISO 18000-3 Mode 1 standards, the SOF is used to define the data coding mode that the VCD is going to use in the following command frame. The SOF that is shown in Figure 8. selects the “1out-of-4” data coding mode. (The LRI64 does not support the SOF for the “1-out-of-256” data coding mode.) The corresponding EOF sequence is shown in Figure 9. Figure 8. Request SOF, using the “1-out-of-4” Data Coding Mode 9.44 µs 9.44 µs 9.44 µs 37.76 µs 37.76 µs AI06660 Figure 9. Request EOF 9.44 µs 9.44 µs 37.76 µs AI06662 9/38 LRI64 COMMUNICATIONS SIGNAL FROM LRI64 TO VCD ISO 15693 and ISO 18000-3 Mode 1 standards define several modes, for some parameters, to cater for use in different application requirements and noise environments. The LRI64 does not support all of these modes, but supports the single subcarrier mode at the fast data rate. Load Modulation The LRI64 is capable of communication to the VCD via the inductive coupling between the two antennas. The carrier is loaded, with a subcarrier with frequency fS, generated by switching a load in the LRI64. The amplitude of the variation to the signal, as received on the VCD antenna, is at least 10mV, when measured as described in the test methods defined in International Standard ISO10373-7. Subcarrier The LRI64 supports the one subcarrier modulation response format. This format is selected by the VCD using the first bit in the protocol header. The frequency, fS, of the subcarrier load modulation is 423.75kHz (=fC/32). Data Rate The LRI64 response uses the high data rate format (26.48 kbits/s). The selection of the data rate is made by the VCD using the second bit in the protocol header. Bit Representation and Coding using One Subcarrier, at the High Data Rate Data bits are encoded using Manchester coding, as described in Figure 10. and Figure 11. Logic 0. A logic 0 starts with 8 pulses of 423.75kHz (fC/32) followed by an unmodulated period of 18.88µs as shown in Figure 10. Figure 10. Logic 0, High Data Rate 37.76 µs AI06663 Logic 1. A logic 1 starts with an unmodulated period of 18.88µs followed by 8 pulses of 423.75kHz (fC/32) as shown in Figure 11. Figure 11. Logic 1, High Data Rate 37.76 µs AI06664 10/38 LRI64 LRI64 TO VCD FRAMES Response Frames are delimited by a Start of Frame (SOF) and an End of Frame (EOF) and are implemented using a code violation mechanism. The LRI64 supports these in the one subcarrier mode, at the fast data rate, only. The VCD is ready to receive a response frame from the LRI64 before 320.9µs (t1) after having sent a command frame. LRI64 SOF SOF comprises three parts: (see Figure 12.) – an unmodulated period of 56.64µs, – 24 pulses of 423.75kHz (fc/32), – a logic 1 which starts with an unmodulated period of 18.88µs followed by 8 pulses of 423.75kHz. LRI64 EOF EOF comprises three parts: (see Figure 13.) – a logic 0 which starts with 8 pulses of 423.75kHz followed by an unmodulated period of 18.88µs. – 24 pulses of 423.75kHz (fC/32), – an unmodulated time of 56.64µs. Figure 12. Response SOF, using High Data Rate and One Subcarrier 113.28 µs 37.76 µs AI06671B Figure 13. Response EOF, using High Data Rate and One Subcarrier 37.76 µs 113.28 µs AI06675B 11/38 LRI64 SPECIAL FIELDS Unique Identifier (UID) Members of the LRI64 family are uniquely identified by a 64-bit Unique Identifier (UID). This is used for addressing each LRI64 device uniquely and individually, during the anti-collision loop and for one-to-one exchange between a VCD and an LRI64. The UID complies with ISO/IEC 15963 and ISO/ IEC 7816-6. It is a read-only code, and comprises (as summarized in Figure 14.): – 8-bit prefix, the most significant bits, set at E0h – 8-bit IC Manufacturer code (ISO/IEC 7816-6/ AM1), set at 02h (for STMicroelectronics) – 48-bit Unique Serial Number Figure 14. UID Format Most significant bits 63 55 47 E0h 02h Least significant bits 0 Unique Serial Number AI09725 Figure 15. Decision Tree for AFI Inventory Request Received No AFI Flag Set ? Yes AFI value =0? Yes AFI value = Internal value ? Yes No No Application Family Identifier (AFI) The Application Family Identifier (AFI) indicates the type of application targeted by the VCD, and is used to select only those LRI64 devices meeting the required application criteria (as summarized in Figure 15.). The value is programmed by the LRI64 issuer in the AFI register. Once programmed, it cannot be modified. The most significant nibble of the AFI is used to indicate one specific application, or all families. The least significant nibble of the AFI is used to code one specific sub-families, or all sub-families. Subfamily codes, other than 0, are proprietary (as described in ISO 15693 and ISO 18000-3 Mode 1 documentation). Data Storage Format Identifier (DSFID) The Data Storage Format Identifier (DSFID) indicates how the data is structured in the LRI64 memory. It is coded on one byte. It allows for quick and brief knowledge on the logical organization of the data. It is programmed by the LRI64 issuer in the DSFID register. Once programmed, it cannot be modified. Cyclic Redundancy Code (CRC) The Cyclic Redundancy Code (CRC) is calculated as defined in ISO/IEC 13239, starting from an initial register content of all ones: FFFFh. The 2-byte CRC is appended to each Request and each Response, within each frame, before the EOF. The CRC is calculated on all the bytes after the SOF, up to the CRC field. Upon reception of a Request from the VCD, the LRI64 verifies that the CRC value is valid. If it is invalid, it discards the frame, and does not answer the VCD. Upon reception of a Response from the LRI64, it is recommended that the VCD verify that the CRC value is valid. If it is invalid, the actions that need to be performed are up to the VCD designer. The CRC is transmitted Least Significant Byte first. Each byte is transmitted Least Significant Bit first, as shown in Figure 16.). Figure 16. CRC Format Answer given by the VICC to the Inventory Request No Answer Least Significant Byte Most Significant Byte AI06679B l.s.bit m.s.bit l.s.bit m.s.bit AI09726 12/38 LRI64 LRI64 PROTOCOL DESCRIPTION The Transmission protocol defines the mechanism to exchange instructions and data between the VCD and the LRI64, in each direction. Based on “VCD talks first”, the LRI64 does not start transmitting unless it has received and properly decoded an instruction sent by the VCD. The protocol is based on an exchange of: – a Request from the VCD to the LRI64 – a Response from the LRI64 to the VCD Each Request and each Response are contained in a Frame. The frame delimiters (SOF, EOF) are described in the previous paragraphs. Each Request (Figure 17.) consists of: – Request SOF (Figure 8.) – Request Flags (Table 3. to Table 5.) – Command Code – Parameters (depending on the Command) – Application Data – 2-byte CRC (Figure 16.) – Request EOF (Figure 9.) Figure 17. VCD Request Frame Format Each Response (Figure 18.) consists of: – Response SOF (Figure 12.) – Response Flags (Table 6.) – Parameters (depending on the Command) – Application Data – 2-byte CRC (Figure 16.) – Response EOF (Figure 13.) The number of bits transmitted in a frame is a multiple of eight, and thus always an integer number of bytes. Single-byte fields are transmitted Least Significant Bit first. Multiple-byte fields are transmitted Least Significant Byte first, with each byte transmitted Least Significant Bit first. The setting of the flags indicates the presence of any optional fields. When the flag is set, 1, the field is present. When the flag is reset, 0, the field is absent. Request SOF Request Command Flags Code Parameters Data 2-Byte CRC Request EOF AI09727 Figure 18. LRI64 Response Frame Format Response Response SOF Flags Parameters Data 2-Byte CRC Response EOF AI09728 Figure 19. LRI64 Protocol Timing VCD Request Frame Request Frame VICC Response Frame Response Frame Timing t1 t2 t1 t2 AI06830B 13/38 LRI64 LRI64 STATES A LRI64 can be in any one of three states: – Power-off – Ready – Quiet Transitions between these states are as specified in Figure 20. Power-off State The LRI64 is in the Power-off state when it receives insufficient energy from the VCD. Ready State The LRI64 is in the Ready state when it receives enough energy from the VCD. It answers to any Request in Addressed and Non-addressed modes. Quiet State When in the Quiet State, the LRI64 answers to any Request in Addressed mode. MODES The term mode refers to the mechanism for specifying, in a Request, the set of LRI64 devices that shall answer to the Request. Addressed Mode When the Address_flag is set to 1 (Addressed mode), the Request contains the Unique ID (UID) of the addressed LRI64 device (such as an LRI64 device). Any LRI64 receiving a Request in which the Address_flag is set to 1, compares the received Unique ID to its own UID. If it matches, it execute the Request (if possible) and returns a Response to the VCD, as specified by the command description. If it does not match, the LRI64 device remains silent. Non-Addressed Mode (General Request) When the Address_flag is set to 0 (Non-addressed mode), the Request does not contain a Unique ID field. Any LRI64 device receiving a Request in which the Address_flag is set to 0, executes the Request and returns a Response to the VCD as specified by the command description. Figure 20. LRI64 State Transition Diagram Power Off Out of field In field Out of field Ready Inventory (if UID written) Write, Read, Get_System_Info in addressed and non-addressed modes Stay quiet(UID) Quiet Write, Read, Get_System_Info in addressed mode AI09723 14/38 LRI64 FLAGS AND ERROR CODES Request Flags In a Request, the 8-bit Flags Field specifies the actions to be performed by the LRI64, and whether corresponding fields are present or not. Flag bit 3 (the Inventory_flag) defines the way the four most significant flag bits (5 to 8) are used. When bit 3 is reset (0), bits 5 to 8 define the LRI64 selection criteria. When bit 3 is set (1), bits 5 to 8 define the LRI64 Inventory parameters. Table 3. Request Flags 1 to 4 Bit 1 Name Subcarrier Flag Data_rate Flag Value 1 0 Description Single sub-carrier frequency mode. (Option 1 is not supported) High data rate mode. (Option 0 is not supported) Flags 5 to 8 meaning are according to Table 4. Flags 5 to 8 meaning are according to Table 5. No Protocol format extension. Must be set to 0. (Option 1 is not supported) 8 Table 5. Request Flags 5 to 8 (when Bit 3 = 1) Bit 5 Name AFI Flag 1 6 Nb_slots Flag Option Flag RFU 0 1 0 0 AFI field is present 16 slots 1 slot No option. Must be set to 0. (Option 1 is not supported) No option. Must be set to 0. (Option 1 is not supported) Value 1 0 Description AFI field is not present 7 Note: 1. Bits 7 and 8 must be reset to 0. 2 1 0 Response Flags In a Response, the 8-bit Flags Field indicates how actions have been performed by the LRI64, and whether corresponding fields are present or not. Table 6. Response Flags 1 to 8 Bit Name Value 0 Description No error Error detected. Error code is in the "Error" field. 3 Inventory Flag 1 Protocol Extension Flag 4 0 1 Error Flag 1 Note: 1. If the value of the Request Flag is a non authorized value, the LRI64 does not execute the command, and does not respond to the request. 2 3 RFU RFU RFU RFU RFU RFU RFU 0 0 0 0 0 0 0 Table 4. Request Flags 5 to 8 (when Bit 3 = 0) Bit 5 Name Select Flag Value 1 0 Description No selection mode. Must be set to 0. (Option 1 is not supported) Non addressed mode. The UID field is not present in the request. All LRI64 shall answer to the request. Addressed mode. The UID field is present in the request. Only the LRI64 that matches the UID answers the request. No option. Must be set to 0. (Option 1 is not supported) No option. Must be set to 0. (Option 1 is not supported) 4 5 6 7 8 0 6 Address Flag 1 Response Error Code If the Error Flag is set by the LRI64 in the Response, the Error Code Field is present and provides information about the error that occurred. Table 7. shows the one error code that is supported by the LRI64. Table 7. Response Error Code Error Code 0Fh Meaning Error with no specific information given 7 8 Option Flag 1 RFU 1 0 0 Note: 1. Only bit 6 (Address flag) can be configured for the LRI64. All others bits (5, 7 and 8) must be reset to 0. 15/38 LRI64 ANTI-COLLISION The purpose of the anti-collision sequence is to allow the VCD to compile a list of the LRI64 devices that are present in the VCD field, each one identified by its unique ID (UID). The VCD is the master of the communication with one or multiple LRI64 devices. It initiates the communication by issuing the Inventory Request (Figure 23.). Request Flags The Nb_slots_flag needs to be set appropriately. The AFI Flag needs to be set, if the Optional AFI Field is to be present. Mask Length and Mask Value The Mask Length defines the number of significant bits in the Mask Value. The Mask Value is contained in an integer number of bytes. The least significant bit of each is transmitted first. If the Mask Length is not a multiple of 8 (bits), the most significant end of the Mask Value is padded with the required number of null bits (set to 0) so that the Mask Value is contained in an integer number of bytes, so that the next field (the 2-Byte CRC) starts at the next byte boundary. In the example of Figure 21., the Mask Length is 11 bits. The Mask Value, 10011001111, is padded out at the most significant end with five bits set to 0. The 11 bits Mask plus the current slot number is compared to the UID. Inventory Responses Each LRI64 sends its Response in a given time slot, or else remains silent. The first slot starts immediately after the reception of the Request EOF. To switch to the next slot, the VCD sends another EOF. The following rules and restrictions apply: – if no LRI64 answer is detected, the VCD may switch to the next slot by sending an EOF – if one or more LRI64 answers are detected, the VCD waits until the complete frame has been received before sending an EOF, to switch to the next slot. The pulse shall be generated according to the definition of the EOF in ISO 15693 and ISO 18000-3 Mode 1 standards. Figure 21. Comparison between the Mask, Slot Number and UID Mask value received in the Inventory command MSB LSB 0000 0100 1100 1111 b 16 bits MSB LSB 100 1100 1111 b 11 bits The Mask value less the padding 0s is loaded into the Tag comparator The Slot counter is calculated Nb_slots_flags = 0 (16 slots), Slot Counter is 4 bits MSB LSB xxxx 4 bits The Slot counter is concatened to the Mask value Nb_slots_flags = 0 MSB LSB xxxx 100 1100 1111 b 15 bits The concatenated result is compared with the least significant bits of the Tag UID. UID b63 b0 xxxx xxxx ..... xxxx xxxx x xxx xxxx xxxx xxxx b Bits ignored Compare 64 bits AI06682 16/38 LRI64 REQUEST PROCESSING BY THE LRI64 Upon reception of a valid Request, the LRI64 performs the following algorithm, where: – NbS is the total number of slots (1 or 16) – SN is the current slot number (0 to 15) – The function LSB(value,n) returns the n least significant bits of value – The function MSB(value,n) returns the n most significant bits of value – “&” is the concatenation operator – Slot_Frame is either a SOF or an EOF SN = 0 if (Nb_slots_flag) then NbS = 1 SN_length = 0 endif else NbS = 16 SN_length = 4 endif label1: if LSB(UID, SN_length + Mask_length) = LSB(SN,SN_length)&LSB(Mask,Mask_length) then answer to inventory request endif wait (Slot_Frame) if Slot_Frame = SOF then Stop Anticollision decode/process request exit endif if Slot_Frame = EOF if SN < NbS-1 then = SN + 1 SN goto label1 exit endif endif Explanation of the Possible Cases Figure 22. summarizes the main possible cases that can occur during an anti-collision sequence when the number of slots is 16. The different steps are: – The VCD sends an Inventory Request, in a frame, terminated by a EOF. The number of slots is 16. – LRI64 #1 transmits its Response in Slot 0. It is the only one to do so, therefore no collision occurs and its UID is received and registered by the VCD; – The VCD sends an EOF, to switch to the next slot. – In slot 1, two LRI64 devices, #2 and #3, transmit their Responses. This generates a collision. The VCD records it, and remembers that a collision was detected in Slot 1. – The VCD sends an EOF, to switch to the next slot. – In Slot 2, no LRI64 transmits a Response. Therefore the VCD does not detect a LRI64 SOF, and decides to switch to the next slot by sending an EOF. – In slot 3, there is another collision caused by Responses from LRI64 #4 and #5 – The VCD then decides to send a Request (for instance a Read Block) to LRI64 #1, whose UID was already correctly received. – All LRI64 devices detect a SOF and exit the anti-collision sequence. They process this Request and since the Request is addressed to LRI64 #1, only LRI64 #1 transmits its Response. – All LRI64 devices are ready to receive another Request. If it is an Inventory command, the slot numbering sequence restarts from 0. Note: the decision to interrupt the anti-collision sequence is up to the VCD. It could have continued to send EOFs until Slot 15 and then send the Request to LRI64 #1. 17/38 18/38 Slot 0 Slot 1 Slot 2 Slot 3 VCD SOF Inventory EOF Request EOF EOF EOF Response 2 Response 4 SOF Request to EOF LRI512 1 Response from LRI512 1 Response 1 Response 3 Response 5 t1 t2 t1 t2 t3 t1 t2 t1 No collision Collision No Response Collision AI06831B LRI64 VICCs Timing Comment Figure 22. Description of a Possible Anti-collision Sequence between LRI64 Devices Time LRI64 TIMING DEFINITIONS Figure 22. shows three specific delay times: t1, t2 and t3. All of them have a minimum value, specified in Table 14.. The t1 parameter also has a maximum and a typical value specified in Table 14., as summarized in Table 8. Table 8. Timing Values Min. t1 t2 t3 t1(min) t2(min) = 4192 / fC t1(max) + tSOF (see notes1,2) Typ. t1(typ) = 4352 / fC — — Max. t1(max) — — Note: 1. tSOF is the duration for the LRI64 to transmit an SOF to the VCD. 2. t1(max) does not apply for write alike requests. Timing conditions for write alike requests are defined in the command description. 3. The tolerance of specific timings is ± 32/fC. LRI64 Response Delay, t1 Upon detection of the rising edge of the EOF received from the VCD, the LRI64 waits for a time equal to t1(typ) = 4352 / fC before starting to transmit its response to a VCD request, or switching to the next slot when in an inventory process. VCD New Request Delay, t2 t2 is the time after which the VCD may send an EOF to switch to the next slot when one or more LRI64 responses have been received during an inventory command. It starts from the reception of the EOF received from the LRI64 devices. The EOF sent by the VCD is 10% modulated, independent of the modulation index used for transmitting the VCD request to the LRI64. t2 is also the time after which the VCD may send a new request to the LRI64 as described in Figure 19. t2(min) = 4192 / fC VCD New Request Delay when there is No LRI64 Response, t3 t3 is the time after which the VCD may send an EOF to switch to the next slot when no LRI64 response has been received. The EOF sent by the VCD is 10% modulated, independent of the modulation index used for transmitting the VCD request to the LRI64. From the time the VCD has generated the rising edge of an EOF: – The VCD waits for a time at least equal to the sum of t3(min) and the typical response time of an LRI64, which depends on the data rate and subcarrier modulation mode, before sending a subsequent EOF. 19/38 LRI64 COMMANDS CODES The LRI64 supports the command codes listed in Table 9. Table 9. Command Codes Command Code 01h 02h 20h 21h 2Bh Function Inventory Stay Quiet Read Single Block Write Single Block Get System Info Inventory When receiving the Inventory request, the LRI64 performs the anti-collision sequence. The Inventory_flag is set to 1. The meanings of Flags 5 to 8 is as described in Table 5. The Request Frame (Figure 23.) contains: – Request Flags (Table 3. and Table 5.) – Inventory Command Code (01h, Table 9.) – AFI, if the AFI Flag is set – Mask Length – Mask Value – 2-byte CRC (Figure 16.) In case of errors in the Inventory request frame, the LRI64 does not generate any answer. The Response Frame (Figure 24.) contains: – Response Flags (Table 6.) – DSFID – Unique ID – 2-byte CRC (Figure 16.) Figure 23. Inventory, Request Frame Format Request SOF Request Command Optional Flags Code AFI 8 bits 8 bits 01h 8 bits Mask Length 8 bits Mask Value 0 to 8 bytes 2-Byte CRC 16 bits AI09729 Request EOF Figure 24. Inventory, Response Frame Format Response Response SOF Flags 8 bits DSFID 8 bits UID 64 bits 2-Byte CRC 16 bits AI09730 Response EOF 20/38 LRI64 Stay Quiet The Stay Quiet Command is always executed in Addressed Mode (the Address_Flag is set to 1). The Request Frame (Figure 25.) contains: – Request Flags (22h, as described in Table 3. and Table 4.) – Stay Quiet Command Code (02h, Table 9.) – Unique ID – 2-byte CRC (Figure 16.) When receiving the Stay Quiet command, the LRI64 enters the Quiet State and does not send back a Response. There is no response to the Stay Quiet Command. When in the Quiet State: – the LRI64 does not process any Request in which the Inventory_flag is set – the LRI64 responds to commands in the Addressed mode if the UID matches The LRI64 exits the Quiet State when it is taken to the Power Off state (Figure 20.). Figure 25. Stay Quiet, Request Frame Format Request SOF Request Command Flags Code 8 bits 22h 8 bits 02h UID 64 bits 2-Byte CRC 16 bits AI09731 Request EOF Figure 26. Stay Quiet Frame Exchange between VCD and LRI64 VCD SOF Stay Quiet Request EOF AI06842 21/38 LRI64 Read Single Block When receiving the Read Single Block Command, the LRI64 reads the requested block and sends back its 8-bit value in the Response. The Option_Flag is supported. The Read Single Block can be issued in both addressed and non addressed modes. The Request Frame (Figure 27.) contains: – Request Flags (Table 3. and Table 4.) – Read Single Block Command Code (20h, Table 9.) – Unique ID (Optional) – Block Number – 2-byte CRC (Figure 16.) If there is no error, at the LRI64, the Response Frame (Figure 28.) contains: – Response Flags (Table 6.) – Block Locking Status, if Option_Flag is set – 1 byte of Block Data (Table 10.) – 2-byte CRC (Figure 16.) Otherwise, if there is an error, the Response Frame (Figure 29.) contains: – Response Flags (01h, Table 6.) – Error Code (0Fh, Table 7.) – 2-byte CRC (Figure 16.) Table 10. Block Lock Status Bit 0 1 to 7 Name Block Locked Value 0 1 0 Description Current Block not locked Current Block locked RFU Figure 27. Read Single Block, Request Frame Format Request SOF Request Command Flags Code 8 bits 8 bits 20h UID 64 bits Block Number 8 bits 2-Byte CRC 16 bits AI09732 Request EOF Figure 28. Read Single Block, Response Frame Format, when Error_Flag is not Set Response Response BlockLock SOF Flags Status 8 bits 8 bits Data 8 bits 2-Byte CRC 16 bits AI09733 Response EOF Figure 29. Read Single Block, Response Frame Format, when Error_Flag is Set Response Response SOF Flags 8 bits 01h Error Code 8 bits 0Fh 2-Byte CRC 16 bits AI09734 Response EOF Figure 30. READ Single Block Frame Exchange between VCD and LRI64 VCD SOF Read Single Block Request EOF VICC t1 SOF Read Single Block Response EOF AI06832B 22/38 LRI64 Write Single Block When receiving the Write Single Block command, the LRI64 writes the requested block with the data contained in the Request and report the success of the operation in the Response. The Option_Flag is not supported and must be set to 0. The Write Single Block can be issued in both addressed and non addressed modes. During the write cycle tW, no modulation shall occur, otherwise the LRI64 may program the data incorrectly in the memory. The Request Frame (Figure 31.) contains: – Request Flags (Table 3. and Table 4.) – Write Single Block Command Code (21h, Table 9.) – Unique ID (Optional) – Block Number – Data – 2-byte CRC (Figure 16.) If there is no error, at the LRI64, an empty Response Frame (Figure 32.) is sent back after the write cycle, containing no parameters. It just contains: – Response Flags (Table 6.) – 2-byte CRC (Figure 16.) Otherwise, if there is an error, the Response Frame (Figure 33.) contains: – Response Flags (01h, Table 6.) – Error Code (0Fh, Table 7.) – 2-byte CRC (Figure 16.) Figure 31. Write Single Block, Request Frame Format Request SOF Request Command Flags Code 8 bits 8 bits 21h UID 64 bits Block Number 8 bits Data 8 bits 2-Byte CRC 16 bits AI09735 Request EOF Figure 32. Write Single Block, Response Frame Format, when Error_Flag is not Set Response Response SOF Flags 8 bits 2-Byte CRC 16 bits AI09736 Response EOF Figure 33. Write Single Block, Response Frame Format, when Error_Flag is Set Response Response SOF Flags 8 bit 01h Error Code 8 bits 0Fh 2-Byte CRC 16 bits AI09737 Response EOF Figure 34. Write Single Block Frame Exchange between VCD and LRI64 Write Single Block Request VCD SOF EOF VICC t1 SOF Write Single Block Response EOF Write sequence when error VICC tw t1 SOF Write Single Block Response EOF AI06833B 23/38 LRI64 Get System Info When receiving the Get System Info command, the LRI64 send back its information data in the Response.The Option_Flag is not supported and must be set to 0. The Get System Info can be issued in both addressed and non addressed modes. The Request Frame (Figure 27.) contains: – Request Flags (Table 3. and Table 4.) – Get System Info Command Code (2Bh, Table 9.) – Unique ID (Optional) – 2-byte CRC (Figure 16.) If there is no error, at the LRI64, the Response Frame (Figure 28.) contains: – Response Flags (Table 6.) – Information Flags set to 0Fh, indicating the four information fields that are present (DSFID, AFI, Memory Size, IC Reference) – Unique ID – DSFID value (as written in block 9) – AFI value (as written in block 8) – Memory size: for the LRI64, there are 15 blocks (0Eh) of 1 byte (00h). – IC Reference: only the 6 most significant bits are used. The product code of the LRI64 is 00 0101b=5d – 2-byte CRC (Figure 16.) Otherwise, if there is an error, the Response Frame (Figure 29.) contains: – Response Flags (01h, Table 6.) – Error Code (0Fh, Table 7.) – 2-byte CRC (Figure 16.) Figure 35. Get System Info, Request Frame Format Request SOF Request Command Flags Code 8 bits 8 bits 2Bh UID 64 bits 2-Byte CRC 16 bits AI09738 Request EOF Figure 36. Get System Info, Response Frame Format, when Error_Flag is not Set Response Response Information SOF Flags Flags 8 bits 00h 8 bits 0Fh UID 64 bits DSFID 8 bits AFI 8 bits Memory Size 16 bits 000Eh IC Ref 8 bits 000101xxb 2-Byte CRC 16 bits AI09739 Response EOF Figure 37. Get System Info, Response Frame Format, when Error_Flag is Set Response Response SOF Flags 8 bits 01h Error Code 8 bits 0Fh 2-Byte CRC 16 bits AI09740 Response EOF Figure 38. Get System Info Frame Exchange between VCD and LRI64 VCD SOF Get System Info Request EOF VICC t1 SOF Get System Info Response EOF AI09724 24/38 LRI64 MAXIMUM RATING Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not imTable 11. Absolute Maximum Ratings Symbol Parameter Min. 15 Wafer TSTG, hSTG, tSTG Storage Conditions A1, A6, A7 Max. 25 23 Unit °C months plied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. kept in its antistatic bag 15 40% 25 60% 2 ICC VMAX VESD Supply Current on AC0 / AC1 Input Voltage on AC0 / AC1 Electrostatic Discharge Voltage 1 A1, A6, A7 –20 –7 –7000 20 7 7000 °C RH years mA V V Note: 1. Mil. Std. 883 - Method 3015 2. ESD test: ISO10373-7 specification 25/38 LRI64 DC AND AC PARAMETERS This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC Characteristic tables that follow are derived from tests performed under the MeasureTable 12. Operating Conditions Symbol TA Parameter Ambient Operating Temperature Min. –20 Max. 85 Unit °C ment Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. Figure 39. LRI64 Synchronous Timing, Transmit and Receive A B tRFF tRFR fCC tRFSBL tMIN CD AI06680B Figure 39. shows an ASK modulated signal, from the VCD to the LRI64. The test condition for the AC/DC parameters are: Table 13. DC Characteristics Symbol VCC VRET Parameter Regulated Voltage Retromodulated Induced Voltage Read ICC Supply Current Write CTUN Internal Tuning Capacitor – – Close coupling condition with tester antenna (1mm) Gives LRI64 performance on tag antenna Test Conditions 1 Min. 1.5 Typ. Max. 3.0 Unit V mV ISO10373-7 VCC = 3.0V VCC = 3.0V f=13.56MHz for W4/1 f=13.56MHz for W4/2 10 50 150 21 28.5 µA µA pF pF Note: 1. TA=–20 to 85°C 26/38 LRI64 Table 14. AC Characteristics Symbol fC Parameter External RF Signal Frequency MI=(A-B)/(A+B) Test Conditions 1, 2 Min. 13.553 10 0 7.1 –2 From H-field min fC/32 4352/fC 4224/fC 93297/fC 313 309 0.1 423.75 320.9 311.5 322 314 6.88 Typ. 13.56 Max. 13.567 30 3.0 9.44 +2 1 Unit MHz % µs µs µs ms kHz µs µs ms MICARRIER 10% Carrier Modulation Index tRFR, tRFF tRFSBL tJIT tMINCD fSH t1 t2 tW 10% Rise and Fall Time 10% Minimum Pulse Width for Bit Bit Pulse Jitter Minimum Time from Carrier Generation to First Data Subcarrier Frequency High Time for LRI64 Response Time between Commands Programming Time Note: 1. TA=–20 to 85°C 2. All timing measurements were performed on a reference antenna with the following characteristics: External size: 75mm x 48mm Number of turns: 6 Width of conductor: 1mm Space between 2 conductors: 0.4mm Value of the Tuning Capacitor: 28.5pF (LRI64-W4) Value of the coil: 4.3µH Tuning Frequency: 14.4MHz. 27/38 LRI64 PACKAGE MECHANICAL Figure 40. A1 Antenna on Tape Outline C1 A1 B1 C2 A2 B2 Note: Drawing is not to scale. ai10119 Table 15. A1 Antenna on Tape Mechanical Data Symbol A1 A2 B1 B2 C1 C2 Coil Width Coil Length Antenna Cut Width Antenna Cut Length Die Position from Antenna Die Position from Antenna Silicon Thickness Q FNOM PA Unloaded Q value Unloaded free-air resonance H-field Energy for Device Operation Parameter Typ 45 76 49 82 23 56 180 35 15.1 0.03 90 MHz A/m dbµA/m Min 44.5 75.5 48.8 81.8 22.8 55.8 165 Max 45.5 76.5 49.2 82.2 23.2 56.2 195 Unit mm mm mm mm mm mm µm 28/38 LRI64 Figure 41. A6 Antenna on Tape Outline I A B ai10120 Note: Drawing is not to scale. Table 16. A6 Antenna on Tape Mechanical Data Symbol A B I Coil Diameter Antenna cut diameter Hole Diameter Overall Thickness of copper antenna coil Silicon Thickness Q FNOM PA Unloaded Q value Unloaded free-air resonance H-field Energy for Device Operation Parameter Typ 35 40 16 80 180 35 15.1 0.5 114 MHz A/m dbµA/m Min 34.5 38.8 15.8 70 165 Max 35.5 40.2 16.2 90 195 Unit mm mm mm µm µm 29/38 LRI64 Figure 42. A7 Antenna on Tape Outline A1 C1 B1 C2 A2 B2 ai10121 Note: Drawing is not to scale. Table 17. A7 Antenna on Tape Mechanical Data Symbol A1 A2 B1 B2 C1 C2 Coil Width Coil Length Antenna Cut Width Antenna Cut Length Die Position from Antenna Die Position from Antenna Overall Thickness of copper antenna coil Silicon Thickness Q FNOM PA Unloaded Q value Unloaded free-air resonance H-field Energy for Device Operation Parameter Typ 40 20 44 24 10 20 160 180 35 15.1 1 120 MHz A/m dbµA/m Min 39.5 19.5 43.8 23.8 9.8 19.8 145 165 Max 40.5 20.5 44.2 24.2 10.2 20.2 175 195 Unit mm mm mm mm mm mm µm µm 30/38 LRI64 Figure 43. 8-lead Ultra thin Fine pitch Dual Flat Package No lead (MLP) Outline D L3 e b L1 E E2 L A D2 ddd A1 UFDFPN-01 Note: Drawing is not to scale. Table 18. 8-lead Ultra thin Fine pitch Dual Flat Package No lead (MLP) Mechanical Data Millimeters Symbol Typ. A A1 b D D2 ddd E E2 e L L1 L3 N 8 0.30 8 0.50 0.45 3.00 0.15 – 0.40 0.25 – 0.50 0.15 0.012 0.020 0.018 0.25 2.00 1.55 1.65 0.05 0.118 0.006 – 0.016 0.010 – 0.020 0.006 0.55 Min. 0.50 0.00 0.20 Max. 0.60 0.05 0.30 0.010 0.079 0.061 0.065 0.002 Typ. 0.022 Min. 0.020 0.000 0.008 Max. 0.024 0.002 0.012 Inches 31/38 LRI64 PART NUMBERING Table 19. Ordering Information Scheme Example: Device Type LRI64 Package W4 =180 µm ± 15 µm Unsawn Wafer, 18.5 pF tuning capacitor SBN18= 180µm ± 15 µm Bumped and Sawn Wafer on 8-inch Frame A1T= 45mm x 76mm Copper Antenna on Continuous Tape A1S= 45mm x 76mm Copper Singulated Adhesive Antenna on Tape A6S2U= 35mm Copper Singulated Adhesive CD Antenna on white PET Tape and no marking A7T= 20mm x 40mm Copper Antenna on Continuous Tape MBTG = UDFDFPN8 (MLP8), Tape & Reel Packing, Lead-Free, RoHS compliant, Sb2O3-free and TBBA-free Customer Code XXX = Given by STMicroelectronics LRI64 – W4 / XXX For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST Sales Office, or send your enquiries to the following e-mail address: memories.contactless@st.com 32/38 LRI64 APPENDIX A. ALGORITHM FOR PULSED SLOTS The following pseudo-code describes how the anti-collision could be implemented on the VCD, using recursive functions. function function function function push (mask, address) pushes on private stack ; pop (mask, address) pops from private stack ; pulse_next_pause generates a power pulse ; store(LRI64_UID) stores LRI64_UID ; function poll_loop (sub_address_size as integer) pop (mask, address) mask = address & mask generates new mask ; ; send the Request mode = anti-collision send_Request (Request_cmd, mode, mask length, mask value) for sub_address = 0 to (2^sub_address_size - 1) pulse_next_pause if no_collision_is_detected ; LRI64 is inventoried then store (LRI64_UID) else remember a collision was detected ; push(mask,address) endif next sub_address if stack_not_empty ; if some collisions have been detected and then ; not yet processed, the function calls itself poll_loop (sub_address_size) recursively to process the last stored collision ; endif end poll_loop main_cycle: mask = null address = null push (mask, address) poll_loop(sub_address_size) end_main_cycle 33/38 LRI64 APPENDIX B. C-EXAMPLE TO CALCULATE OR CHECK THE CRC16 ACCORDING TO ISO/IEC 13239 The Cyclic Redundancy Check (CRC) is calculated on all data contained in a message, from the start of the Flags through to the end of Data. This CRC is used from VCD to LRI64 and from LRI64 to VCD. To add extra protection against shifting errors, a further transformation on the calculated CRC is made. The One’s Complement of the calculated Table 20. CRC Definition CRC Definition CRC Type ISO/IEC 13239 Length 16 bits X 16 CRC is the value attached to the message for transmission. For checking of received messages the 2 CRC bytes are often also included in the re-calculation, for ease of use. In this case, given the expected value for the generated CRC is the residue of F0B8h Polynomial +X 12 Direction = Ox8408 Backward Preset FFFFh Residue F0B8h +X +1 5 CRC Calculation Example This example in C language illustrates one method of calculating the CRC on a given set of bytes comprising a message. #define POLYNOMIAL0x8408// x^16 + x^12 + x^5 + 1 #define PRESET_VALUE0xFFFF #define CHECK_VALUE0xF0B8 #define NUMBER_OF_BYTES4// Example: 4 data bytes #define CALC_CRC1 #define CHECK_CRC0 void main() { unsigned int current_crc_value; unsigned char array_of_databytes[NUMBER_OF_BYTES + 2] = {1, 2, 3, 4, 0x91, 0x39}; int number_of_databytes = NUMBER_OF_BYTES; int calculate_or_check_crc; int i, j; calculate_or_check_crc = CALC_CRC; // calculate_or_check_crc = CHECK_CRC;// This could be an other example if (calculate_or_check_crc == CALC_CRC) { number_of_databytes = NUMBER_OF_BYTES; } else // check CRC { number_of_databytes = NUMBER_OF_BYTES + 2; } current_crc_value = PRESET_VALUE; for (i = 0; i < number_of_databytes; i++) { current_crc_value = current_crc_value ^ ((unsigned int)array_of_databytes[i]); for (j = 0; j < 8; j++) { if (current_crc_value & 0x0001) 34/38 LRI64 { current_crc_value = (current_crc_value >> 1) ^ POLYNOMIAL; } else { current_crc_value = (current_crc_value >> 1); } } } if (calculate_or_check_crc == CALC_CRC) { current_crc_value = ~current_crc_value; printf ("Generated CRC is 0x%04X\n", current_crc_value); // current_crc_value is now ready to be appended to the data stream // (first LSByte, then MSByte) } else // check CRC { if (current_crc_value == CHECK_VALUE) { printf ("Checked CRC is ok (0x%04X)\n", current_crc_value); } else { printf ("Checked CRC is NOT ok (0x%04X)\n", current_crc_value); } } } 35/38 LRI64 APPENDIX C. APPLICATION FAMILY IDENTIFIER (AFI) CODING AFI (Application Family Identifier) represents the type of application targeted by the VCD and is used to extract from all the LRI64 present only the LRI64 meeting the required application criteria. It is programmed by the LRI64 issuer (the purchaser of the LRI64). Once locked, it can not be modified. Table 21. AFI Coding AFI Most Significant Nibble 0 x x 0 1 2 3 4 5 6 7 8 9 A B C D E F AFI Least Significant Nibble 0 0 y y 0, y 0, y 0, y 0, y 0, y 0, y 0, y 0, y 0, y 0, y 0, y 0, y 0, y 0, y 0, y Meaning LRI64 Devices respond from All families and sub-families All sub-families of family X Only the Yth sub-family of family X Proprietary sub-family Y only Transport Financial Identification Telecommunication Medical Multimedia Gaming Data Storage Item Management Express Parcels Postal Services Airline Bags RFU RFU RFU Portable Files... Internet services.... Mass transit, Bus, Airline,... IEP, Banking, Retail,... Access Control,... Public Telephony, GSM,... Examples / Note The most significant nibble of AFI is used to code one specific or all application families, as defined in Table 21. The least significant nibble of AFI is used to code one specific or all application sub-families. Subfamily codes different from 0 are proprietary. No applicative preselection Wide applicative preselection Note: x and y each represent any single-digit hexadecimal value between 1 and F 36/38 LRI64 REVISION HISTORY Table 22. Document Revision History Date 27-Aug-2003 16-Jul-2004 22-Sep-2004 11-Jul-2005 7-Sept-2005 Rev. 1.0 2.0 3.0 4.0 5.0 First Issue First public release of full datasheet Values changed for tW, t1 and t2 Added MLP package information. Modified Option_Flag information in Get System Info command and added ISO 18000-3 Mode 1 compliance. Description of Revision 37/38 LRI64 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. 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