M27C160-100F1

M27C160 16 Mbit (2 Mb x 8 or 1 Mb x 16) UV EPROM and OTP EPROM Features ■ 5V ± 10% Supply Voltage in Read Operation ■ Access Time: 50 ns ■ Byte-wide or Word-wide Configurable ■ 16 Mbit Mask ROM Replacement ■ Low Power Consumption – Active Current: 70 mA at 8 MHz – Standby Current: 100 µA 42 42 ■ Programming Voltage: 12.5V ± 0.25V ■ Programming Time: 50 µs/word ■ Electronic Signature – Manufacturer Code: 20h – Device Code: B1h 1 1 PDIP42 (B) FDIP42W (F) 42 c u d 1 ■ SDIP42 (S) e t le ECOPACK® packages available PLCC44 (K) ) s ( ct o s b O - o r P ) s t( 44 1 SO44 (M) u d o r P e t e l o s b O April 2006 Rev 5 1/26 www.st.com 1 Contents M27C160 Contents 1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Two-line output control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 System considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.6 Presto III programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.7 Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.8 Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.9 Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.10 Erasure operation (applies to UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . 11 c u d e t le ) s t( o r P 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4 DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 ) s ( ct 5.1 42-pin Ceramic Frit-seal DIP with window (FDIP42WB) . . . . . . . . . . . . . 19 5.2 42-pin Plastic DIP, 600 mils width (PDIP42) . . . . . . . . . . . . . . . . . . . . . . . 20 5.3 42-lead Shrink Plastic DIP, 600 mils width (SDIP42) . . . . . . . . . . . . . . . . 21 5.5 t e l o s b O 7 2/26 u d o r P e 5.4 6 o s b O - 44-lead Square Plastic Leaded Chip Carrier (PLCC44) . . . . . . . . . . . . . . 22 44-lead Plastic Small Outline, 525 mils body width (SO44) . . . . . . . . . . . 23 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 M27C160 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Read Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Programming Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Read Mode AC Characteristics (-50 and -70) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Read Mode AC Characteristics (-90, -100, -120 and -150) . . . . . . . . . . . . . . . . . . . . . . . . 16 Programming Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 FDIP42WB package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 PDIP42 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 SDIP42 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 PLCC44 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 SO44 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Ordering Information Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O 3/26 List of figures M27C160 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 PLCC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 DIP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 SO Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Programming Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 AC Testing Input Output Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 AC Testing Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Word-Wide Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Byte-Wide Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 BYTE Transition AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Programming and Verify Modes AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 FDIP42WB package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 PDIP42 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 SDIP42 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 PLCC44 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 SO44 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 c u d e t le ) s ( ct u d o r P e t e l o s b O 4/26 o s b O - o r P ) s t( M27C160 1 Summary description Summary description The M27C160 is a 16-Mbit EPROM offered in two ranges UV (Ultraviolet Erase) and OTP (One-Time Programmable). It is ideally suited for microprocessor systems requiring large data or program storage and is organized as either 2 Mbit words of 8 bits or 1 Mbit word of 16 bits. The pin-out is compatible with a 16-Mbit Mask ROM. The FDIP42W (window ceramic frit-seal package) has a transparent lid which enables the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written rapidly to the device by following the programming procedure. For applications where the content is programmed only one time and erasure is not required, the M27C160 is offered in PDIP42, SDIP42, PLCC44 and SO44 packages. In order to meet environmental requirements, ST offers the M27C160 in ECOPACK® packages. ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ) s t( ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. c u d See Figure 1: Logic diagram and Table 1: Signal names for a brief overview of the signals connected to this device. Figure 1. Logic diagram e t le VCC o s b O 20 A0-A19 ) s ( ct E o r P Q15A–1 15 Q0-Q14 M27C160 G o r P e t e l o du BYTEVPP VSS AI00739B s b O 5/26 Summary description Table 1. M27C160 Signal names Signal Description A0-A19 Address Inputs Q0-Q7 Data Outputs Q8-Q14 Data Outputs Q15A–1 Data Output / Address Input E Chip Enable G Output Enable BYTEVPP Byte Mode / Program Supply VCC Supply Voltage VSS Ground NC Not Connected Internally PLCC Connections c u d A5 A6 A7 A17 A18 VSS A19 A8 A9 A10 A11 Figure 2. 1 44 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 12 u d o r P e t e l o s b O 6/26 M27C160 34 23 Q9 Q2 Q10 Q3 Q11 NC VCC Q4 Q12 Q5 Q13 ) s ( ct o s b O - e t le o r P A12 A13 A14 A15 A16 BYTEVPP VSS Q15A–1 Q7 Q14 Q6 AI03012 ) s t( M27C160 Summary description Figure 3. DIP Connections A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 1 42 41 2 40 3 39 4 5 38 6 37 7 36 8 35 9 34 10 33 M27C160 11 32 12 31 13 30 14 29 15 28 16 27 17 26 18 25 19 24 20 23 21 22 A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC AI00740 Figure 4. NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 ) s ( ct u d o r P e s b O t e l o e t le SO Connections so 1 44 2 43 42 3 41 4 5 40 6 39 7 38 8 37 9 36 10 35 11 34 M27C160 12 33 13 32 14 31 15 30 16 29 28 17 27 18 26 19 25 20 24 21 22 23 b O - c u d ) s t( o r P NC A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC AI01264 7/26 Device description 2 M27C160 Device description Table 2 lists the operating modes of the M27C160. A single power supply is required in the read mode. All inputs are TTL compatible except for VPP and 12V on A9 for the Electronic Signature. Table 2. Operating Modes Mode E G BYTEVPP A9 Q15A–1 Q8-Q14 Q7-Q0 Read Word-wide VIL VIL VIH X Data Out Data Out Data Out Read Byte-wide Upper VIL VIL VIL X VIH Hi-Z Data Out Read Byte-wide Lower VIL VIL VIL X VIL Hi-Z Data Out Output Disable VIL VIH X X Hi-Z Hi-Z Hi-Z VIL Pulse VIH VPP X Data In Data In Data In Verify VIH VIL VPP X Data Out Data Out Program Inhibit VIH VIH VPP X Hi-Z Hi-Z Standby VIH X X X Hi-Z Hi-Z Electronic Signature VIL VIL VIH VID Code Program Note: X = VIH or VIL, VID = 12V ± 0.5V. 2.1 Read mode r P e t le od uc Codes ) s t( Data Out Hi-Z Hi-Z Codes o s b O - The M27C160 has two organisations, Word-wide and Byte-wide. The organisation is selected by the signal level on the BYTEVPP pin. When BYTEVPP is at VIH the Word-wide organisation is selected and the Q15A–1 pin is used for Q15 Data Output. When the BYTEVPP pin is at VIL the Byte-wide organisation is selected and the Q15A–1 pin is used for the Address Input A–1. When the memory is logically regarded as 16 bit wide, but read in the Byte-wide organisation, then with A–1 at VIL the lower 8 bits of the 16 bit data are selected and with A–1 at VIH the upper 8 bits of the 16 bit data are selected. ) s ( ct u d o The M27C160 has two control functions, both of which must be logically active in order to obtain data at the outputs. In addition the Word-wide or Byte- wide organisation must be selected. r P e t e l o s b O 2.2 Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. Standby mode The M27C160 has a standby mode which reduces the active current from 50mA to 100µA. The M27C160 is placed in the standby mode by applying a CMOS high signal to the E input. 8/26 M27C160 Device description When in the standby mode, the outputs are in a high impedance state, independent of the G input. 2.3 Two-line output control Because EPROMs are usually used in larger memory arrays, this product features a 2-line control function which accommodates the use of multiple memory connection. The two line control function allows: ● the lowest possible memory power dissipation, ● complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. 2.4 System considerations c u d ) s t( The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the supplies to the devices. The supply current ICC has three segments of importance to the system designer: the standby current, the active current and the transient peaks that are produced by the falling and rising edges of E. e t le o r P The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device outputs. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommended that a 0.1µF ceramic capacitor is used on every device between VCC and VSS. This should be a high frequency type of low inherent inductance and should be placed as close as possible to the device. In addition, a 4.7µF electrolytic capacitor should be used between VCC and VSS for every eight devices. ) s ( ct o s b O - This capacitor should be mounted near the power supply connection point. The purpose of this capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces. 2.5 l o s b O 2.6 u d Programming o r P ete When delivered (and after each erasure for UV EPROM), all bits of the M27C160 are in the '1' state. Data is introduced by selectively programming '0's into the desired bit locations. Although only '0's will be programmed, both '1's and '0's can be present in the data word. The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The M27C160 is in the programming mode when VPP input is at 12.5V, G is at VIH and E is pulsed to VIL. The data to be programmed is applied to 16 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. VCC is specified to be 6.25V ± 0.25V. Presto III programming algorithm The Presto III Programming Algorithm allows the whole array to be programed with a guaranteed margin in a typical time of 52.5 seconds. Programming with Presto III consists of 9/26 Device description M27C160 applying a sequence of 50µs program pulses to each word until a correct verify occurs (see Figure 5). During programing and verify operation a Margin mode circuit is automatically activated to guarantee that each cell is programed with enough margin. No overprogram pulse is applied since the verify in Margin mode provides the necessary margin to each programmed cell. Figure 5. Programming Flowchart VCC = 6.25V, VPP = 12.5V n=0 E = 50µs Pulse NO ++n = 25 YES FAIL NO VERIFY ++ Addr YES Last Addr NO c u d YES CHECK ALL WORDS BYTEVPP =VIH 1st: VCC = 6V 2nd: VCC = 4.2V so e t le 2.7 Program Inhibit ) s ( ct ) s t( o r P AI01044B b O - Programming of multiple M27C160s in parallel with different data is also easily accomplished. Except for E, all like inputs including G of the parallel M27C160 may be common. A TTL low level pulse applied to a M27C160's E input and VPP at 12.5V, will program that M27C160. A high level E input inhibits the other M27C160s from being programmed. u d o 2.8 r P Program Verify e t e l o s b O 2.9 A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with E at VIH and G at VIL, VPP at 12.5V and VCC at 6.25V. Electronic Signature The Electronic Signature (ES) mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. The ES mode is functional in the 25°C ± 5°C 10/26 M27C160 Device description ambient temperature range that is required when programming the M27C160. To activate the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of the M27C160, with VPP = VCC = 5V. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer code and byte 1 (A0 = VIH) the device identifier code. For the STMicroelectronics M27C160, these two identifier bytes are given in Table 3 and can be read-out on outputs Q7 to Q0. Table 3. Electronic Signature Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data Manufacturer’s Code VIL 0 0 1 0 0 0 0 0 20h Device Code VIH 1 0 1 1 0 0 0 1 B1h Note: Outputs Q15-Q8 are set to '0'. 2.10 Erasure operation (applies to UV EPROM) ) s t( The erasure characteristics of the M27C160 is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å range. Research shows that constant exposure to room level fluorescent lighting could erase a typical M27C160 in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. If the M27C160 is to be exposed to these types of lighting conditions for extended periods of time, it is suggested that opaque labels be put over the M27C160 window to prevent unintentional erasure. The recommended erasure procedure for M27C160 is exposure to short wave ultraviolet light which has a wavelength of 2537 Å. The integrated dose (i.e. UV intensity x exposure time) for erasure should be a minimum of 30 W-sec/cm2. The erasure time with this dosage is approximately 30 to 40 minutes using an ultraviolet lamp with 12000 µW/cm2 power rating. The M27C160 should be placed within 2.5cm (1 inch) of the lamp tubes during the erasure. Some lamps have a filter on their tubes which should be removed before erasure. c u d e t le ) s ( ct o r P o s b O - u d o r P e t e l o s b O 11/26 Maximum ratings 3 M27C160 Maximum ratings Table 4. Absolute Maximum Ratings (1) Symbol Value Unit Ambient Operating Temperature (2) –40 to 125 °C TBIAS Temperature Under Bias –50 to 125 °C TSTG Storage Temperature –65 to 150 °C VIO (3) Input or Output Voltage (except A9) –2 to 7 V Supply Voltage –2 to 7 V –2 to 13.5 V –2 to 14 V TA VCC VA9 (3) VPP Parameter A9 Voltage Program Supply Voltage 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. c u d 2. Depends on range. o r P ) s t( 3. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. e t le ) s ( ct u d o r P e t e l o s b O 12/26 o s b O - M27C160 4 DC and AC characteristics DC and AC characteristics TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC Table 5. Read Mode DC Characteristics (1) Symbol Parameter Test Condition Min. Max. Unit ILI Input Leakage Current 0V ≤ VIN ≤ VCC ±1 µA ILO Output Leakage Current 0V ≤ VOUT ≤ VCC ±10 µA E = VIL, G = VIL, IOUT = 0mA, f = 8MHz 70 mA E = VIL, G = VIL, IOUT = 0mA, f = 5MHz 50 mA E = VIH 1 mA ICC Supply Current ICC1 Supply Current (Standby) TTL ICC2 Supply Current (Standby) CMOS E > VCC – 0.2V 100 µA IPP Program Current 10 µA VIL Input Low Voltage VIH (2) VPP = VCC uc –0.3 Input High Voltage od 2 VOL Output Low Voltage IOL = 2.1mA VOH Output High Voltage TTL IOH = –400µA e t le Pr ) s t( 0.8 V VCC + 1 V 0.4 V 2.4 V 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. o s b O - 2. Maximum DC voltage on Output is VCC +0.5V. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.5V ± 0.25V Table 6. Programming Mode DC Characteristics (1) Symbol ct ILI Input Leakage Current ICC Supply Current o r P e du Test Condition Min. 0 ≤ VIN ≤ VCC Max. Unit ±1 µA 50 mA 50 mA IPP Program Current VIL Input Low Voltage –0.3 0.8 V VIH Input High Voltage 2.4 VCC + 0.5 V VOL Output Low Voltage IOL = 2.1mA 0.4 V VOH Output High Voltage TTL IOH = –2.5mA VID A9 Voltage t e l o s b O (s) Parameter E = VIL 3.5 11.5 V 12.5 V 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 13/26 DC and AC characteristics Table 7. M27C160 Capacitance (1) Symbol CIN COUT Parameter Test Condition Min. Max. Unit Input Capacitance (except BYTEVPP) VIN = 0V 10 pF Input Capacitance (BYTEVPP) VIN = 0V 120 pF VOUT = 0V 12 pF Output Capacitance 1. Sampled only, not 100% tested. TA = 25 °C, f = 1 MHz Table 8. AC Measurement Conditions Parameter High Speed Standard Input Rise and Fall Times ≤ 10ns ≤ 20ns Input Pulse Voltages 0 to 3V 0.4V to 2.4V 1.5V 0.8V and 2V Input and Output Timing Ref. Voltages Figure 6. AC Testing Input Output Waveform High Speed c u d 3V o r P 1.5V 0V e t le Standard 2.4V 0.4V Figure 7. (s) t c u r P e bs O 2.0V 0.8V AI01822 AC Testing Load Circuit od t e l o o s b O 1.3V 1N914 3.3kΩ DEVICE UNDER TEST OUT CL CL = 30pF for High Speed CL = 100pF for Standard CL includes JIG capacitance 14/26 AI01823B ) s t( M27C160 DC and AC characteristics TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC Table 9. Read Mode AC Characteristics (1) (-50 and -70) M27C160 Symbol Alt Test Condition Parameter -50 (2) Min. tAVQV tACC Address Valid to Output Valid E = VIL, G = VIL -70 (2) Max. Min. Unit Max. 50 70 ns tBHQV tST BYTE High to Output Valid E = VIL, G = VIL 50 70 ns tELQV tCE Chip Enable Low to Output Valid G = VIL 50 70 ns tGLQV tOE Output Enable Low to Output E = VIL Valid 30 35 ns tBLQZ (3) tSTD BYTE Low to Output Hi-Z E = VIL, G = VIL 30 30 ns tEHQZ (3) tDF Chip Enable High to Output Hi-Z G = VIL 0 25 0 25 ns tGHQZ (3) tDF Output Enable High to OutputHi-Z E = VIL 0 25 25 ns tAXQX tOH Address Transition to Output E = VIL, G = VIL Transition c u d tBLQX tOH BYTE Low to Output Transition e t le E = VIL, G = VIL o r P 5 5 0 ) s t( 5 ns 5 ns o s b O - 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Speed obtained with High Speed AC measurement conditions. 3. Sampled only, not 100% tested. ) s ( ct u d o r P e t e l o s b O 15/26 DC and AC characteristics Table 10. M27C160 Read Mode AC Characteristics(1) (-90, -100, -120 and -150) M27C160 Symbol Alt Test Condition Parameter -90 (2) -100 (2) -120/-150 (2) Unit Min. Max. Min. Max. Min. Max. Address Valid to Output Valid E = VIL, G = VIL 90 100 120 ns tST BYTE High to Output Valid E = VIL, G = VIL 90 100 120 ns tELQV tCE Chip Enable Low to Output Valid G = VIL 90 100 120 ns tGLQV tOE Output Enable Low to Output Valid E = VIL 45 50 60 ns tBLQZ (3) tSTD BYTE Low to Output Hi- E = VIL, Z G = VIL 30 40 50 ns tEHQZ (3) tDF Chip Enable High to Output Hi-Z G = VIL 0 30 0 40 0 50 ns tGHQZ (3) tDF Output Enable High to OutputHi-Z E = VIL 0 30 0 40 0 50 ns tAXQX tOH Address Transition to Output Transition E = VIL, G = VIL 5 tBLQX tOH BYTE Low to Output Transition E = VIL, G = VIL 5 tAVQV tACC tBHQV e t le c u d o r P ) s t( 5 5 ns 5 5 ns o s b O - 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Speed obtained with High Speed AC measurement conditions. 3. Sampled only, not 100% tested. Figure 8. A0-A19 u d o r P e E ) s ( ct Word-Wide Read Mode AC Waveforms t e l o VALID tAVQV tGLQV VALID tAXQX tEHQZ G bs O Q0-Q15 tELQV tGHQZ Hi-Z AI00741B Note: 16/26 BYTEVPP = VIH. M27C160 DC and AC characteristics Figure 9. Byte-Wide Read Mode AC Waveforms VALID A–1,A0-A19 VALID tAVQV tAXQX E tEHQZ tGLQV G tGHQZ tELQV Hi-Z Q0-Q7 AI00742B BYTEVPP = VIL. Note: c u d Figure 10. BYTE Transition AC Waveforms VALID A0-A19 A–1 so tAVQV BYTEVPP ) s ( ct Q0-Q7 Q8-Q15 u d o r P e bs t e l o Note: e t le VALID b O - ) s t( o r P tAXQX tBHQV DATA OUT tBLQX Hi-Z DATA OUT tBLQZ AI00743C Chip Enable (E) and Output Enable (G) = VIL. O 17/26 DC and AC characteristics M27C160 TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.5V ± 0.25V Table 11. Programming Mode AC Characteristics(1) Symbol Alt tAVEL tAS Address Valid to Chip Enable Low 2 µs tQVEL tDS Input Valid to Chip Enable Low 2 µs tVPHAV tVPS VPP High to Address Valid 2 µs tVCHAV tVCS VCC High to Address Valid 2 µs tELEH tPW Chip Enable Program Pulse Width 45 tEHQX tDH Chip Enable High to Input Transition 2 µs tQXGL tOES Input Transition to Output Enable Low 2 µs tGLQV tOE Output Enable Low to Output Valid tDFP Output Enable High to Output Hi-Z 0 tAH Output Enable High to Address Transition 0 tGHQZ (2) tGHAX Parameter Test Condition Min Max 55 Unit µs 120 ns 130 ns c u d ) s t( ns 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Sampled only, not 100% tested. o r P Figure 11. Programming and Verify Modes AC Waveforms A0-A19 tAVEL b O - tQVEL BYTEVPP (s) tVPHAV d o r P e t e l o bs O 18/26 DATA OUT tEHQX tGLQV t c u VCC G so DATA IN Q0-Q15 E e t le VALID tVCHAV tGHQZ tGHAX tELEH tQXGL PROGRAM VERIFY AI00744 M27C160 Package mechanical data 5 Package mechanical data 5.1 42-pin Ceramic Frit-seal DIP with window (FDIP42WB) Figure 12. FDIP42WB package outline A2 A1 B1 B A L α e C eA D2 eB D S N K E1 E K1 1 FDIPW-C Table 12. FDIP42WB package mechanical data millimeters Typ. A 0.50 A2 3.90 B 0.40 B1 1.27 C 0.22 5.08 0.55 ) s ( ct Typ. Max. 0.225 0.020 0.070 0.154 0.200 0.016 0.022 1.52 0.050 0.060 0.31 0.009 0.012 54.81 2.158 E1 du 14.50 14.90 0.571 0.587 e 2.29 2.79 0.090 0.110 eA 15.40 15.80 0.606 0.622 eB 16.17 18.32 0.637 0.721 K 9.32 9.47 0.367 0.373 K1 11.30 11.55 0.445 0.455 L 3.18 4.10 0.125 0.161 S 1.52 2.49 0.060 0.098 α 4° 15° 4° 15° D2 E o r P e s b O Min. e t le o s b O 1.78 D t e l o Max. 5.71 A1 o r P inches Symbol Min. c u d ) s t( N 50.80 2.000 15.24 42 0.600 42 19/26 Package mechanical data 5.2 M27C160 42-pin Plastic DIP, 600 mils width (PDIP42) Figure 13. PDIP42 package outline A A2 A1 B1 B α L e1 eA D2 C eB D S N E1 E 1 PDIP Table 13. PDIP42 package mechanical data millimeters c u d inches Symbol Min. Typ. A 0.25 A2 3.56 4.06 B 0.38 0.53 B1 1.27 C 0.20 D 52.20 0.010 ) s ( ct 50.80 e1 o r P e eA s b O 20/26 15.24 13.59 e t le so 1.65 E E1 Min. 5.08 A1 D2 t e l o Max. du 0.140 Typ. o r P 0.015 ) s t( Max. 0.200 0.160 0.021 0.050 0.065 0.36 0.008 0.014 52.71 2.055 2.075 b O - 13.84 2.000 0.600 0.535 0.545 2.54 0.100 14.99 0.590 eB 15.24 17.78 0.600 0.700 L 3.18 3.43 0.125 0.135 S 0.86 1.37 0.034 0.054 α 0° 10° 0° 10° N 42 42 M27C160 5.3 Package mechanical data 42-lead Shrink Plastic DIP, 600 mils width (SDIP42) Figure 14. SDIP42 package outline A2 A1 A b2 b L e eA D2 c eB D S N E1 E 1 SDIP Table 14. SDIP42 package mechanical data millimeters c u d inches Symbol Min. Typ. A 0.51 A2 3.05 3.81 4.57 b 0.38 0.46 0.56 b2 0.89 1.02 1.14 c 0.23 0.25 D 36.58 36.83 0.020 ) s ( ct 35.60 e E E1 o r P e eA 1.78 15.24 du 12.70 13.72 s b O so e t le 0.120 Typ. o r P 3.30 0.200 0.180 0.015 0.018 0.022 0.035 0.040 0.045 0.38 0.009 0.010 0.015 37.08 1.440 1.450 1.460 b O - 1.402 0.070 16.00 0.600 14.48 0.500 0.630 0.540 0.570 0.600 18.54 2.54 Max. 0.150 15.24 eB L Min. 5.08 A1 D2 t e l o Max. ) s t( 3.56 0.730 0.100 0.130 S 0.64 0.025 N 42 42 0.140 21/26 Package mechanical data 5.4 M27C160 44-lead Square Plastic Leaded Chip Carrier (PLCC44) Figure 15. PLCC44 package outline D D1 A1 c 1 N B1 E3 e E2 E1 E B D3 A2 A CP D2 uc ) s t( PLCC-B Table 15. millimeters P e let Symbol Min. 4.570 A1 2.290 3.040 A2 3.650 B 0.331 B1 0.661 22/26 c u d D 17.400 D1 16.510 D2 14.990 o r P e O Max. 4.200 c bs Typ. A CP t e l o d o r PLCC44 package mechanical data D3 so (t s) Min. inches Typ. Max. 0.1654 0.1799 0.0902 0.1197 3.700 0.1437 0.1457 0.533 0.0130 0.0210 0.812 0.0260 0.0320 b O - 0.101 0.0040 0.510 0.0201 17.650 0.6850 0.6949 16.662 0.6500 0.6560 16.000 0.5902 12.700 0.6299 0.5000 E 17.400 17.650 0.6850 0.6949 E1 16.510 16.660 0.6500 0.6559 E2 14.990 16.000 0.5902 0.6299 E3 12.700 0.5000 e 1.270 0.0500 N 44 44 M27C160 5.5 Package mechanical data 44-lead Plastic Small Outline, 525 mils body width (SO44) Figure 16. SO44 package outline A A2 C b e CP D N E EH 1 A1 α L SO-d Table 16. c u d SO44 package mechanical data millimeters inches Symbol Min. Typ. A A1 0.10 A2 2.20 2.30 b 0.35 0.40 C 0.10 0.15 CP D 28.00 E c u d EH o r P e e L t e l o 13.20 15.75 Max. Min. 2.80 e t le o r P Typ. Max. 0.1102 0.0039 (t s) 28.20 so 2.40 0.0866 0.0906 0.0945 0.50 0.0138 0.0157 0.0197 0.20 0.0039 0.0059 0.0079 b O - 0.08 0.0030 28.40 1.1024 1.1102 1.1181 13.30 13.50 0.5197 0.5236 0.5315 16.00 16.25 0.6201 0.6299 0.6398 1.27 0.0500 0.80 0.0315 α N ) s t( 8° 44 8° 44 s b O 23/26 Part numbering 6 M27C160 Part numbering Table 17. Ordering Information Scheme Example: M27C160 -70 X M 1 Device Type M27 Supply Voltage C = 5V Device Function 160 = 16 Mbit (2mb x 8 or 1Mb x 16) Speed -50 (1) = 50 ns -70 (1) c u d = 70 ns -90 = 90 ns -100 = 100 ns -120 = 120 ns -150 = 150 ns e t le VCC Tolerance blank = ± 10% X = ± 5% Package ) s ( ct F = FDIP42W B = PDIP42 o r P o s b O - u d o S = SDIP42 K = PLCC44 ) s t( r P e M = SO44 t e l o Temperature Range 1 = 0 to 70 °C s b O 24/26 6 = –40 to 85 °C 1. High Speed, see AC Characteristics section for further information. For a list of available options (Speed, Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you. M27C160 7 Revision history Revision history Table 18. Document revision history Date Revision Changes January 1999 1 First Issue 20-Sep-00 2 AN620 Reference removed 19-Jul-01 3 SDIP42 package added 17-Jan-02 4 50ns speed class added, SO44 package mechanical data and drawing clarified 12-Apr-2006 5 Converted to new template. Updated ECOPACK® information. Removed Tape & Reel info. c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O 25/26 M27C160 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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