M74HC259

M 54HC259 M74HC259 8 BIT ADDRESSABLE LATCH . . . . . . . . HIGH SPEED tPD = 15 ns (TYP.) at VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL PROPAGATION DELAYS IOH = IOL = 4 mA (MIN.) BALANCED PRORAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V to 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS259 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HC259F1R M74HC259M1R M74HC259B1R M74HC259C1R DESCRIPTION The M54/74HC259 is a high speed CMOS 8 BIT ADDRESSABLE LATCH fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. The M54HC259/M74HC259 has single data input (D) 8 latch outputs (Q0-Q7), 3 address inputs (A, B, and C), common enable input (E), and a common CLEAR input. To operate this device as an addressable latch, data is held on the D input, and the address of the latch into which the data is to be entered is held on the A, B, and C inputs. When ENABLE is taken low the data flows through to the addresses output. The data is stored on the positive-going edge of the ENABLE pulse. All unaddressed latches will remain unaffected. With ENABLE in the high state the device is deselected and all latches remain in their previous state, unaffected by changes on the data or address inputs. To eliminate the possibility of entering erroneous data into the latches, the ENABLE should be held high (inactive) while the address lines are changing. If ENABLE is held high and CLEAR is taken low all eight latches are cleared to the low state. If ENABLE is low all latches except the addressed latch will be cleared. The addressed latch will instead follow the D input, effectively implementing a 3-to 8 line decoder. All inputs are equipped with protection circuits against static discharge and transient excess voltage. October 1992 NC = No Internal Connection PIN CONNECTIONS (top view) 1/12 M54/M74HC259 T RUTH TABLE INPUTS CLEAR H H L L ENABLE L H L H OUTPUTS OF ADDRESSED LATCH D Qi0 D L EACH OTHER OUTPUT Qi0 Qi0 L L FUNCTION ADDRESSABLE LATCH MEMORY 8 LINE DEMULTIPLEXER CLEAR ALL BITS TO ’L’ D: The level at the data input Qi0: The level before the indicated steady state input conditions were established, (i = 0, 1, .....,7). SELECT INPUTS C L L L L H H H H B L L H H L L H H A L H L H L H L H LATCH ADDRESSED Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 LOGIC DIAGRAM 2/12 M54/M74HC259 INPUT AND OUTPUT EQUIVALENT CIRCUIT P IN DESCRIPTION PIN No 1, 2, 3 4, 5, 6, 7, 9, 10, 11, 12 13 14 15 8 16 SYMBOL A, B, C Q0 to Q7 D ENABLE CLEAR GND VCC NAME AND FUNCTION Address Inputs Latch Outputs Data Input Latch Enable Input (Active LOW) Conditional Reset Input (Active LOW) Ground (0V) Positive Supply Voltage IEC LOGIC SYMBOL ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK ICC IO or IGND PD Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Source Sink Current Per Output Pin DC VCC or Ground Current Power Dissipation Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 25 ± 50 500 (*) -65 to +150 300 Unit V V V mA mA mA mA mW o o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied. (*) 500 mW: ≅ 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC 3/12 M54/M74HC259 R ECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top tr, tf Supply Voltage Input Voltage Output Voltage Operating Temperature: M54HC Series M74HC Series Input Rise and Fall Time Parameter Value 2 to 6 0 to VCC 0 to VCC -55 to +125 -40 to +85 0 to 1000 0 to 500 0 to 400 Unit V V V C C ns o o VCC = 2 V VCC = 4.5 V VCC = 6 V DC SPECIFICATIONS Test Conditions Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 VOL Low Level Output Voltage 2.0 4.5 6.0 4.5 6.0 II ICC Input Leakage Current Quiescent Supply Current 6.0 6.0 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 ±0.1 4 TA = 25 oC 54HC and 74HC Min. 1.5 3.15 4.2 0.5 1.35 1.8 VI = IO=-20 µA VIH or V IL IO=-4.0 mA IO=-5.2 mA VI = IO= 20 µA VIH or V IL IO= 4.0 mA IO= 5.2 mA VI = VCC or GND VI = VCC or GND 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.33 0.33 ±1 40 Typ. Max. Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 ±1 80 µA µA V V Max. Min. 1.5 3.15 4.2 0.5 1.35 1.8 V Max. V Unit VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage V IL V OH 4/12 M54/M74HC259 A C ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns) Test Conditions Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 5 66 TA = 25 C 54HC and 74HC Min. Typ. 30 8 7 56 18 15 76 24 20 57 19 16 45 15 13 28 7 6 24 6 5 12 3 3 Max. 75 15 13 140 28 24 190 38 32 150 30 26 115 23 20 75 15 13 75 15 13 50 10 9 25 5 5 5 5 5 0 0 0 10 o Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. 95 19 16 175 35 30 240 48 41 190 38 32 145 29 25 90 19 16 90 19 16 60 12 11 30 6 5 5 5 5 0 0 0 10 Min. Max. 110 22 19 210 42 36 285 57 48 225 45 38 175 35 30 115 23 20 115 23 20 75 15 13 40 8 7 5 5 5 0 0 0 10 Unit tTLH tTHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tW(L) Output Transition Time Propagation Delay Time (DATA - Q) Propagation Delay Time (A, B, C - Q) Propagation Delay Time (G - Q) Propagation Delay Time (CLEAR - Q) Minimum Pulse Width (ENABLE) Minimum Pulse Width (CLEAR) Minimum Set-up Time (DATA) Minimum Set-up Time (A, B, C) Minimum Hold Time (DATA) Minimum Hold Time (A, B, C) Input Capacitance Power Dissipation Capacitance ns ns ns ns ns ns tW(L) ns ts ns ts ns th ns th ns pF pF CIN CPD (*) (*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC 5/12 M54/M74HC259 SWITCHING CHARACTERISTICS TEST WAVEFORM WAVEFORM 1. (ENABLE = L, CLR = H, A ∼ C = WAVEFORM 2. (G = L) WAVEFORM 3. (CLR = H, A ∼ C = Stable) ENABLE WAVEFORM 4. (D = H, A ∼ C - Stable) WAVEFORM 5. (CLR = H) ENABLE ENABLE 6/12 M54/M74HC259 TEST CIRCUIT ICC (Opr.) ENABLE ENABLE 7/12 M54/M74HC259 Plastic DIP16 (0.25) MECHANICAL DATA mm MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP. MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 inch TYP. MAX. DIM. P001C 8/12 M54/M74HC259 Ceramic DIP16/1 MECHANICAL DATA mm MIN. A B D E e3 F G H L M N P Q 7.8 2.29 0.4 1.17 0.22 0.51 0.38 17.78 2.79 0.55 1.52 0.31 1.27 10.3 8.05 5.08 0.307 0.090 0.016 0.046 0.009 0.020 3.3 0.015 0.700 0.110 0.022 0.060 0.012 0.050 0.406 0.317 0.200 TYP. MAX. 20 7 0.130 MIN. inch TYP. MAX. 0.787 0.276 DIM. P053D 9/12 M54/M74HC259 SO16 (Narrow) MECHANICAL DATA DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8° (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45° (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 P013H 10/12 M54/M74HC259 PLCC20 MECHANICAL DATA mm MIN. A B D d1 d2 E e e3 F G M M1 1.27 1.14 7.37 1.27 5.08 0.38 0.101 0.050 0.045 9.78 8.89 4.2 2.54 0.56 8.38 0.290 0.050 0.200 0.015 0.004 TYP. MAX. 10.03 9.04 4.57 MIN. 0.385 0.350 0.165 0.100 0.022 0.330 inch TYP. MAX. 0.395 0.356 0.180 DIM. P027A 11/12 M54/M74HC259 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. © 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 12/12