M74HC4518RM13TR

M74HC4518 DUAL DECADE COUNTER ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 60 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4518 DESCRIPTION The M74HC4518 is an high speed CMOS DUAL BINARY COUNTER fabricated with silicon gate C2MOS technology. It consist of two identical internally synchronous 4-stage counters. The counter stages are D-TYPE flip-flops having interchangeable CLOCK and ENABLE inputs for incrementing on either the positive-going or negative-going transition. For single-unit operation the ENABLE input is maintained "high" and the counter advances on ) (s t c u d o r P e DIP PACKAGE TUBE t e l o s b O TSSOP u d o r P e ORDER CODES DIP SOP TSSOP ) s ( ct SOP M74HC4518B1R M74HC4518M1R T&R M74HC4518RM13TR M74HC4518TTR each positive-going transition of the CLOCK. The counters are cleared by high levels on their clear lines. The counter can be cascaded in the ripple mode by connecting Q4 to the enable input of the subsequent counter while the clock input of the latter is held permanently low. All inputs are equipped with protection circuits against static discharge and transient excess voltage. t e l o s b O PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/11 M74HC4518 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1CLOCK, 2CLOCK 1ENABLE, 2ENABLE 1Q0 to 1Q3 1CLEAR, 2CLEAR 1, 9 2, 10 3, 4, 5, 6 7, 15 11, 12, 13, 14 8 16 NAME AND FUNCTION Clock Inputs (LOW to HIGH, Edge-Triggered) Clock Enable Inputs Data Outputs Asynchronous Reset Inputs (Active LOW) 2Q0 tO 2Q3 Data Outputs GND Vcc u d o TRUTH TABLE INPUTS CLOCK ENABLE CLEAR H L e t e l L o s b X X O ) L s ( t c H X X X : Don’t Care Z : High Impedance u d o r P e LOGIC DIAGRAM t e l o s b O This logic diagram has not be used to estimate propagation delays 2/11 ) s ( ct Ground (0V) Positive Supply Voltage Pr FUNCTION INCREMENT COUNTER L INCREMENT COUNTER L NO CHANGE L NO CHANGE L NO CHANGE L NO CHANGE H Q0 THRU Q3=L M74HC4518 TIMING CHART ) s ( ct u d o r P e t e l o ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter )- Supply Voltage t(s s b O Value Unit -0.5 to +7 V -0.5 to VCC + 0.5 V -0.5 to VCC + 0.5 ± 20 mA VI DC Input Voltage VO DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA c u d o r P ICC or IGND DC VCC or Ground Current PD Power Dissipation e t e ol Tstg Storage Temperature TL Lead Temperature (10 sec) s b O V ± 50 mA 500(*) mW -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C 3/11 M74HC4518 RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Value Supply Voltage VI Input Voltage VO Output Voltage Top Operating Temperature Input Rise and Fall Time tr, tf Unit 2 to 6 V 0 to VCC V 0 to VCC V -55 to 125 °C VCC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns ) s ( ct DC SPECIFICATIONS Test Condition Symbol VIH Parameter Min. 2.0 4.5 6.0 2.0 4.5 6.0 Low Level Input Voltage VOH TA = 25°C VCC (V) High Level Input Voltage VIL High Level Output Voltage 1.5 3.15 4.2 2.0 IO=-20 µA 4.5 IO=-20 µA 4.5 6.0 t e l o bs II O ICC 4/11 r P e Input Leakage Current Quiescent Supply Current )- b O s ( t c u d o Low Level Output Voltage Typ. u d o -40 to 85°C Max. e t e l so 6.0 VOL Value Pr Min. 1.5 3.15 4.2 0.5 1.35 1.8 Max. -55 to 125°C Min. 2.0 1.9 1.9 4.4 4.5 4.4 4.4 IO=-20 µA 5.9 6.0 5.9 5.9 IO=-4.0 mA 4.18 4.31 4.13 4.10 IO=-5.2 mA 5.68 5.63 V 0.5 1.35 1.8 1.9 5.8 Max. 1.5 3.15 4.2 0.5 1.35 1.8 Unit V V 5.60 2.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=20 µA 0.0 0.1 0.1 0.1 6.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=4.0 mA 0.17 0.26 0.37 0.40 6.0 IO=5.2 mA 0.18 0.26 0.37 0.40 6.0 VI = VCC or GND ± 0.1 ±1 ±1 µA 6.0 VI = VCC or GND 4 40 80 µA V M74HC4518 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tPLH tPHL Propagation Delay Time (CK, ENABLE - Qn) tPHL fMAX Propagation Delay Time (CLR - Qn) Maximum Clock Frequency tW(H) tW(L) Minimum Pulse Width (CLOCK ,ENABLE) tW(L) Minimum Pulse Width (CLEAR) tREM TA = 25°C VCC (V) tTLH tTHL Output Transition Time Minimum Removal Time (CLEAR) Value 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Min. Typ. Max. 75 15 13 160 32 27 150 30 26 6 30 35 30 8 7 72 22 18 65 20 16 23 51 60 25 6 5 20 5 4 21 3 3 )- s ( t c -55 to 125°C Min. Min. Max. 95 19 16 200 40 34 190 38 33 75 15 13 75 15 13 50 10 9 o r P 4 20 24 95 19 16 95 19 16 60 12 11 Unit Max. 110 22 19 240 48 41 225 45 38 ns ns ) s ( t c u d 4.8 24 28 e t e ol s b O -40 to 85°C ns MHz 110 22 19 110 22 19 75 15 13 ns ns ns CAPACITIVE CHARACTERISTICS Symbol CPD O bs Pr Parameter ete Test Condition VCC (V) Value TA = 25°C Typ. Max. Input Capacitance 5 10 Power Dissipation Capacitance (note 1) 38 ol CIN u d o Min. -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 (per Counter) 5/11 M74HC4518 TEST CIRCUIT ) s ( ct u d o r P e CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) t e l o WAVEFORM 1: MINIMUM PULSE WIDTH AND REMOVAL TIME (f=1MHz; 50% duty cycle) ) (s t c u d o r P e t e l o s b O 6/11 s b O M74HC4518 WAVEFORM 2 : PROPAGATION DELAY TIME, MINIMUM PULSE WIDTH(f=1MHz; 50% duty cycle) ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 7/11 M74HC4518 Plastic DIP-16 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 0.77 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D ) s ( ct 20 E 8.5 e 2.54 e3 17.78 u d o 0.335 7.1 I 5.1 s ( t c 1.27 e t e ol bs O ) 3.3 Z Pr 0.100 F L 0.787 0.700 0.280 0.201 0.130 0.050 u d o r P e t e l o s b O P001C 8/11 M74HC4518 SO-16 MECHANICAL DATA mm. DIM. MIN. TYP A inch MAX. MIN. TYP. a1 1.75 MAX. 0.1 0.068 0.2 a2 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 b1 0.19 0.25 0.007 C 0.5 0.018 ) s ( ct 0.010 0.019 c1 45° (typ.) D 9.8 10 0.385 E 5.8 6.2 0.228 e 1.27 e3 8.89 F 3.8 4.0 4.6 5.3 L 0.5 ) (s e t e l so b O 1.27 S Pr 0.393 0.244 0.050 G M u d o 0.62 0.350 0.149 0.157 0.181 0.208 0.019 0.050 0.024 8° (max.) t c u d o r P e t e l o s b O PO13H 9/11 M74HC4518 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 c 0.09 0.20 0.004 D 4.9 5 5.1 0.193 E 6.2 6.4 6.6 0.244 E1 4.3 4.4 4.48 1 e bs 0.65 BSC K 0° L 0.45 let o s b 0.60 s ( t c 0.75 du ro P e 0.0089 0.197 0.201 0.252 0.260 0.173 0.176 0.0256 BSC 0° 8° 0.018 0.024 0.030 u d o r P e A O ) 8° 0.012 t e l o 0.169 ) s ( ct A2 A1 b O e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 10/11 M74HC4518 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com 11/11