M74HC4518TTR

M74HC4518 DUAL DECADE COUNTER s s s s s s s HIGH SPEED : fMAX = 60 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4518 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC4518B1R M74HC4518M1R T&R M74HC4518RM13TR M74HC4518TTR DESCRIPTION The M74HC4518 is an high speed CMOS DUAL BINARY COUNTER fabricated with silicon gate C2MOS technology. It consist of two identical internally synchronous 4-stage counters. The counter stages are D-TYPE flip-flops having interchangeable CLOCK and ENABLE inputs for incrementing on either the positive-going or negative-going transition. For single-unit operation the ENABLE input is maintained "high" and the counter advances on each positive-going transition of the CLOCK. The counters are cleared by high levels on their clear lines. The counter can be cascaded in the ripple mode by connecting Q4 to the enable input of the subsequent counter while the clock input of the latter is held permanently low. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/11 M74HC4518 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 9 2, 10 3, 4, 5, 6 7, 15 11, 12, 13, 14 8 16 SYMBOL 1CLOCK, 2CLOCK 1ENABLE, 2ENABLE 1Q0 to 1Q3 1CLEAR, 2CLEAR NAME AND FUNCTION Clock Inputs (LOW to HIGH, Edge-Triggered) Clock Enable Inputs Data Outputs Asynchronous Reset Inputs (Active LOW) 2Q0 tO 2Q3 Data Outputs GND Vcc Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS FUNCTION CLOCK ENABLE H L X X L H X X : Don’t Care Z : High Impedance CLEAR L L L L L L INCREMENT COUNTER INCREMENT COUNTER NO CHANGE NO CHANGE NO CHANGE NO CHANGE Q0 THRU Q3=L X H LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/11 M74HC4518 TIMING CHART ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 25 ± 50 500(*) -65 to +150 300 Unit V V V mA mA mA mA mW °C °C ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg TL Storage Temperature Lead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C 3/11 M74HC4518 RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top tr, tf Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time VCC = 2.0V VCC = 4.5V VCC = 6.0V Parameter Value 2 to 6 0 to VCC 0 to VCC -55 to 125 0 to 1000 0 to 500 0 to 400 Unit V V V °C ns ns ns DC SPECIFICATIONS Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 VOL Low Level Output Voltage 2.0 4.5 6.0 4.5 6.0 II ICC Input Leakage Current Quiescent Supply Current 6.0 6.0 IO=-20 µA IO=-20 µA IO=-20 µA IO=-4.0 mA IO=-5.2 mA IO=20 µA IO=20 µA IO=20 µA IO=4.0 mA IO=5.2 mA VI = VCC or GND VI = VCC or GND TA = 25°C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 ± 0.1 4 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.37 0.37 ±1 40 Typ. Max. Value -40 to 85°C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 ±1 80 µA µA V V Max. -55 to 125°C Min. 1.5 3.15 4.2 0.5 1.35 1.8 Max. V Unit VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage VIL V VOH 4/11 M74HC4518 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 TA = 25°C Min. Typ. 30 8 7 72 22 18 65 20 16 23 51 60 25 6 5 20 5 4 21 3 3 Max. 75 15 13 160 32 27 150 30 26 4.8 24 28 75 15 13 75 15 13 50 10 9 95 19 16 95 19 16 60 12 11 Value -40 to 85°C Min. Max. 95 19 16 200 40 34 190 38 33 4 20 24 110 22 19 110 22 19 75 15 13 -55 to 125°C Min. Max. 110 22 19 240 48 41 225 45 38 ns Unit tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (CK, ENABLE - Qn) tPHL Propagation Delay Time (CLR - Qn) Maximum Clock Frequency Minimum Pulse Width (CLOCK ,ENABLE) Minimum Pulse Width (CLEAR) Minimum Removal Time (CLEAR) ns ns fMAX 6 30 35 MHz tW(H) tW(L) tW(L) ns ns tREM ns CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) TA = 25°C Min. Typ. 5 38 Max. 10 Value -40 to 85°C Min. Max. 10 -55 to 125°C Min. Max. 10 pF pF Unit CIN CPD Input Capacitance Power Dissipation Capacitance (note 1) 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 (per Counter) 5/11 M74HC4518 TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM 1: MINIMUM PULSE WIDTH AND REMOVAL TIME (f=1MHz; 50% duty cycle) 6/11 M74HC4518 WAVEFORM 2 : PROPAGATION DELAY TIME, MINIMUM PULSE WIDTH(f=1MHz; 50% duty cycle) 7/11 M74HC4518 Plastic DIP-16 (0.25) MECHANICAL DATA mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 TYP. MAX. inch P001C 8/11 M74HC4518 SO-16 MECHANICAL DATA DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8° (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45° (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 PO13H 9/11 M74HC4518 TSSOP16 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0° 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8° 0.75 0° 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8° 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0089 0.201 0.260 0.176 inch A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 10/11 M74HC4518 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com 11/11