M74HC4538

M74HC4538 Dual retriggerable monostable multivibrator Features ■ ■ High speed: tPD = 25 ns (typ.) at VCC = 6 V Low power dissipation standby state: ICC = 4 μA (max.) at TA = 25 °C active state: ICC = 200 μA (max.) at VCC = 6 V High noise immunity: VNIH = VNIL = 28 % VCC (min.) Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) Balanced propagation delays: tPLH ≅ tPHL Wide operating voltage range: VCC (opr) = 2 to 6 V Wide output pulse width range: tWOUT = 120 ns ~ 60 s over at VCC = 4.5 V Pin and function compatible with 74 series 4538 TSSOP16 SO-16 DIP-16 ■ ■ ■ ■ ■ ■ Description The M74HC4538 is a high speed CMOS monostable multivibrator fabricated with silicon gate C2MOS technology. Each multivibrator features both a negative A, and a positive B, edge triggered input, either of which can be used as an inhibit input. Also included is a clear input that when taken low resets the one shot. The monostable multivibrators are retriggerable. That is, they may be triggered repeatedly while their outputs are generating a pulse and the pulse will be extended. Pulse width stability over a wide range of temperature and supply is achieved using linear CMOS techniques. The output pulse equation is simply: PW = 0.7 (R)(C) where PW is in seconds, R in Omhs and C is in Farads. All the inputs are equipped with protection circuits against static discharge and transient excess voltage. Table 1. Device summary Order code M74HC4538B1R Package DIP-16 SO-16 TSSOP16 Packaging Tube Tape and reel Tape and reel M74HC4538RM13TR M74HC4538TTR May 2008 Rev 2 1/18 www.st.com 18 Pin connection and IEC logic symbols M74HC4538 1 Pin connection and IEC logic symbols Figure 1. Pin connections and IEC logic symbols 1T1 1T2 1CD 1 16 15 14 13 12 11 10 9 VCC 2T1 2T2 2CD 2A 2B Q2 Q2 2 3 4 5 6 7 8 Inputs 1A 1B Q1 Inputs Outputs Outputs Q1 GND Table 2. Pin description Symbol 1T1, 2T1 1T2, 2T2 1CD, 2CD 1A, 2A 1B, 2B Q1, Q2 Q1, Q2 GND VCC Name and function External capacitor connections External resistor, capacitor connections Direct reset inputs (active low) Trigger inputs (low to high, edge-triggered) Trigger inputs (high to low, edge-triggered) Pulse outputs Complementary pulse outputs Ground (0 V) Positive supply voltage Pin number 1, 15 2, 14 3, 13 4, 12 5, 11 6, 10 7, 9 8 16 2/18 M74HC4538 Figure 2. Input and output equivalent circuit Pin connection and IEC logic symbols VCC VCC Input Output GND GND Table 3. Truth table Inputs Outputs Note CD H H H H X L L H L L H H Q Q Output enable Inhibit Inhibit Output enable Inhibit A B H X H L X L X Figure 3. System diagram 3/18 Pin connection and IEC logic symbols Figure 4. Timing chart M74HC4538 Figure 5. Block diagram 1. Cx, Rx, Dx are external components. 2. Dx is a clamping diode. The external capacitor is charged to VCC in the standby state, i.e. no trigger. When the supply voltage is turned off Cx is discharged mainly through an internal parasitic diode (see figures). If Cx is sufficiently large and VCC decreases rapidly, there will be some possibility of damaging the IC with a surge current or latchup. If the voltage supply filter capacitor is large enough and VCC decreases slowly, the surge current is automatically limited and damage to the IC is avoided. The maximum forward current of the parasitic diode is approximately 20 mA. In cases where Cx is large the time taken for the supply voltage to fall to 0.4 VCC can be calculated as follows: tf > (VCC - 0.7) x Cx/20 mA. In cases where tf is too short an external clamping diode is required to protect the IC from the surge current. 4/18 M74HC4538 Functional description 2 Functional description Standby state The external capacitor Cx, is fully charged to VCC in the standby state. Hence, before triggering, transistor Qp and Qn (connected to the Rx/Cx node) are both turned-off. The two comparators that control the timing and the two reference voltage sources stop operating. The total supply current is therefore only leakage current. Trigger operation Triggering occurs when: – – A is low and B has a falling edge B is high and A has a rising edge After the multivibrator has been retriggered, the comparator C1 and C2 start operating and Qn is turned on. Cx then discharges through Qn. The voltage at the node Rx/Cx external falls. When it reaches VREFL the output of comparator C1 becomes low. This in turn resets the flip-flop and Qn is turned off. At this point C1 stops functioning but C2 continues to operate. The voltage at R/C external begins to rise with a time constant set by the external components Rx and Cx. Triggering the multivibrator causes Q to go high after internal delay due to the flip-flop and the gate. Q remains high until the voltage at R/C external rises again to VREFH . At this point C2 output goes low and G goes low. C2 stops operating. That means that after triggering when the voltage R/C external returns to VREFH the multivibrator has returned to its monostable state. In the case where Rx · Cx are large enough and the discharge time of the capacitor and the delay time in the IC can be ignored, the width of the output pulse tw(out) is as follows: t W( OUT ) = 0.72Cx • Rx Re-triggered operation When a second triggered pulse follows the first, its effect will depend on the state of the multivibrator. If the capacitor Cx is being charged, the voltage level of Rx/Cx external falls to VREFL again and Q remains high i.e. the retrigger pulse arrives in a time shorter than the period Rx · Cx seconds, the capacitor charging time constant. If the second trigger pulse is very close to the initial trigger pulse it is ineffective; i.e. the second trigger must arrive in the capacitor discharge cycle to be ineffective; hence the minimum time for a second trigger to be effective, trr (min.) depends on VCC and Cx. Reset operation CD is normally high. If CD is low, the trigger is not effective because Q output goes low and trigger control flip-flop is reset. Also transistor Op is turned on and Cx is charged quickly to VCC. Then, if CD input goes low the IC becomes waiting state both in operating and non operating state. 5/18 Maximum rating M74HC4538 3 Maximum rating Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. Symbol VCC VI VO IIK IOK IO ICC or IGND PD Tstg TL Supply voltage DC input voltage DC output voltage DC input diode current DC output diode current DC output current DC VCC or ground current Power dissipation Storage temperature Lead temperature (10 sec) Absolute maximum ratings Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 25 ± 50 500(1) -65 to +150 300 Unit V V V mA mA mA mA mW °C °C 1. 500 mW at 65 ° C; derate to 300 mW by 10 mW/ ° C from 65° C to 85° C 3.1 Recommended operating conditions Table 5. Symbol VCC VI VO Top Supply voltage Input voltage Output voltage Operating temperature VCC = 2.0 V tr, tf Input rise and fall time (CD only) VCC = 4.5 V VCC = 6.0 V Cx Rx External capacitor External resistor VCC ≤3.0 V VCC ≥ 3.0 V Recommended operating conditions Parameter Value 2 to 6 0 to VCC 0 to VCC -55 to 125 0 to 1000 0 to 500 0 to 400 No limitation 5 K to 1 M 1 K to 1 M Unit V V V °C ns ns ns pF Ω 6/18 M74HC4538 Electrical characteristics 4 Table 6. Electrical characteristics DC specifications Test condition Value TA = 25°C Min 2.0 VIH High level input voltage 4.5 6.0 2.0 VIL Low level input voltage 4.5 6.0 2.0 4.5 VOH High level output voltage 6.0 4.5 6.0 2.0 4.5 VOL Low level output voltage 6.0 4.5 6.0 II II ICC Input leakage current Input leakage current Quiescent supply current Quiescent supply current 6.0 6.0 6.0 2.0 ICC 4.5 6.0 IO = -20 μA IO = -20 μA IO = -20 μA IO = -4.0 mA IO = -5.2 mA IO = 20 μA IO = 20 μA IO = 20 μA IO = 4.0 mA IO = 5.2 mA VI = VCC or GND VI = VCC or GND Rext/Cext VI = VCC or GND VI = VCC or GND Pin 2 or 14 VIN = VCC/2 40 0.2 0.3 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 ± 0.1 ± 0.1 4 120 0.3 0.6 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.33 0.33 ±1 ±1 40 160 0.4 0.8 Typ Max -40 to 85°C Min 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 ±1 ±1 80 200 0.6 1.0 μA μA μA μA mA mA V V Max -55 to 125°C Min 1.5 3.15 4.2 0.5 1.35 1.8 V V Max Unit Symbol Parameter VCC (V) 7/18 Electrical characteristics M74HC4538 Table 7. AC electrical characteristics (CL = 50 pF, Input tr = tf = 6 ns) Test condition Value TA = 25°C Min 2.0 Output transition time Typ 30 8 7 120 30 25 100 25 20 Rx = 5 KΩ Cx=0 Rx = 1 KΩ Rx = 1 KΩ 70 Cx = 0.01 μF Rx = 10 KΩ 69 69 0.67 Cx = 0.1 μF Rx = 10 KΩ 0.67 0.67 540 180 150 83 77 77 0.75 0.73 0.73 Max 75 15 13 250 50 43 195 39 33 1200 250 200 96 85 85 0.83 0.77 0.77 70 69 69 0.67 0.67 0.67 -40 to 85°C Min Max 95 19 16 315 63 54 245 49 42 1500 320 260 96 85 85 0.83 0.77 0.77 70 69 69 0.67 0.67 0.67 -55 to 125°C Min Max 110 22 19 375 75 64 295 59 50 1800 375 320 96 85 85 0.9 0.8 0.8 ms μs ns ns ns ns Unit Symbol Parameter VCC (V) tTLH tTHL 4.5 6.0 tPLH tPHL Propagation delay time (A, B - Q, Q) Propagation delay time (CD - Q, Q) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 tPLH tPHL tWOUT Output pulse width 4.5 6.0 2.0 4.5 6.0 ΔtWOUT Output pulse width error between circuits in same package 2.0 4.5 6.0 2.0 4.5 6.0 2.0 ±1 % Minimum pulse tW(H) tW(L) width (A,B) Minimum pulse width (CD) 30 8 7 30 8 7 0 0 0 75 15 13 75 15 13 15 5 5 95 19 16 95 19 16 15 5 5 110 22 19 110 22 19 20 7 ns ns ns tW(L) tREM Minimum clear removal time 4.5 6.0 8/18 M74HC4538 Table 7. Electrical characteristics AC electrical characteristics (CL = 50 pF, Input tr = tf = 6 ns) (continued) Test condition Value TA = 25°C Min 2.0 4.5 Cx = 0.1 μF Rx = 1KΩ Typ 380 92 72 6 Cx = 0.01μF Rx = 1KΩ 1.4 1.2 μs ns Max -40 to 85°C Min Max -55 to 125°C Min Max Unit Symbol Parameter VCC (V) trr Minimum retrigger time 6.0 2.0 4.5 6.0 Table 8. Capacitive characteristics Test condition Value TA = 25°C Min Typ 5 70 Max 10 -40 to 85°C Min Max 10 -55 to 125°C Min Max 10 pF pF Unit Symbol Parameter VCC (V) 5.0 5.0 CIN CPD Input capacitance Power dissipation capacitance (1) 1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC’ Duty/100 + Ic/2(per monostable) (Icc’ : Active Supply current) (Duty : %) 9/18 Electrical characteristics Figure 6. Test circuit M74HC4538 Figure 7. Waveform: propagation delay times (f = 1 MHz; 50% duty cycle) 10/18 M74HC4538 Package mechanical data 5 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 11/18 Package mechanical data M74HC4538 Plastic DIP-16 (0.25) MECHANICAL DATA mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 TYP. MAX. inch P001C 12/18 M74HC4538 Package mechanical data SO-16 MECHANICAL DATA DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8° (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45° (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.25 1.64 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.010 0.063 0.018 0.010 0016020D 13/18 Package mechanical data M74HC4538 TSSOP16 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0° 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8° 0.75 0° 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8° 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0079 0.201 0.260 0.176 inch A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 14/18 M74HC4538 Package mechanical data Tape & Reel SO-16 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.45 10.3 2.1 3.9 7.9 12.8 20.2 60 22.4 6.65 10.5 2.3 4.1 8.1 0.254 0.406 0.082 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.262 0.414 0.090 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch 15/18 Package mechanical data M74HC4538 Tape & Reel TSSOP16 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.7 5.3 1.6 3.9 7.9 12.8 20.2 60 22.4 6.9 5.5 1.8 4.1 8.1 0.264 0.209 0.063 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.272 0.217 0.071 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch 16/18 M74HC4538 Revision history 6 Revision history Table 9. Date 01-Jul-2001 Document revision history Revision 1 Initial release. Document converted and restructured to new template. Removed: M74HC4538M1R order code. Minor text changes. Added: SO-16 and TSSOP16 tape and reel specifications. Changes 26-May-2008 2 17/18 M74HC4538 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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