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M87C257-70C6TR

M87C257-70C6TR

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    M87C257-70C6TR - Address Latched 256 Kbit (32Kb x8) UV EPROM and OTP EPROM - STMicroelectronics

  • 数据手册
  • 价格&库存
M87C257-70C6TR 数据手册
M87C257 Address Latched 256 Kbit (32Kb x8) UV EPROM and OTP EPROM Feature summary ■ ■ ■ ■ 5V ± 10% supply voltage in Read operation Integrated address latch Access time: 45ns Low power consumption: – Active Current 30mA – Standby Current 100µA Programming voltage: 12.75V ± 0.25V Programming times of around 3s Electronic signature – Manufacturer Code: 20h – Device Code: 80h ECOPACK® packages available PLCC32 (C) 28 1 ■ ■ ■ FDIP28W (F) ■ May 2006 Rev 2 1/9 www.st.com 1 Contents M87C257 Contents 1 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 2.10 Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Two Line Output Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 System considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 PRESTO II programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Erasure operation (applies for UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . 10 3 4 5 6 7 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2/22 M87C257 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Read mode DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Programming mode DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Read mode AC characteristics 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Read mode AC characteristics 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Programming mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 FDIP28WB - 28 pin Ceramic Frit-seal DIP, with window (round 0.280"), package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3/22 List of figures M87C257 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 DIP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 LCC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Programming flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 AC testing input output waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 AC testing load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Read mode AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Programming and Verify modes AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, package outline . . . . . . . . . . . . . . 18 PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package outline. . . . . . . . . . . 19 4/22 M87C257 Description 1 Description The M87C257 is a 256 Kbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It incorporates latches for all address inputs to minimize chip count, reduce cost, and simplify the design of multiplexed bus systems and is organized as 32,768 by 8 bits. The FDIP28W (window ceramic frit-seal package) has a transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure. For applications where the content is programmed only one time and erasure is not required, the M87C257 is offered in PLCC32 package. In order to meet environmental requirements, ST offers the M87C257 in ECOPACK® packages. ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 1. Logic diagram VCC 15 A0-A14 8 Q0-Q7 E G ASVPP M87C257 VSS AI00928B 5/22 Description Table 1. A0-A14 Q0-Q7 E G ASVPP VCC VSS NC DU M87C257 Signal names Address Inputs Data Outputs Chip Enable Output Enable Address Strobe / Program Supply Supply Voltage Ground Not Connected Internally Don’t Use Figure 2. DIP connections ASVPP A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS 1 28 2 27 3 26 4 25 5 24 6 23 7 22 M87C257 8 21 9 20 10 19 11 18 12 17 13 16 14 15 AI00929 VCC A14 A13 A8 A9 A11 G A10 E Q7 Q6 Q5 Q4 Q3 Figure 3. LCC connections A7 A12 ASVPP DU VCC A14 A13 1 32 A6 A5 A4 A3 A2 A1 A0 NC Q0 A8 A9 A11 NC G A10 E Q7 Q6 9 M87C257 25 17 Q1 Q2 VSS DU Q3 Q4 Q5 AI00930 6/22 M87C257 Device operation 2 Device operation The modes of operation of the M87C257 are listed in the Operating Modes. A single power supply is required in the read mode. All inputs are TTL levels except for VPP and 12V on A9 for Electronic Signature. 2.1 Read mode The M87C257 has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable (AS = VIH) or latched (AS = VIL), the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQVtGLQV.The M87C257 reduces the hardware interface in multiplexed address-data bus systems. The processor multiplexed bus (AD0-AD7) may be tied to the M87C257's address and data pins. No separate address latch is needed because the M87C257 latches all address inputs when AS is low. 2.2 Standby mode The M87C257 has a standby mode which reduces the active current from 30mA to 100µA (Address Stable). The M87C257 is placed in the standby mode by applying a CMOS high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the G input. 2.3 Two Line Output Control Because EPROMs are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: ● ● the lowest possible memory power dissipation, complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is desired from a particular memory device. 7/22 Device operation M87C257 2.4 System considerations The power switching characteristics of Advance CMOS EPROMs require careful decoupling of the devices. The supply current, ICC, has three segments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E. The magnitude of this transient current peaks is dependent on the capacitive and inductive loading of the device at the output. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommended that a 0.1µF ceramic capacitor be used on every device between VCC and VSS. This should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used between VCC and VSS for every eight devices. The bulk capacitor should be located near the power supply connection point. The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces. 2.5 Programming When delivered (and after each erasure for UV EPROM), all bits of the M87C257 are in the '1' state. Data is introduced by selectively programming '0's into the desired bit locations. Although only '0's will be programmed, both '1's and '0's can be present in the data word. The only way to change a '0' to a '1' is by die exposition to ultraviolet light (UV EPROM). The M87C257 is in the programming mode when VPP input is at 12.75V, G is at VIH and E is pulsed to VIL. The data to be programmed is applied to 8 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. VCC is specified to be 6.25 V ± 0.25 V. 2.6 PRESTO II programming algorithm PRESTO II Programming Algorithm allows to program the whole array with a guaranteed margin, in a typical time of 3.5 seconds. Programming with PRESTO II involves the application of a sequence of 100µs program pulses to each byte until a correct verify occurs (see Figure 4). During programming and verify operation, a MARGIN MODE circuit is automatically activated in order to guarantee that each cell is programmed with enough margin. No overprogram pulse is applied since the verify in MARGIN MODE provides necessary margin to each programmed cell. 8/22 M87C257 Figure 4. Programming flowchart VCC = 6.25V, VPP = 12.75V Device operation n=0 E = 100µs Pulse NO ++n = 25 YES NO VERIFY YES Last Addr NO ++ Addr FAIL YES CHECK ALL BYTES 1st: VCC = 6V 2nd: VCC = 4.2V AI00760B 2.7 Program Inhibit Programming of multiple M87C257s in parallel with different data is also easily accomplished. Except for E, all like inputs including G of the parallel M87C257 may be common. A TTL low level pulse applied to a M87C257's E input, with VPP at 12.75V, will program that M87C257. A high level E input inhibits the other M87C257s from being programmed. 2.8 Program Verify A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with G at VIL, E at VIH, VPP at 12.75V and VCC at 6.25V. 9/22 Device operation M87C257 2.9 Electronic signature The Electronic Signature (ES) mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. The ES mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the M87C257. To activate the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of the M87C257, with VCC = VPP = 5V. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer code and byte 1 (A0 = VIH) the device identifier code. When A9 = VID, AS need not be toggled to latch each identifier address. For the STMicroelectronics M87C257, these two identifier bytes are given in Table 4 and can be read-out on outputs Q7 to Q0. 2.10 Erasure operation (applies for UV EPROM) The erasure characteristics of the M87C257 is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å range. Research shows that constant exposure to room level fluorescent lighting could erase a typical M87C257 in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. If the M87C257 is to be exposed to these types of lighting conditions for extended periods of time, it is suggested that opaque labels be put over the M87C257 window to prevent unintentional erasure. The recommended erasure procedure for the M87C257 is exposure to short wave ultraviolet light which has wavelength 2537Å. The integrated dose (i.e. UV intensity x exposure time) for erasure should be a minimum of 15 W-sec/cm2. The erasure time with this dosage is approximately 15 to 20 minutes using an ultraviolet lamp with 12000 µW/cm2 power rating. The M87C257 should be placed within 2.5 cm (1 inch) of the lamp tubes during the erasure. Some lamps have a filter on their tubes which should be removed before erasure. 10/22 M87C257 Maximum rating 3 Maximum rating Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 2. Symbol TA TBIAS TSTG VIO(2) VCC VA9(2) VPP Ambient Operating Absolute maximum ratings Parameter Temperature(1) Value –40 to 125 –50 to 125 –65 to 150 –2 to 7 –2 to 7 –2 to 13.5 –2 to 14 Unit °C °C °C V V V V Temperature Under Bias Storage Temperature Input or Output Voltage (except A9) Supply Voltage A9 Voltage Program Supply Voltage 1. Depends on range. 2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. Table 3. Operating modes Mode E VIL VIL VIL VIL Pulse VIH VIH VIH VIL G VIL VIL VIH VIH VIL VIH X VIL A9 X X X X X X X VID ASVPP VIL VIH X VPP VPP VPP X VIL Q7-Q0 Data Out Data Out Hi-Z Data In Data Out Hi-Z Hi-Z Codes Read (Latched Address) Read (Applied Address) Output Disable Program Verify Program Inhibit Standby Electronic Signature 1. X = VIH or VIL, VID = 12V ± 0.5V. Table 4. Electronic signature A0 VIL VIH Q7 0 1 Q6 0 0 Q5 1 0 Q4 0 0 Q3 0 0 Q2 0 0 Q1 0 0 Q0 0 0 Hex Data 20h 80h Identifier Manufacturer’s Code Device Code 11/22 DC and AC parameters M87C257 4 DC and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC Characteristic tables that follow are derived from tests performed under the Measurement Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. Table 5. AC measurement conditions High Speed Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages ≤10ns 0 to 3V 1.5V Standard ≤20ns 0.4V to 2.4V 0.8V and 2V Figure 5. AC testing input output waveform High Speed 3V 1.5V 0V Standard 2.4V 2.0V 0.8V AI01822 0.4V Figure 6. AC testing load circuit 1.3V 1N914 3.3kΩ DEVICE UNDER TEST CL OUT CL = 30pF for High Speed CL = 100pF for Standard CL includes JIG capacitance AI01823B 12/22 M87C257 Table 6. Symbol CIN COUT DC and AC parameters Capacitance(1) (2) Parameter Input Capacitance Output Capacitance Test Condition VIN = 0V VOUT = 0V Min Max 6 12 Unit pF pF 1. TA = 25 °C, f = 1 MHz 2. Sampled only, not 100% tested. Table 7. Symbol ILI ILO ICC Read mode DC characteristics(1) (2) Parameter Input Leakage Current Output Leakage Current Supply Current Test Condition 0V ≤VIN ≤VCC 0V ≤VOUT ≤VCC E = VIL, G = VIL, IOUT = 0mA, f = 5MHz E = VIH, ASVPP = VIH, Address Switching E = VIH, ASVPP = VIL, Address Stable E > VCC – 0.2V, ASVPP ≥ VCC – 0.2V, Address Switching E > VCC – 0.2V, ASVPP = VSS, Address Stable VPP = VCC –0.3 2 IOL = 2.1mA IOH = –1mA VCC – 0.8V Min Max ±10 ±10 30 10 1 6 100 100 0.8 VCC + 1 0.4 Unit µA µA mA mA mA mA µA µA V V V V ICC1 Supply Current (Standby) TTL ICC2 Supply Current (Standby) CMOS IPP VIL VIH(3) VOL VOH Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage 1. TA = 0 to 70 °C, –40 to 85 °C; –40 to 105 °C or –40 to 125 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 3. Maximum DC voltage on Output is VCC +0.5V. Table 8. Symbol ILI ICC IPP VIL VIH VOL VOH VID Programming mode DC characteristics(1) (2) Parameter Input Leakage Current Supply Current Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage TTL A9 Voltage IOL = 2.1mA IOH = –1mA VCC – 0.8 11.5 12.5 E = VIL –0.3 2 Test Condition VIL ≤VIN ≤VIH Min Max ±10 50 50 0.8 VCC + 0.5 0.4 Unit µA mA mA V V V V V 1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 13/22 DC and AC parameters Figure 7. Read mode AC waveforms M87C257 A0-A14 VALID tASLAX tAVASL tAXQX ASVPP tASHASL tASLGL tAVQV E tGLQV G tELQV Q0-Q7 DATA OUT AI00931 tEHQZ tGHQZ Hi-Z 14/22 M87C257 Table 9. Read mode AC characteristics 1(1) (2) DC and AC parameters M87C257 Symbol Alt Parameter Test Condition -45(3) -60 -70 -80 Unit Min Max Min Max Min Max Min Max tAVQV tAVASL tASHASL tASLAX tACC tAL tLL tLA Address Valid to Output Valid Address Valid to Address Strobe Low Address Strobe High to Address Strobe Low Address Strobe Low to Address Transition Address Strobe Low to Output Enable Low Chip Enable Low to Output Valid Output Enable Low to Output Valid Chip Enable High to Output Hi-Z Output Enable High to Output Hi-Z Address Transition to Output Transition G = VIL E = VIL G = VIL E = VIL E = VIL, G = VIL 0 0 0 E = VIL, G = VIL 7 35 20 20 45 25 25 25 0 0 0 45 7 35 20 20 60 30 30 30 0 0 0 60 7 35 20 20 70 35 30 30 0 0 0 70 7 35 20 20 80 40 40 40 80 ns ns ns ns ns ns ns ns ns ns tASLGL tLOE tELQV tGLQV tCE tOE tEHQZ(4) tDF tGHQZ(4) tDF tAXQX tOH 1. TA = 0 to 70 °C, –40 to 85 °C; –40 to 105 °C or –40 to 125 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 3. Speed obtained with High Speed AC measurement conditions. 4. Sampled only, not 100% tested. 15/22 DC and AC parameters Table 10. Read mode AC characteristics 2(1) (2) M87C257 Symbol Alt Parameter Test Condition -90 -10 -12 M87C257 -15/-20 Unit Min Max Min Max Min Max Min Max tAVQV tAVASL tACC tAL Address Valid to Output Valid Address Valid to Address Strobe Low Address Strobe High to Address Strobe Low Address Strobe Low to Address Transition E = VIL, G = VIL 7 90 7 100 7 120 7 150 ns ns tASHASL tLL 35 35 35 35 ns tASLAX tLA 20 20 20 20 ns tASLGL Address Strobe Low tLOE to Output Enable Low tCE tOE tDF tDF tOH Chip Enable Low to Output Valid Output Enable Low to Output Valid Chip Enable High to Output Hi-Z Output Enable High to Output Hi-Z Address Transition to Output Transition G = VIL E = VIL G = VIL E = VIL E = VIL, G = VIL 20 20 20 20 ns tELQV tGLQV tEHQZ(3) tGHQZ(3) tAXQX 90 40 0 0 0 40 40 0 0 0 100 40 30 30 0 0 0 120 50 40 40 0 0 0 150 60 40 40 ns ns ns ns ns 1. TA = 0 to 70 °C, –40 to 85 °C; –40 to 105 °C or –40 to 125 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 3. Sampled only, not 100% tested. 16/22 M87C257 Figure 8. A0-A14 tAVEL Q0-Q7 DATA IN tQVEL ASVPP tVPHEL VCC tVCHEL E tELEH G tQXGL tGLQV tEHQX DC and AC parameters Programming and Verify modes AC waveforms VALID DATA OUT tGHQZ tGHAX PROGRAM VERIFY AI00557 Table 11. Symbol tAVEL tQVEL tVPHEL tVCHEL tELEH tEHQX tQXGL tGLQV tGHQZ tGHAX Programming mode AC characteristics(1) (2) Alt tAS tDS tVPS tVCS tPW tDH tOES tOE tDFP tAH Parameter Address Valid to Chip Enable Low Input Valid to Chip Enable Low VPP High to Chip Enable Low VCC High to Chip Enable Low Chip Enable Program Pulse Width Chip Enable High to Input Transition Input Transition to Output Enable Low Output Enable Low to Output Valid Output Enable High to Output Hi-Z Output Enable High to Address Transition 0 0 Test Condition Min 2 2 2 2 95 2 2 100 130 105 Max Unit µs µs µs µs µs µs µs ns ns ns 1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 17/22 Package mechanical M87C257 5 Package mechanical Figure 9. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, package outline A2 A3 A1 B1 B D2 D S N ∅ 1 FDIPW-a A L α eA eB C e E1 E 1. Drawing is not to scale. Table 12. FDIP28WB - 28 pin Ceramic Frit-seal DIP, with window (round 0.280"), package mechanical data millimeters inches Max 5.72 0.51 3.91 3.89 0.41 1.45 – 0.23 36.50 33.02 15.24 – – 13.06 2.54 14.99 – – 16.18 3.18 4° 1.52 7.11 – 28 1.40 4.57 4.50 0.56 – 0.30 37.34 – – 13.36 – – 18.03 4.10 11° 2.49 – 0.280 0.100 0.590 1.300 0.600 0.057 0.020 0.154 0.153 0.016 – 0.009 1.437 – – 0.514 – – 0.637 0.125 4° 0.060 – 28 Typ Min Max 0.225 0.055 0.180 0.177 0.022 – 0.012 1.470 – – 0.526 – – 0.710 0.161 11° 0.098 – Symbol Typ A A1 A2 A3 B B1 C D D2 E E1 e eA eB L α S Ø N Min 18/22 M87C257 Package mechanical Figure 10. PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package outline D D1 1N A1 A2 B1 E2 E3 E1 E e F 0.51 (.020) 1.14 (.045) D3 R CP A E2 B D2 D2 PLCC-A 1. Drawing is not to scale. Table 13. PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package mechanical data millimeters inches Max 3.56 2.41 – 0.53 0.81 0.10 12.32 11.35 4.78 7.62 – 14.86 13.89 6.05 10.16 1.27 – – 0.00 0.89 – 32 12.57 11.51 5.66 – 15.11 14.05 6.93 – – 0.13 – 0.035 0.400 0.050 0.300 0.485 0.447 0.188 – 0.585 0.547 0.238 – – 0.000 – 32 Typ Min 0.125 0.060 0.015 0.013 0.026 Max 0.140 0.095 – 0.021 0.032 0.004 0.495 0.453 0.223 – 0.595 0.553 0.273 – – 0.005 – Symbol Typ A A1 A2 B B1 CP D D1 D2 D3 E E1 E2 E3 e F R N Min 3.18 1.53 0.38 0.33 0.66 19/22 Part numbering M87C257 6 Part numbering Table 14. Example: Device Type M87 Supply Voltage C = 5V Device Function 257 = 256 Kbit (32Kb x 8) Speed -45(1) = 45 ns -60 = 60ns -70 = 70 ns -80 = 80 ns -90 = 90 ns -10 = 100 ns -12 = 120 ns -15 = 150 ns -20 = 200 ns VCC Tolerance X = ± 5% blank = ± 10% Package F = FDIP28W C = PLCC32 Temperature Range 1 = 0 to 70 °C 3 = –40 to 125 °C 6 = –40 to 85 °C Options TR = Tape & Reel Packing 1. High Speed, see AC Characteristics section for further information. Ordering information scheme M87C257 -70 X C 1 X For a list of available options (Speed, Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you. 20/22 M87C257 Revision history 7 Revision history Table 15. Date 01-Jun-1996 Document revision history Revision 1 Initial release. Document converted to new template (sections added, information moved). Packages are ECOPACK® compliant. Package specifications updated (see Section 5: Package mechanical). X option removed from Table 15: Document revision history. Changes 23-May-2006 2 21/22 M87C257 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. 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