STA1102RUTR

STA1102R 3 Gbps, 2 differential-pair channel eSATA signal re-driver Datasheet - production data Features ■ Supports eSATA data rate of 1.5 Gbps and 3 Gbps ■ Supports complete eSATA bus of two 2-wire differential-pair channels ■ Squelch detector for validity of input differential signal ■ Single operating supply (VCC) range of 3.3 V ± 10% r P e Low power mode ■ 100 Ω CML I/Os ■ eSATA hot plug capable ■ Low capacitance on all channels ■ 1-bit input equalizer regenerates the receiver attenuated signal t e l o )- t(s 1-bit adjustable pre-emphasis and driver to drive the transmitter outputs over long PCB track lengths uc d o r u d o QFN20 (4 x 4 mm) ■ ■ ) s ( ct ■ Low output skew and jitter ■ Low ground bounce ■ Available in QFN20 (4 x 4 mm) package footprint with flow-through pinout ■ 0 °C to 85 °C operating temperature range s b O Table 1. Device summary Order code Package Packing STA1102RUTR QFN20 (4 x 4 mm) Tape and reel P e t e l o s b O January 2013 This is information on a product in full production. Doc ID 16470 Rev 5 1/18 www.st.com 18 Contents STA1102R Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 Equalizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2 Pre-emphasis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.3 Input termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.4 Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.5 ) s ( ct u d o 3.4.1 Hardware low power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.4.2 Auto low power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 r P e Squelch detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 t e l o 4 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 11 ) (s s b O t c u d o r Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 t e l o 8 s b O 9 2/18 P e Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Doc ID 16470 Rev 5 STA1102R 1 Description Description The STA1102R device is a serial data signal re-driver. It integrates two differential-pair channels suitable for eSATA signals up to a 3 Gbps data rate, in compliance with the SATA rev 2.6 specification. An input detector is available at each channel, which constantly monitors the input signal level for output squelch functionality. If the detected differential input is below a defined threshold, the output is biased to the common mode voltage. High-speed data paths and the flow-through pinout minimize internal device jitter and simplify board layout. The integrated input equalizer improves signal integrity at the receiver due to effects from lossy cables. A 1-bit adjustable pre-emphasis is also integrated to drive the transmitter outputs over long PCB track lengths. ) s ( ct The device can be set to a low-power mode by disabling the output current drivers through the EN pin. u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 16470 Rev 5 3/18 Block diagram 2 STA1102R Block diagram Figure 1. STA1102R block diagram ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 4/18 Doc ID 16470 Rev 5 STA1102R Block diagram Figure 2. Pin configuration - top view 6## '.$ % % 6##      ).?$   /54?$ ).?$   '.$   ) s ( ct /54?$  /54?$  du e t e ol bs O )  s ( t c 6##     %. $ $ 6## u d o e t e ol o r P Pr /54?$ '.$  ).?$  ).?$ !-6 s b O Doc ID 16470 Rev 5 5/18 Block diagram Table 2. STA1102R Pin description Pin number Pin name Type 1 IN_D1+ Input IN_D1+ makes a differential pair with IN_D1- 2 IN_D1- Input IN_D1- makes a differential pair with IN_D1+ 3 GND Power Ground 4 OUT_D2- Output OUT_D2- makes a differential pair with OUT_D2+ 5 OUT_D2+ Output OUT_D2+ makes a differential pair with OUT_D2- 6 VCC Power 3.3 V DC supply 7 EN Input Output driver enable pin; when low, device enters low power mode (internal 360 kΩ pull-up resistor to VCC) 8 D2 Input Channel 2 pre-emphasis selection (internal 360 kΩ pull-down resistor to GND) 9 D1 Input Channel 1 pre-emphasis selection (internal 360 kΩ pull-down resistor to GND) 10 VCC Power 3.3 V DC supply 11 IN_D2+ Input IN_D2+ makes a differential pair with IN_D2- 12 IN_D2- Input IN_D2- makes a differential pair with IN_D2+ 13 GND Power Ground 14 OUT_D1- Output OUT_D1- makes a differential pair with OUT_D1+ 15 OUT_D1+ Output OUT_D1+ makes a differential pair with OUT_D1- 16 VCC Power 3.3 V DC supply 17 E1 Input 18 E2 19 o s b ) s ( ct ) (s r P e t e l o s b O Channel 1, input equalization selection (internal 360 kΩ pull down resistor to GND) Input Channel 2, input equalization selection (internal 360 kΩ pull down resistor to GND) GND Power Ground VCC Power 3.3 V DC supply O 6/18 u d o ct u d o r P e let 20 Function Doc ID 16470 Rev 5 STA1102R Functional description 3 Functional description 3.1 Equalizer The adjustable input equalizer reduces system jitter and attenuation from long or lossy cables. Shaping is performed by the gain stage of the equalizer to compensate the signal. Table 3. Input equalizer truth table EN E1 E2 Function 0 x x Low power mode: input stage disabled for minimum power consumption 1 0 0 Normal operation mode: both CH1 and CH2 7dB EQ 1 0 1 Normal operation mode: CH1 7dB EQ; CH2 9dB EQ 1 1 0 Normal operation mode: CH1 9dB EQ; CH2 7dB EQ 1 1 1 Normal operation mode: both CH1 and CH2 9dB EQ u d o r P e t e l o s b O Note: 9 dB EQ is useful for signal recovery over long PCB track, e.g. 10” FR4. 3.2 Pre-emphasis ) (s ) s ( ct t c u The STA1102R provides at each output a differential pair of 1-bit programmable preemphasis to compensate for losses across long PCB tracks and interconnects after the redriver output. Below, the truth table of the pre-emphasis control is shown: d o r P e Table 4. t e l o O bs Pre-emphasis truth table EN D1 D2 Functions 0 x x Low power mode: output driver disabled; output driven to HiZ 1 0 0 Normal operation mode: both CH1 and CH2 0 dB pre-emphasis 1 0 1 Normal operation mode: CH1 0 dB pre-emphasis; CH2 2.5 dB pre-emphasis 1 1 0 Normal operation mode: CH1 2.5 dB pre-emphasis; CH2 0 dB pre-emphasis 1 1 1 Normal operation mode: both CH1 and CH2 2.5 dB pre-emphasis Doc ID 16470 Rev 5 7/18 Functional description 3.3 STA1102R Input termination The STA1102R integrates precise 50 Ω ± 10% termination resistors, pulled up to VCm, on all its differential input channels. External terminations are not required. This gives improved performance and also minimizes the PCB board space. These on-chip termination resistors should match the differential characteristic impedance of the transmission line. 3.4 Low power modes There are 2 types of low power modes in the STA1102R: hardware low and auto low power modes. 3.4.1 ) s ( ct Hardware low power mode The EN input activates a hardware low power mode. There is an internal pull-up resistor to maintain the EN in the default (HIGH) state. When this low power mode is activated (EN = L), all input and output buffers and internal bias circuitry are powered off and disabled. Outputs are driven to HiZ in low power mode. There is a delay associated with entering (max. 2 µs) and exiting (max. 20 µs) this hardware low power mode. u d o 3.4.2 r P e t e l o Auto low power mode s b O The auto low power mode is activated when differential voltage at either or both of the channels is < 50 mV for more than 3 µs. During this low power mode, output of the associated channel is driven to Vcm and the selective circuit block is disabled to lower power consumption. The delay associated with exiting the auto low power mode is 50 ns max. ) (s t c u 3.5 Squelch detector d o r A squelch detector is integrated on the input of each of the 2 data paths. The squelch detector is a high-speed amplitude comparator that is turned on when EN = H. The differential input signal is monitored by the detector. When the differential input is detected to be less than or equal to 50 mV, the input signal is considered an invalid signal and is not passed to the output. When this happens, the corresponding output is biased to VCM. When the differential input is greater than or equal to 150 mV, the input signal is considered valid signal and is passed to the output. P e t e l o s b O 8/18 The integration of the squelch detector helps the system to prevent responding to noises. As such, it enables the device to fully support OOB signaling. Doc ID 16470 Rev 5 STA1102R Application diagram 4 Application diagram Figure 3. Typical application diagram ) s ( ct u d o r P e t e l o ) (s s b O t c u Note: d o r P e Typical circuit above is shown with CHI1 Pre-Emp of 0 dB, EQ of 7 dB; CH2 Pre-Emp of 2.5 dB, EQ of 7 dB. t e l o s b O Doc ID 16470 Rev 5 9/18 Absolute maximum ratings 5 STA1102R Absolute maximum ratings Absolute maximum ratings are those values above which damage to the device may occur. Functional operation under these conditions is not implied. All voltages are referenced to GND. Table 5. Absolute maximum ratings Symbol VCC VI 6 Parameter Value Unit Supply voltage to ground -0.5 to + 4.0 V Differential pair IOs voltage range -0.5 to + 4.0 V Control IOs voltage range -0.5 to + 4.0 V TSTG Storage temperature VESD Electrostatic discharge voltage (human body model JESD22A114C.01) Differential input and output data pins ±12 kV ±8 t e l o ) (s s b O t c u Parameter Thermal coefficient (junction-ambient) d o r P e t e l o s b O 10/18 ro P e All other pins °C QFN20 package thermal data Symbol θ JA c u d -65 to + 150 Thermal data Table 6. ) s ( t Doc ID 16470 Rev 5 QFN20 Unit 45 °C/Ω STA1102R Recommended operating conditions 7 Recommended operating conditions Table 7. Recommended operating conditions Symbol Test conditions Min. Typ. Max. Unit Supply voltage - 3.0 3.3 3.6 V TA Operating ambient temperature - 0 - 85 °C CC Coupling capacitor - - 12 - nF DR Data rate - - - 3.0 Gbps VCC Parameter ) s ( ct Electrical characteristics u d o (TA = 0 to 85 °C, VCC = 3.0 V to 3.6 V unless otherwise specified). Table 8. r P e DC electrical characteristic Symbol Parameter Test conditions Min. Typ. Max. Unit - - 300 µA VDIFF_RX = 700 mV, K28.5 pattern running at 3 Gbps D1 = D2 = H - - 80 mA VDIFF_RX ≤ VTH, EN = H D1= D2 = H - - 45 mA - - - 400 ps EN = H to L - - 2 µs EN = L to H - - 20 µs Input logic high voltage - 1.4 - - V Input logic low voltage - - - 0.5 V IIH Input logic high current - -15 - 15 µA IIL Input logic low current - -15 - 15 µA Squelch threshold voltage - 50 - 150 mVpp Squelch mode enter - - - 5 ns Squelch mode exit - - - 5 ns t e l o General parameter characteristics ICC_standby Standby mode supply current ICC_active Active mode supply current EN = L ICC_squelch t c u ) (s TPD Data propagation delay TDIS Device disable time TEN Device enable time d o r P e t e l o s b O Control logic characteristics VIH s b O VIL Squelch detector characteristics VTH TENTER TEXIT Doc ID 16470 Rev 5 11/18 Recommended operating conditions Table 8. STA1102R DC electrical characteristic (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit DR = 3.0 Gbps 200 - 1600 mVpp AC/DC specifications for receiver VDIFF_RX Differential input peak-to-peak voltage VCM_RX Common mode voltage - - 0 - V ZDIFF_RX Differential input impedance - 85 100 115 Ω Single-ended input impedance - 40 - - Ω f = 100 MHz to 300 MHz 18 - - dB f = 300 MHz to 600 MHz 14 - - f = 600 MHz to 1200 MHz 10 - f = 1.2 GHz to 2.4 GHz 8 f = 2.4 GHz to 3.0 GHz 3 ZSE_RX RLDIFF_RX Differential input return loss Table 9. Symbol P e t e l o AC electrical characteristic Parameter Test conditions RLCM_RX TR/F_RX TSkew_RX od Input rise/fall time Pr Input differential skew - dB - - dB dB Typ. Max. Unit 5 - - dB f = 300 MHz to 600 MHz 5 - - dB f = 600 MHz to 1200 MHz 2 - - dB f = 1.2 GHz to 2.4 GHz 1 - - dB f = 2.4 GHz to 3.0 GHz 1 - - dB 20% to 80% 67 - 136 ps Mid-point of RX+ to mid-point of RX- - - 50 ps f = 1.5 GHz; D1/D2 = L 400 - 600 mVpp f = 1.5 GHz; D1/D2 = H 600 - 800 mVpp bs O ) t(s uc - - Min. f = 100 MHz to 300 MHz Common mode input return loss dB ct du ro (s) AC/DC specifications for transmitter e t e ol VDIFF_TX s b O Differential output peak-to-peak voltage VCM_TX Common mode voltage - - 2.1 - V ZDIFF_TX Differential output impedance - 85 100 115 Ω Single-ended output impedance - 40 - - Ω f = 100 MHz to 300 MHz 14 - - dB f = 300 MHz to 600 MHz 8 - - dB f = 600 MHz to 1200 MHz 6 - - dB f = 1.2 GHz to 2.4 GHz 6 - - dB f = 2.4 GHz to 3.0 GHz 3 - - dB ZSE_TX RLDIFF_TX Differential output return loss 12/18 Doc ID 16470 Rev 5 STA1102R AC electrical characteristic (continued) Symbol RLCM_TX TR/F_TX TSkew_TX Parameter Test conditions Min. Typ. Max. Unit f = 100 MHz to 300 MHz 5 - - dB f = 300 MHz to 600 MHz 5 - - dB f = 600 MHz to 1200 MHz 2 - - dB f = 1.2 GHz to 2.4 GHz 1 - - dB f = 2.4 GHz to 3.0 GHz 1 - - dB 20% to 80% 67 - 136 ps Mid-point of RX+ to mid-point of RX- - - 20 ps Common mode output return loss Output rise/fall time Output differential skew TJTX Total jitter DR = 3 Gbps; K28.5 pattern - 0.2 DJTX Deterministic jitter DR = 3 Gbps; K28.5 pattern - 0.13 RJTX Random jitter DR = 3 Gbps; K28.7 pattern - Figure 4. Jitter measurement setup e t e ol  s b O +267 67$5 ,1B' ,1B'   ´ )5 ) (s 287B' 287B' 287B' t c u d o r 2.0 UIpp 0.2 UIpp 2.15 psrms o r P   ´ )5 ,1B' H6$7$ FRPSOLDQFH PHDVXUHPHQWSRLQW du ) s ( ct 0.3 '(9,&( Table 9. Recommended operating conditions H6$7$ FRPSOLDQFH PHDVXUHPHQWSRLQW P e t e l o s b O Doc ID 16470 Rev 5 13/18 Package information 8 STA1102R Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Figure 5. Package outline for QFN20 (4 x 4 x 0.8 mm) - pitch 0.5 mm ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 14/18 Doc ID 16470 Rev 5 STA1102R Package information Table 10. STA1102RUTR - mechanical data for QFN20 (4 x 4 x 0.8 mm) - pitch 0.5 mm Dimensions Symbol Millimeters Min. Typ. Max. A 0.70 0.75 0.80 A1 - 0.02 - A2 - 0.65 - A3 - 0.20 - b 0.18 0.25 D 3.85 4.00 D2 4.15 u d o See exposed pad variations E 3.85 4.00 E2 Table 11. ) s ( ct 0.30 r P e 4.15 See exposed pad variations e 0.45 L 0.45 let O ) o s b 0.50 0.55 0.55 0.65 STA1102RUTR - exposed pad variations D2 Variation s ( t c Min. u d o A 2.00 E2 Typ. Max. Min. Typ. Max. 2.10 2.20 2.00 2.10 2.20 r P e t e l o s b O Doc ID 16470 Rev 5 15/18 Package information Figure 6. STA1102R STA1102RUTR - footprint recommendation for QFN20 (4 x 4 x 0.8 mm) - pitch 0.5 mm /04)/.h!v &//402).42%#/--%.$%$       % r P e   t e l o  bs  ) s ( ct -O  $ u d o r P e t e l o s b O 16/18 u d o   ) s ( ct Doc ID 16470 Rev 5 34!2542 .?&2! STA1102R 9 Revision history Revision history Table 12. Document revision history Date Revision Changes 19-Oct-2009 1 Initial release. 08-Jan-2010 2 Updated: Figure 1, Figure 2, Table 2, Section 2.1, Section Figure 3. and Table 5. 12-Mar-2010 3 Updated package information. Replaced D1 with D2 and D0 with D1. 04-Feb-2011 4 Document reformatted, added Contents, updated Table 5, corrected typo in Figure 1, Table 2, Table 3, Section 3.2, Section 3.4.1, Section 3.5, Figure 3, Figure 5, Figure 6, Table 8, Table 11. 31-Jan-2013 5 Updated temperature in Features (replaced -40 by 0). Minor corrections throughout document. ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 16470 Rev 5 17/18 STA1102R ) s ( ct Please Read Carefully: u d o Information in this document is provided solely in connection with ST products. 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