STB18NF30

STB18NF30 Automotive-grade N-channel 330 V, 160 mΩ typ., 18 A STripFET™ II Power MOSFET in a D²PAK package Datasheet - production data Features TAB Order code VDSS RDS(on) max. ID STB18NF30 330 V 180 mΩ 18 A • Designed for automotive applications and AEC-Q101 qualified 3 • 100% avalanche tested 1 • 175 °C junction temperature D²PAK Applications • Switching applications Figure 1. Internal schematic diagram Description This Power MOSFET has been developed using STMicroelectronics’ unique STripFET process, which is specifically designed to minimize input capacitance and gate charge. This renders the device suitable for use as primary switch in advanced high-efficiency isolated DC-DC converters for telecom and computer applications, and applications with low gate charge driving requirements. 'RU7$% * 6 $0Y Table 1. Device summary Order code Marking Package Packaging STB18NF30 18NF30 D²PAK Tape and reel August 2013 This is information on a product in full production. DocID018590 Rev 3 1/15 www.st.com Contents STB18NF30 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2/15 .............................................. 8 DocID018590 Rev 3 STB18NF30 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 330 V VGS Gate-source voltage ±20 V Drain current (continuous) at TC = 25 °C 18 A Drain current (continuous) at TC = 100 °C 12 A Drain current (pulsed) 72 A Total dissipation at TC = 25 °C 150 W Peak diode recovery voltage slope 10 V/ns -55 to 175 °C Value Unit ID(1) IDM (2) PTOT dv/dt(3) Tstg Storage temperature TJ Operating junction temperature 1. The value is rated according to Rthj-c. 2. Pulse is rated according to SOA. 3. ISD ≤ 18 A, di/dt ≤ 200 A/µs, VDD ≤ 80%V(BR)DSS Table 3. Thermal data Symbol Rthj-case Rthj-pcb (1) Parameter Thermal resistance junction-case 1 Thermal resistance junction-pcb 30 °C/W 1. When mounted on 1 inch² FR-4, 2 Oz copper board. Table 4. Avalanche data Symbol Parameter Value Unit IAV Non-repetitive avalanche current 14 A EAS Single pulse avalanche energy (starting TJ=25 °C, ID=IAV, VDD=50 V) 200 mJ DocID018590 Rev 3 3/15 15 Electrical characteristics 2 STB18NF30 Electrical characteristics (TCASE=25 °C unless otherwise specified). Table 5. On/off states Symbol Parameter Test conditions Min. Typ. 330 - Drain-source breakdown voltage ID=1 mA, VGS=0 Zero gate voltage drain current (VGS = 0) VDS=330 V VDS=330 V,Tc=125 °C - IDSS IGSS Gate body leakage current (VDS = 0) VGS=±20 V VGS(th) Gate threshold voltage VDS=VGS, ID= 250 µA RDS(on) Static drain-source on-resistance VGS=10 V, ID=9 A V(BR)DSS Max. Unit V 1 µA 50 µA - ±100 nA - 4 V 160 180 mΩ Min. Typ. Max. Unit - 1650 - pF 2 Table 6. Dynamic Symbol Parameter Test conditions VDS=25 V, f=1 MHz, VGS=0 V Ciss Input capacitance Coss Output capacitance - 220 pF Crss Reverse transfer capacitance - 30 pF Qg Total gate charge - 44 - nC Qgs Gate-source charge - 7 - nC Qgd Gate-drain charge - 17 - nC VDD=264 V, ID=18 A, VGS=10 V (see Figure 14) Table 7. Switching times Symbol td(on) tr td(off) tf 4/15 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD=165 V, ID= 9 A, RG= 4.70 Ω, VGS=10 V (see Figure 13) Fall time DocID018590 Rev 3 Min. Typ. Max. Unit - 20 - ns - 18 - ns - 145 - ns - 45 - ns STB18NF30 Electrical characteristics Table 8. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 18 A ISDM Source-drain current (pulsed) - 72 A VSD Forward on voltage - 1.5 V 400 ns ISD=18 A, VGS=0 V trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD=18 A, di/dt=100 A/µs, VDD=100 V (see Figure 15) ISD=18 A, di/dt=100 A/µs, VDD=100 V, Tj=150 °C (see Figure 15) DocID018590 Rev 3 - 180 - 1.5 µC - 16 A - 210 ns - 1.9 µC - 19 A 5/15 15 Electrical characteristics STB18NF30 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 5. Transfer characteristics AM12973v1 ID (A) is Tj=175°C Tc=25°C Single pulse DS a (o n) 10µs 100µs Op Lim era ite tion d by in th m is ax ar R e 10 1ms 10ms 1 0.1 0.1 Figure 4. 10 1 100 VDS(V) Output characteristics AM12974v1 ID (A) AM12975v1 ID (A) VDS=25V VGS=10V 50 50 40 40 30 30 6V 20 20 10 10 4V 0 0 Figure 6. 5 10 15 20 25 0 0 VDS(V) Normalized BVDSS vs temperature Figure 7. 2 4 6 8 10 Static drain-source on-resistance AM12976v1 BVDSS (norm) VGS(V) AM12977v1 RDS(on) (Ω) ID=1mA VGS=10V 1.1 0.18 0.17 1.0 0.16 0.9 0.15 0.14 0.8 0.13 0.7 0.12 0.6 -75 0.10 0 0.11 6/15 -25 25 75 125 175 TJ(°C) DocID018590 Rev 3 5 10 15 ID(A) STB18NF30 Figure 8. Electrical characteristics Gate charge vs gate-source voltage Figure 9. VGS (V) AM12978v1 VDS VDD=264V ID=18A 12 (V) Capacitance variations AM12979v1 C (pF) 250 VDS Ciss 1000 10 200 8 150 100 Coss 6 100 4 Crss 10 50 2 0 0 20 10 30 Figure 10. Normalized gate threshold voltage vs temperature AM12980v1 VGS(th) (norm) 1 0.1 0 50 Qg(nC) 40 1 1000 VDS(V) Figure 11. Normalized on-resistance vs temperature AM12981v1 RDS(on) (norm) ID=250µA 100 10 ID=9A VGS=10V 1.8 2.5 1.6 1.4 2.0 1.2 1.5 1.0 0.8 1.0 0.6 0.4 0.5 0.2 0 -100 -50 0 50 TJ(°C) 150 100 0 -100 -50 0 50 100 150 TJ(°C) Figure 12. Source-drain diode forward characteristics AM12982v1 VSD (V) TJ=-50°C 1.0 0.8 TJ=25°C 0.6 0.4 TJ=175°C 0.2 0 0 5 10 15 ISD(A) DocID018590 Rev 3 7/15 15 Test circuits 3 STB18NF30 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test switching and diode recovery times circuit A A L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 17. Unclamped inductive waveform AM01471v1 Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/15 0 DocID018590 Rev 3 10% AM01473v1 STB18NF30 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID018590 Rev 3 9/15 15 Package mechanical data STB18NF30 Table 9. D²PAK (TO-263) mechanical data mm Dim. Min. Typ. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 E 10 E1 8.50 10.40 e 2.54 e1 4.88 5.28 H 15 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 10/15 Max. 0.4 0° 8° DocID018590 Rev 3 STB18NF30 Package mechanical data Figure 19. D²PAK (TO-263) drawing 0079457_T Figure 20. D²PAK footprint(a) 16.90 12.20 5.08 1.60 3.50 9.75 Footprint a. All dimension are in millimeters DocID018590 Rev 3 11/15 15 Packaging mechanical data 5 STB18NF30 Packaging mechanical data Table 10. D²PAK (TO-263) tape and reel mechanical data Tape Reel mm mm Dim. 12/15 Dim. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base qty 1000 P2 1.9 2.1 Bulk qty 1000 R 50 T 0.25 0.35 W 23.7 24.3 DocID018590 Rev 3 Min. Max. 330 13.2 26.4 30.4 STB18NF30 Packaging mechanical data Figure 21. Tape 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F B1 W K0 B0 For machine ref. only including draft and radii concentric around B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v1 Figure 22. Reel T REEL DIMENSIONS 40mm min. Access hole At slot location B D C N A Full radius Tape slot in core for tape start 25 mm min. width G measured at hub AM08851v2 DocID018590 Rev 3 13/15 15 Revision history 6 STB18NF30 Revision history Table 11. Document revision history Date Revision 13-Jan-2012 1 First release 23-May-2012 2 Section 2.1: Electrical characteristics (curves) has been added. Document status promoted from preliminary data to production data. 3 – – – – 06-Aug-2013 14/15 Changes Updated: Section 4: Package mechanical data Updated: Figure 13, 14, 15 and 16 Added: dv/dt in Table 2 Minor text changes DocID018590 Rev 3 STB18NF30 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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