STD47N10F7AG
Automotive-grade N-channel 100 V, 12.5 mΩ typ., 45 A,
STripFET™ F7 Power MOSFET in a DPAK package
Datasheet - production data
Features
Figure 1: Internal schematic diagram
Order code
VDS
RDS(on)
max.
ID
PTOT
STD47N10F7AG
100 V
18 mΩ
45 A
60 W
AEC-Q101 qualified
Among the lowest RDS(on) on the market
Excellent FoM (figure of merit)
Low Crss/Ciss ratio for EMI immunity
High avalanche ruggedness
Applications
D(2, TAB)
Switching applications
Description
This N-channel Power MOSFET utilizes
STripFET™ F7 technology with an enhanced
trench gate structure that results in very low
on-state resistance, while also reducing internal
capacitance and gate charge for faster and more
efficient switching.
G(1)
S(3)
AM01475v1_noZen
Table 1: Device summary
Order code
Marking
Package
Packing
STD47N10F7AG
47N10F7
DPAK
Tape and reel
February 2017
DocID027183 Rev 3
This is information on a product in full production.
1/16
www.st.com
Contents
STD47N10F7AG
Contents
1
Electrical ratings ............................................................................. 3
2
Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3
Test circuits ..................................................................................... 8
4
Package information ....................................................................... 9
5
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4.1
DPAK (TO-252) type A2 package information................................. 10
4.2
DPAK (TO-252) packing information ............................................... 13
Revision history ............................................................................ 15
DocID027183 Rev 3
STD47N10F7AG
1
Electrical ratings
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage
100
V
VGS
Gate-source voltage
±20
V
Drain current (continuous) at TC = 25 °C
45
Drain current (continuous) at TC = 100 °C
32
IDM(1)
Drain current (pulsed)
180
A
PTOT
Total dissipation at TC = 25 °C
60
W
ID
TJ
Operating junction temperature range
Tstg
Storage temperature range
-55 to 175
A
°C
°C
Notes:
(1)Pulse
width is limited by safe operating area
Table 3: Thermal data
Symbol
Rthj-case
Rthj-pcb
(1)
Parameter
Value
Thermal resistance junction-case
2.5
Thermal resistance junction-pcb
50
Unit
°C/W
Notes:
(1)When
mounted on a 1-inch² FR-4, 2 Oz copper board.
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Electrical characteristics
2
STD47N10F7AG
Electrical characteristics
(Tcase = 25 °C unless otherwise specified)
Table 4: Static
Symbol
V(BR)DSS
Parameter
Test conditions
Drain-source breakdown
voltage
VGS = 0 V, ID = 1 mA
Min.
Typ.
Max.
100
Unit
V
VGS = 0 V, VDS = 100 V
10
IDSS
Zero gate voltage drain current
VGS = 0 V, VDS = 100 V,
TC = 125 °C(1)
100
IGSS
Gate-body leakage current
VDS = 0 V, VGS = ±20 V
±100
nA
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
4.5
V
RDS(on)
Static drain-source
on-resistance
VGS = 10 V, ID = 22.5 A
12.5
18
mΩ
Min.
Typ.
Max.
Unit
-
1640
-
pF
-
360
-
pF
-
25
-
pF
-
25
-
nC
-
5.1
-
nC
-
12.2
-
nC
2.5
µA
Notes:
(1)Defined
by design, not subject to production test.
Table 5: Dynamic
Symbol
Ciss
4/16
Parameter
Test conditions
Input capacitance
VDS = 50 V, f = 1 MHz,
VGS = 0 V
Coss
Output capacitance
Crss
Reverse transfer capacitance
Qg
Total gate charge
Qgs
Gate-source charge
Qgd
Gate-drain charge
VDD = 50 V, ID = 45 A,
VGS = 0 to 10 V
(see Figure 14: "Test
circuit for gate charge
behavior")
DocID027183 Rev 3
STD47N10F7AG
Electrical characteristics
Table 6: Switching times
Symbol
td(on)
Parameter
Turn-on delay time
tr
Rise time
td(off)
Turn-off delay time
tf
Fall time
Test conditions
Min.
Typ.
Max.
Unit
VDD = 50 V, ID = 22.5 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 13: "Test circuit for
resistive load switching times"
and Figure 18: "Switching time
waveform")
-
15
-
ns
-
17
-
ns
-
24
-
ns
-
8
-
ns
Min.
Typ.
Max.
Unit
Table 7: Source-drain diode
Symbol
Parameter
Test conditions
ISD
Source-drain current
-
45
A
ISDM(1)
Source-drain current
(pulsed)
-
180
A
VSD(2)
Forward on voltage
VGS = 0 V, ISD = 45 A
-
1.1
V
ISD = 45 A, di/dt = 100 A/µs,
VDD = 80 V, TJ = 150 °C
(see Figure 15: "Test circuit for
inductive load switching and
diode recovery times")
-
53
ns
-
67
nC
-
2.5
A
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
Notes:
(1)Pulse
width is limited by safe operating area.
(2)Pulsed:
pulse duration = 300 µs, duty cycle 1.5%
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Electrical characteristics
2.1
STD47N10F7AG
Electrical characteristics (curves)
Figure 3: Thermal impedance
Figure 2: Safe operating area
d
Figure 4: Output characteristics
Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage
Figure 7: Static drain-source on-resistance
GIPD09062015RV
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DocID027183 Rev 3
STD47N10F7AG
Electrical characteristics
Figure 8: Capacitance variations
Figure 9: Normalized gate threshold voltage vs
temperature
Figure 10: Normalized on-resistance vs temperature
Figure 11: Source-drain diode forward
characteristics
Figure 12: Normalized V(BR)DSS vs temperature
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Test circuits
3
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STD47N10F7AG
Test circuits
Figure 13: Test circuit for resistive load
switching times
Figure 14: Test circuit for gate charge
behavior
Figure 15: Test circuit for inductive load
switching and diode recovery times
Figure 16: Unclamped inductive load test
circuit
Figure 17: Unclamped inductive waveform
Figure 18: Switching time waveform
DocID027183 Rev 3
STD47N10F7AG
4
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
DocID027183 Rev 3
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Package information
4.1
STD47N10F7AG
DPAK (TO-252) type A2 package information
Figure 19: DPAK (TO-252) type A2 package outline
0068772_type-A2_rev21
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DocID027183 Rev 3
STD47N10F7AG
Package information
Table 8: DPAK (TO-252) type A2 mechanical data
mm
Dim.
Min.
Typ.
Max.
A
2.20
2.40
A1
0.90
1.10
A2
0.03
0.23
b
0.64
0.90
b4
5.20
5.40
c
0.45
0.60
c2
0.48
0.60
D
6.00
6.20
D1
4.95
E
6.40
E1
5.10
5.20
5.30
e
2.16
2.28
2.40
e1
4.40
4.60
H
9.35
10.10
L
1.00
1.50
L1
2.60
2.80
3.00
L2
0.65
0.80
0.95
L4
0.60
R
V2
5.10
5.25
6.60
1.00
0.20
0°
DocID027183 Rev 3
8°
11/16
Package information
STD47N10F7AG
Figure 20: DPAK (TO-252) type A2 recommended footprint (dimensions are in mm)
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DocID027183 Rev 3
STD47N10F7AG
4.2
Package information
DPAK (TO-252) packing information
Figure 21: DPAK (TO-252) tape outline
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Package information
STD47N10F7AG
Figure 22: DPAK (TO-252) reel outline
Table 9: DPAK (TO-252) tape and reel mechanical data
Tape
Reel
mm
mm
Dim.
Dim.
Min.
Max.
A0
6.8
7
A
B0
10.4
10.6
B
1.5
12.1
C
12.8
B1
14/16
D
1.5
D1
1.5
E
1.65
F
1.6
Min.
Max.
330
13.2
D
20.2
G
16.4
1.85
N
50
7.4
7.6
T
K0
2.55
2.75
P0
3.9
4.1
Base qty.
2500
P1
7.9
8.1
Bulk qty.
2500
P2
1.9
2.1
R
40
T
0.25
0.35
W
15.7
16.3
DocID027183 Rev 3
18.4
22.4
STD47N10F7AG
5
Revision history
Revision history
Table 10: Document revision history
Date
Revision
23-Feb-2015
1
First release
17-Jun-2015
2
Updated Section 4: Package mechanical data.
Minor text changes
3
Updated title and features on cover page.
Updated Section 1: "Electrical ratings" and Section 2: "Electrical
characteristics".
Minor text changes
01-Feb-2017
Changes
DocID027183 Rev 3
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STD47N10F7AG
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DocID027183 Rev 3
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