STF120NF10

STB120NF10T4, STP120NF10, STW120NF10 N-channel 100 V, 9.0 mΩ typ., 110 A STripFET™ II Power MOSFETs in D²PAK, TO-220 and TO-247 packages Datasheet - production data Features TAB Order code VDS RDS(on) max. ID 100 V 10.5 mΩ 110 A STB120NF10T4 STP120NF10 D2PAK TAB STW120NF10 TO-220 1 2 3 3 2 TO-247    Exceptional dv/dt capability 100% avalanche tested Low gate charge 1 Applications Figure 1: Internal schematic diagram  Switching applications Description D(2, TAB) These Power MOSFETs have been developed using STMicroelectronics’ unique STripFET process, which is specifically designed to minimize input capacitance and gate charge. This renders the devices suitable for use as primary switch in advanced high-efficiency isolated DC-DC converters for telecom and computer applications, and applications with low gate charge driving requirements. G(1) S(3) AM01475v1_noZen Table 1: Device summary Order code Marking Package Packing STB120NF10T4 B120NF10 D2PAK Tape and reel STP120NF10 P120NF10 TO-220 STW120NF10 120NF10 TO-247 November 2017 DocID9522 Rev 8 This is information on a product in full production. Tube 1/19 www.st.com Contents STB120NF10T4, STP120NF10, STW120NF10 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 5 2/19 4.1 D²PAK (TO-263) type A2 package information ................................. 9 4.2 D²PAK packing information ............................................................. 12 4.3 TO-220 package information ........................................................... 14 4.4 TO-247 package information ........................................................... 16 Revision history ............................................................................ 18 DocID9522 Rev 8 STB120NF10T4, STP120NF10, STW120NF10 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 100 V VGS Gate-source voltage ±20 V Drain current (continuous) at TC = 25 °C 110 A ID Drain current (continuous) at TC = 100 °C 77 A IDM(1) Drain current (pulsed) 440 A PTOT Total dissipation at TC = 25 °C 312 W Peak diode recovery voltage slope 10 V/ns Single pulse avalanche energy 550 mJ -55 to 175 °C dv/dt(2) EAS(3) Tj Operating junction temperature range Tstg Storage temperature range Notes: (1)Pulse (2)I SD width is limited by safe operating area. ≤ 110 A, di/dt ≤ 300 A/μs, VDD = 80% V(BR)DSS (3)Starting Tj =25 °C, ID = 60 A, VDD = 50 V Table 3: Thermal data Value Symbol Parameter TO-220 Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient Rthj-pcb Thermal resistance junction-pcb(1) TO-247 D2PAK 0.48 Unit °C/W 62.5 °C/W 35 °C/W Notes: (1)When mounted on an 1-inch2 FR-4, 2 Oz copper board. DocID9522 Rev 8 3/19 Electrical characteristics 2 STB120NF10T4, STP120NF10, STW120NF10 Electrical characteristics (T CASE= 25 °C unless otherwise specified) Table 4: On/off states Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions Min. VGS = 0 V, ID = 250 µA 100 Typ. Max. Unit V VGS = 0 V, VDS = 100 V 1 µA VGS = 0 V, VDS= 100 V, Tc = 125 °C(1) 10 µA Gate-source leakage current VDS = 0 V, VGS = ±20 V ±100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 4 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 60 A 9.0 10.5 mΩ Typ. Max. Unit IDSS Zero gate voltage drain current IGSS 2 Notes: (1)Defined by design, not subject to production test. Table 5: Dynamic Symbol Ciss Parameter Test conditions Min. Input capacitance VDS = 25 V, f = 1 MHz, VGS= 0 V Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge - 5200 pF 785 pF 325 VDD = 80 V, ID= 120 A, VGS = 0 to 10 V (see Figure 14: "Test circuit for gate charge behavior" ) 172 - pF 233(1) nC 32 nC 64 nC Notes: (1)Defined by design, not subject to production test. Table 6: Switching times Symbol td(on) tr td(off) tf 4/19 Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions Min. Typ. Max. Unit VDD = 50 V, ID = 60 A, RG = 4.7 Ω, VGS = 10 V (see Figure 13: "Test circuit for resistive load switching times" and Figure 18: "Switching time waveform") - 25 - ns - 90 - ns - 132 - ns - 68 - ns DocID9522 Rev 8 STB120NF10T4, STP120NF10, STW120NF10 Electrical characteristics Table 7: Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source drain current - 110 A ISDM(1) Source-drain current (pulsed) - 440 A VSD(2) Forward on voltage ISD = 120 A, VGS= 0 V - 1.3 V trr Reverse recovery time - 152 ns Qrr Reverse recovery charge - 760 nC IRRM Reverse recovery current ISD = 120 A, di/dt = 100 A/µs, VDD = 40 V, Tj = 150 °C (see Figure 15: "Test circuit for inductive load switching and diode recovery times") - 10 A Notes: (1)Pulse width is limited by safe operating area. (2)Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID9522 Rev 8 5/19 Electrical characteristics 2.1 6/19 STB120NF10T4, STP120NF10, STW120NF10 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Normalized V(BR)DSS vs temperature Figure 7: Static drain-source on-resistance DocID9522 Rev 8 STB120NF10T4, STP120NF10, STW120NF10 Electrical characteristics Figure 8: Gate charge vs gate-source voltage Figure 9: Capacitance variations Figure 10: Normalized gate threshold voltage vs temperature Figure 11: Normalized on-resistance vs temperature Figure 12: Source-drain diode forward characteristics DocID9522 Rev 8 7/19 Test circuits 3 8/19 STB120NF10T4, STP120NF10, STW120NF10 Test circuits Figure 13: Test circuit for resistive load switching times Figure 14: Test circuit for gate charge behavior Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform DocID9522 Rev 8 STB120NF10T4, STP120NF10, STW120NF10 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 D²PAK (TO-263) type A2 package information Figure 19: D²PAK (TO-263) type A2 package outline DocID9522 Rev 8 9/19 Package information STB120NF10T4, STP120NF10, STW120NF10 Table 8: D²PAK (TO-263) type A2 package mechanical data mm Dim. Min. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10.00 E1 8.70 8.90 9.10 E2 7.30 7.50 7.70 e 10.40 2.54 e1 4.88 5.28 H 15.00 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 10/19 Typ. 0.40 0° DocID9522 Rev 8 8° STB120NF10T4, STP120NF10, STW120NF10 Package information Figure 20: D²PAK (TO-263) recommended footprint (dimensions are in mm) DocID9522 Rev 8 11/19 Package information 4.2 STB120NF10T4, STP120NF10, STW120NF10 D²PAK packing information Figure 21: D²PAK tape outline 12/19 DocID9522 Rev 8 STB120NF10T4, STP120NF10, STW120NF10 Package information Figure 22: D²PAK reel outline Table 9: D²PAK tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 DocID9522 Rev 8 Min. Max. 330 13.2 26.4 30.4 13/19 Package information 4.3 STB120NF10T4, STP120NF10, STW120NF10 TO-220 package information Figure 23: TO-220 type A package outline 14/19 DocID9522 Rev 8 STB120NF10T4, STP120NF10, STW120NF10 Package information Table 10: TO-220 type A package mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.55 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10.00 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13.00 14.00 L1 3.50 3.93 L20 16.40 L30 28.90 øP 3.75 3.85 Q 2.65 2.95 DocID9522 Rev 8 15/19 Package information 4.4 STB120NF10T4, STP120NF10, STW120NF10 TO-247 package information Figure 24: TO-247 package outline 16/19 DocID9522 Rev 8 STB120NF10T4, STP120NF10, STW120NF10 Package information Table 11: TO-247 package mechanical data mm Dim. Min. Typ. Max. A 4.85 5.15 A1 2.20 2.60 b 1.0 1.40 b1 2.0 2.40 b2 3.0 3.40 c 0.40 0.80 D 19.85 20.15 E 15.45 15.75 e 5.30 L 14.20 14.80 L1 3.70 4.30 L2 5.45 5.60 18.50 ØP 3.55 ØR 4.50 S 5.30 DocID9522 Rev 8 3.65 5.50 5.50 5.70 17/19 Revision history 5 STB120NF10T4, STP120NF10, STW120NF10 Revision history Table 12: Document revision history Date Revision 20-Mar-2006 2 Preliminary datasheet 31-Mar-2006 3 Typing error 19-Jun-2006 4 New template, no content change 28-Jun-2006 5 New ID value on Table 2 05-Oct-2006 6 New value on Table 7 11-May-2011 7 Added new package and mechanical data: TO-220FP 8 Part number STF120NF10 has been moved to a separate datasheet. Updated features, description and device summary on cover page. Updated Table 2: "Absolute maximum ratings", Table 3: "Thermal data" and Table 4: "On/off states". Updated Section 4: "Package information". Minor text changes 03-Nov-2017 18/19 Changes DocID9522 Rev 8 STB120NF10T4, STP120NF10, STW120NF10 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved DocID9522 Rev 8 19/19