STL115N10F7AG

STL115N10F7AG Automotive-grade N-channel 100 V, 5 mΩ typ., 107 A, STripFET™ F7 Power MOSFET in a PowerFLAT™ 5x6 package Datasheet - production data Features Order code VDS RDS(on) max ID PTOT STL115N10F7AG 100 V 6 mΩ 107 A 136 W      AEC-Q101 qualified Among the lowest RDS(on) on the market Excellent FoM (figure of merit) Low Crss/Ciss ratio for EMI immunity High avalanche ruggedness Applications Figure 1: Internal schematic diagram  Switching applications Description This N-channel Power MOSFET utilizes STripFET™ F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. Table 1: Device summary Order code Marking Package Packaging STL115N10F7AG 115N10F7 PowerFLAT™ 5x6 Tape and reel December 2016 DocID029841 Rev 2 This is information on a product in full production. 1/15 www.st.com Contents STL115N10F7AG Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 5 2/15 4.1 PowerFLAT™ 5x6 WF type C package information .......................... 9 4.2 PowerFLAT™ 5x6 packing information ........................................... 12 Revision history ............................................................................ 14 DocID029841 Rev 2 STL115N10F7AG 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 100 V VGS Gate-source voltage ±20 V ID Drain current (continuous) at TC = 25 °C 107 A ID Drain current (continuous) at TC = 100 °C 75 A IDM(1) Drain current (pulsed) 428 A PTOT Total dissipation at TC = 25 °C 136 W EAS(2) Single pulse avalanche energy 490 mJ -55 to 175 °C Value Unit TJ Operating junction temperature range Tstg Storage temperature range Notes: (1)Pulse width limited by safe operating area (2)Starting Tj = 25 °C, ID = 18 A, VDD = 50 V Table 3: Thermal resistance Symbol Parameter Rthj-case Thermal resistance junction-case 1.1 °C/W Rthj-pcb (1) Thermal resistance junction-pcb 31.3 °C/W Notes: (1) When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 s DocID029841 Rev 2 3/15 Electrical characteristics 2 STL115N10F7AG Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4: On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS= 0 V, ID = 250 µA Min. Typ. Max. 100 Unit V VGS = 0 V, VDS = 100 V 1 VGS = 0 V, VDS = 100 V, TC = 125 °C(1) 10 Gate body leakage current VDS = 0 V, VGS = 20 V 100 nA VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA 4.5 V RDS(on) Static drain-source on-resistance VGS= 10 V, ID= 53 A 5 6 mΩ Min. Typ. Max. Unit - 5600 - pF - 1200 - pF - 50 - pF - 72.5 - nC - 35.5 - nC - 15 - nC Test conditions Min. Typ. Max. Unit VDD = 50 V, ID = 53 A, RG = 4.7 Ω, VGS = 10 V (see Figure 13: "Test circuit for resistive load switching times" and Figure 18: "Switching time waveform") - 33 - ns - 38 - ns - 48 - ns - 20 - ns IDSS Zero gate voltage drain current IGSS 2.5 µA Notes: (1)Defined by design, not subject to production test. Table 5: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 50 V, f = 1 MHz, VGS = 0 V VDD = 50 V, ID = 107 A, VGS = 10 V (see Figure 14: "Test circuit for gate charge behavior") Table 6: Switching times Symbol td(on) tr td(off) tf 4/15 Parameter Turn-on delay time Rise time Turn-off delay time Fall time DocID029841 Rev 2 STL115N10F7AG Electrical characteristics Table 7: Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit 107 A ISD Source-drain current - ISDM(1) Source-drain current (pulsed) - 428 A VSD(2) Forward on voltage ISD = 53 A, VGS = 0 V - 1.2 V trr Reverse recovery time - 60 ns Qrr Reverse recovery charge - 96 nC IRRM Reverse recovery current ISD = 107 A, di/dt = 100 A/µs, VDD = 80 V, Tj = 150 °C (see Figure 15: "Test circuit for inductive load switching and diode recovery times") - 3.2 A Notes: (1)Pulse (2) width limited by safe operating area Pulsed: pulse duration=300 µs, duty cycle 1.5% DocID029841 Rev 2 5/15 Electrical characteristics 2.1 STL115N10F7AG Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance 6/15 DocID029841 Rev 2 STL115N10F7AG Electrical characteristics Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Source-drain diode forward characteristics Figure 12: Normalized V(BR)DSS vs temperature DocID029841 Rev 2 7/15 Test circuits 3 8/15 STL115N10F7AG Test circuits Figure 13: Test circuit for resistive load switching times Figure 14: Test circuit for gate charge behavior Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform DocID029841 Rev 2 STL115N10F7AG 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 PowerFLAT™ 5x6 WF type C package information Figure 19: PowerFLAT™ 5x6 WF type C package outline 8231817_WF_typeC_r14 DocID029841 Rev 2 9/15 Package information STL115N10F7AG Table 8: PowerFLAT™ 5x6 WF type C mechanical data mm Dim. Min. Max. A 0.80 1.00 A1 0.02 0.05 A2 0.25 b 0.30 C 5.80 6.00 6.10 0.50 5.20 5.40 D 5.00 D2 4.15 D3 4.05 4.20 4.35 D4 4.80 5.00 5.10 D5 0.25 0.40 0.55 D6 0.15 0.30 0.45 e 10/15 Typ. 4.45 1.27 E 6.20 E2 3.50 3.70 E3 2.35 2.55 E4 0.40 0.60 E5 0.08 0.28 E6 0.20 0.325 0.45 E7 0.85 1.00 1.15 E9 4.00 4.20 4.40 E10 3.55 3.70 3.85 K 1.05 L 0.90 1.00 1.10 L1 0.175 0.275 0.375 θ 0° DocID029841 Rev 2 6.40 6.60 1.35 12° STL115N10F7AG Package information Figure 20: PowerFLAT™ 5x6 recommended footprint (dimensions are in mm) 8231817_FOOTPRINT_rev14 DocID029841 Rev 2 11/15 Package information 4.2 STL115N10F7AG PowerFLAT™ 5x6 packing information Figure 21: PowerFLAT™ 5x6 WF tape (dimensions are in mm) Figure 22: PowerFLAT™ 5x6 package orientation in carrier tape 12/15 DocID029841 Rev 2 STL115N10F7AG Package information Figure 23: PowerFLAT™ 5x6 reel (dimensions are in mm) DocID029841 Rev 2 13/15 Revision history 5 STL115N10F7AG Revision history Table 9: Document revision history Date 07-Oct-2016 15-Dec-2016 14/15 Revision Changes 1 First release. 2 Datasheet status promoted from preliminary to production data. Updated features list on cover page. Updated Section 2: "Electrical characteristics". DocID029841 Rev 2 STL115N10F7AG IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID029841 Rev 2 15/15