STP30NE03L

® STP30NE03L STP30NE03LFP N - CHANNEL 30V - 0.028 Ω - 30A TO-220/TO-220FP STripFET™ POWER MOSFET TYPE STP30NE03L STP30NE03LF P s s s s V DSS 30 V 30 V R DS( on ) < 0.04 Ω < 0.04 Ω ID 30 A 17 A TYPICAL RDS(on) = 0.028 Ω 100% AVALANCHE TESTED LOW GATE CHARGE LOW THRESHOLD DRIVE 3 1 2 1 2 3 DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique ”Single Feature Size™” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS s DC MOTOR CONTROL s DC-DC & DC-AC CONVERTERS s SYNCHRONOUS RECTIFICATION TO-220 TO-220FP I NTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symb ol Parameter Value ST P30NE03L V DS V DGR V GS ID ID I DM ( • ) P tot V ISO T s tg Tj June 1999 Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k Ω) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) T otal Dissipation at Tc = 25 C Derating Factor Insulation W ithstand Voltage (DC) Storage T emperature Max. O perating Junct ion T emperature o o o Unit STP30NE03L FP 30 30 ± 20 V V V 17 12 68 25 0.17 2000 A A A W W/ oC V o o 30 21 120 70 0.47  -65 to 175 175 C C 1/9 (•) Pulse width limited by safe operating area STP30NE03L/FP THERMAL DATA TO-220 R thj -case R thj -amb R thc-sink Tl Thermal Resistance Junction-case Max 2.14 62.5 0.5 300 TO-220FP 6 o o o C/W C/W C/W o C Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose AVALANCHE CHARACTERISTICS Symbo l IAR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 50 V) Max Value 15 250 Unit A mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µ A V GS = 0 Min. 30 1 10 ± 100 Typ. Max. Unit V µA µA nA V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = ± 20 V T c = 125 oC ON (∗) Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance On State Drain Current V GS = 5 V V GS = 10 V Test Con ditions ID = 250 µ A I D = 15 A ID = 15 A 30 Min. 1 Typ. 1.75 0.042 0.028 Max. 2.5 0.055 0.04 Unit V Ω Ω A V DS > ID(o n) x R DS(on )ma x V GS = 10 V DYNAMIC Symbo l g f s (∗ ) C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz I D =15 A V GS = 0 Min. 5 Typ. 15 800 205 70 Max. Unit S pF pF pF 2/9 STP30NE03L/FP ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Delay T ime Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 15 V I D = 14 A R G = 4.7 Ω V GS = 5 V (Resistive Load, see fig. 3) V DD = 48 V ID = 30 A V GS = 5 V Min. Typ. 19 110 20 8 10 28 Max. Unit ns ns nC nC nC SWITCHING OFF Symbo l t d(of f) tf tr (Voff) tf tc Parameter Turn-off Delay T ime Fall T ime Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions V DD = 15 V I D = 14 A V GS = 5 V R G = 4.7 Ω (Resistive Load, see fig. 3) V DD = 24 V I D = 28 A V GS = 5 V R G = 4.7 Ω (Induct ive Load, see fig. 5) Min. Typ. 40 20 20 38 65 Max. Unit ns ns ns ns ns SOURCE DRAIN DIODE Symbo l ISD I SDM (• ) V SD ( ∗ ) t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 30 A V GS = 0 30 30 2 I SD = 28 A di/dt = 100 A/ µ s T j = 150 o C V DD = 20 V (see test circuit, fig. 5) Test Con ditions Min. Typ. Max. 30 120 1.5 Unit A A V ns nC A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area for TO-220 Safe Operating Area for TO-220FP 3/9 STP30NE03L/FP Thermal Impedance for TO-220 Thermal Impedance forTO-220FP Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/9 STP30NE03L/FP Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STP30NE03L/FP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STP30NE03L/FP TO-220 MECHANICAL DATA DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147 E mm TYP. MAX. 4.60 1.32 2.72 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 MIN. 0.173 0.048 0.094 4.40 1.23 2.40 inch TYP. MAX. 0.181 0.051 0.107 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 0.645 0.551 0.116 0.620 0.260 0.154 0.151 A C D1 L2 F1 D G1 Dia. F2 F L5 L7 L6 L9 L4 G H2 P011C 7/9 STP30NE03L/FP TO-220FP MECHANICAL DATA DIM. MIN. A B D E F F1 F2 G G1 H L2 L3 L4 L6 L7 Ø 28.6 9.8 15.9 9 3 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 30.6 10.6 16.4 9.3 3.2 1.126 0.385 0.626 0.354 0.118 mm TYP. MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409 A B L3 L6 L7 F1 ¯ F D G1 E H F2 123 L2 L4 8/9 G STP30NE03L/FP Information furnished is believed to be accurate and reliable. However, STMicroelect onics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all informaton previously supplied. STMicroelectronics products i are not authorized for use as critical components in life support devices or systems with express written approval of STMicroelectronics. out The ST logo is a trademark of STMicroelectronics © 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysi - Malta - Mexico - Morocco - The Netherlands a Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com . 9/9