STUSB1602
Datasheet
USB Type-C™ controller with TX/RX line driver and BMC
Features
•
•
•
Type-C™ attach and cable orientation detection
Power role support: source/sink/DRP
Integrated power switch for VCONN supply:
•
–
programmable current limit up to 600 mA
–
overcurrent, overvoltage, and thermal protection
–
undervoltage lockout
Integrated VBUS voltage monitoring
•
Integrated VBUS and VCONN discharge path
•
•
Integrated BMC transceiver
VBUS switch gate driver
•
Short-to-VBUS protection on CC
•
Dual power supply (VSYS and/or VDD):
•
•
Device summary
Order code
STUSB1602AQTR
Power role
SOURCE, SINK, DRP
Package
QFN24 EP 4x4 mm
Temp. range
- 40 °C up to 105 °C
Marking
1602A
Related products
STM32F072RB and STSW-STUSB010
STM32F446ZE and STSW-STUSB012
STM32G474RE and STSW-STUSB014
–
VSYS = [3.0 V; 5.5 V]
–
VDD = [4.1 V; 22 V]
Compliant with:
–
USB Type-C™ rev 2.0
–
USB PD rev 3.0
Certified:
–
Source: TID 1070031
–
Sink PPS: TID 5477
Applications
•
•
•
•
•
•
•
•
•
Power hubs and docking stations
Smartphones, tablets and gimbal stabilizers
Gaming, PNDs and drones
Cameras, camcorders, and MP3 players
Smart plugs, wall adapters, and chargers
Power sourcing devices (PoE)
Power sinking hosts
PPS applications
Any source or sink or dual role device
STM32L4R5ZI and STSW-STUSB015
Description
The STUSB1602 is a generic IC, in a 20 V technology it addresses a USB Type-C™
port management both for source, sink and dual role devices, with or without USB
data. It is designed for a broad range of applications and can handle the following
USB Type-C functions: attach detection, plug orientation detection, host to device
connection, VCONN support, and VBUS configuration.
It also provides a USB PD TX/RX line driver and a BMC (bi-phase mark coding)
transceiver which enable USB PD communication through an external MCU.
DS11254 - Rev 5 - July 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
STUSB1602
Functional description
1
Functional description
The STUSB1602 is a high voltage standalone USB Type-C controller also acting as a USB PD TX/RX physical
layer for an external MCU. It is designed to interface with the Type-C receptacle on host side. It is used to
establish and manage the source-to-sink connection between two USB Type-C host and device ports.
The STUSB1602 major role is to:
Detect the connection between two USB Type-C ports (attach detection)
1.
2.
Establish a valid source-to-sink connection
3.
Determine the attached device mode: source, sink or accessory
4.
Resolve cable orientation and twist connections to establish USB data routing (MUX control)
5.
Configure and monitor VBUS power path
6.
Manage VBUS power capability: USB default, Type-C medium or Type-C high current mode
7.
Configure VCONN when required
8.
Support USB PD negotiation
The STUSB1602 also provides:
•
Dead battery mode
•
I²C interface and interrupt
•
Start-up configuration customization: static through NVM and/or dynamic through I²C
•
High voltage protection
•
Accessory mode detection
Figure 1. Functional block diagram
DS11254 - Rev 5
page 2/39
STUSB1602
Inputs / outputs
2
Inputs / outputs
2.1
Pinout
2.2
CC1
2
VCONN
3
VREG_1V2
VBUS_EN_SRC
VBUS_EN_SNK
19
18
EP
VBUS_SENSE
17
A_B_SIDE
16
SCLK
15
TX_EN
14
MISO
7
8
9
10
11
13
12
NSS
6
20
MOSI
RESET
21
GND
5
22
ALERT#
CC2DB
23
SDA
4
24
SCL
CC2
VSYS
1
VREG_2V7
CC1DB
VDD
Figure 2. STUSB1602 pin connections
ADDR0
Pin list
Table 1. Pin functions list
DS11254 - Rev 5
Pin
Name
Type
Description
Typical connection
1
CC1DB
HV AIO
Dead battery enable on CC1 pin
CC1 pin if used or ground
2
CC1
HV AIO
Type-C configuration channel 1
Type-C receptacle A5
3
VCONN
PWR
Power input for active plug
5 V power source
4
CC2
HV AIO
Type-C configuration channel 2
Type-C receptacle B5
5
CC2DB
HV AIO
Dead battery enable on CC2 pin
CC2 pin if used or ground
6
RESET
DI
Reset input (active high)
7
SCL
DI
I²C clock input
To I²C master, ext. pull-up
8
SDA
DI/OD
I²C data input/output, active low open drain
To I²C master, ext. pull-up
9
ALERT#
OD
I²C interrupt, active low open drain
To I²C master, ext. pull-up
10
GND
GND
Ground
Ground
11
MOSI
DO
Master out slave in: serial data from
STUSB1602 to MCU, BMC decoded from
connected CC line
To MCU, ext. pull-up referenced to
MCU Vio
12
NSS
OD
Chip select, open drain active low to control
MCU SPI/MSP interface
To MCU, ext. pull-up referenced to
MCU Vio
page 3/39
STUSB1602
Pin list
Pin
Name
Type
Description
Typical connection
13
ADDR0
DI
I²C device address setting (see Section 5 I²C
interface)
Static
14
MISO
DI
Master in slave out: serial data from MCU to
STUSB1602 encoded in BMC to drive the CC
line
From MCU, ext. pull-up referenced
to MCU Vio
15
TX_EN
DI
TX enable, open drain active high to drive CC
line from the embedded BMC interface
From MCU, needs to be
maintained low by MCU or pulled
down when receiving standby
Serial clock to clock data transfer between
MCU and the STUSB1602. Open drain output To MCU, ext. pull-up referenced to
pin, needs external pull-up referenced to MCU
MCU Vio
Vio
16
SCLK
DO
17
A_B_SIDE
OD
Cable orientation, active low open drain
USB super speed MUX select, ext.
pull-up
18
VBUS_SENSE
HV AI
VBUS voltage monitoring and discharge path
From VBUS
19
VBUS_EN_SNK
HV AIO
VBUS sink power path enable,
active low open drain
To switch or power system, ext.
pull-up
20
VBUS_EN_SRC
HV AIO
VBUS source power path enable, active low
open drain
To switch or power system, ext.
pull-up
21
VREG_1V2
PWR
1.2 V internal regulator output
1 µF typ. decoupling capacitor
22
VSYS
PWR
Power supply from system
From power system, connect to
ground if not used
23
VREG_2V7
PWR
2.7 V internal regulator output
1 µF typ. decoupling capacitor
24
VDD
HV PWR
Main power supply from USB power line
From VBUS
-
EP
GND
Exposed pad is connected to ground
To ground
Table 2. Pin function descriptions
DS11254 - Rev 5
Type
Description
D
Digital
A
Analog
O
Output pad
I
Input pad
IO
Bidirectional pad
OD
Open drain output
PD
Pull-down
PU
Pull-up
HV
High voltage
PWR
Power
GND
Ground
page 4/39
STUSB1602
Pin description
2.3
2.3.1
Pin description
CC1 / CC2
CC1 and CC2 are the configuration channel pins used for connection and attachment detection, plug orientation
determination and system configuration management across USB Type-C cable.
2.3.2
CC1DB/CC2DB
CC1DB and CC2DB are used for dead battery mode when the STUSB1602 is configured in sink power role or
dual power role. This mode is enabled by connecting CC1DB and CC2DB respectively to CC1 and CC2. Thanks
to this connection, the pull down terminations on the CC pins are present by default even if the device is not
supplied (see Section 3.6 Dead battery).
Note:
CC1DB and CC2DB must be connected to ground when the STUSB1602 is configured in source power role or
when dead battery mode is not supported.
2.3.3
VCONN
This power input is connected to a power source that can be a 5 V power supply. It is used to provide power to
the local plug. It is internally connected to power switches that are protected against short-circuit and overvoltage.
This does not require any protection on the input side. When a valid source-to-sink connection is determined
and the VCONN power switches are enabled, VCONN is provided by the source to the unused CC pin (see
Section 3.4 VCONN supply). If not used, VCONN can be left floating.
2.3.4
RESET
Active high reset.
2.3.5
I²C interface pins
Table 3. I²C interface pins list
Name
2.3.6
Description
SCL
I²C clock – need external pull-up
SDA
I²C data – need external pull-up
ALERT#
I²C interrupt – need external pull-up
ADDR0
I²C device address bit (see Section 5 I²C interface)
GND
Ground.
2.3.7
MOSI
Master out slave in: data from the connected CC line are decoded using the BMC and then transmitted via the
STUSB1602 to the MCU. Data are valid on the falling edge of the SCLK line and must be sampled by the MCU on
this edge.
2.3.8
NSS
The chip select signal is driven by the STUSB1602 and is connected to the MCU. It activates the SPI/MSP
interface transfer. The NSS signal drives the MCU so that:
•
When TX_EN is asserted (TX mode), the STUSB1602 transmits data from the MCU over the CC line. Note,
the MCU must provide data to be encoded on the MISO line which must be in synchrony with the SCLK
•
When TX_EN is not asserted (RX mode, default), the CC line is activity detected, data are received, and the
BMC is decoded by the STUSB1602. Decoded data are sent on the MOSI line in synchrony with the SCLK
DS11254 - Rev 5
page 5/39
STUSB1602
Pin description
2.3.9
MISO
Master in slave out: data from the MCU are encoded using the BMC and then transmitted via the STUSB1602 to
the connected CC line driver. Data are sampled by the STUSB1602 on the rising edge of the SCLK line and must
be stable on this edge.
2.3.10
TX_EN
TX_EN is a control signal from the MCU to the STUSB1602. It enables the BMC control logic that transfers data
from the MCU serial interface, encodes it in BMC format, and drives the connected CC line.
Note:
TX mode overrides RX mode.
2.3.11
SCLK
The serial clock signal from the STUSB1602 drives the SPI/MSP interface of the MCU and the clock data on the
MISO and MOSI pins.
2.3.12
A_B_SIDE
This output pin provides cable orientation. It is used to establish USB SuperSpeed signal routing. The cable
orientation is also provided by an internal I²C register. This signal is not required if no data support or USB 2.0
supports only.
Table 4. USB data MUX select
Value
2.3.13
CC pin position
HiZ
CC1 pin is attached to CC line
0
CC2 pin is attached to CC line
VBUS_SENSE
This input pin is used to sense VBUS presence, monitor VBUS voltage and discharge VBUS on USB Type-C
receptacle side.
2.3.14
VBUS_EN_SNK
In sink power role, this pin allows the incoming VBUS power to be enabled when the connection to a source is
established and VBUS is in a valid operating range. The open drain output allows a PMOS transistor to be directly
driven. The logic value of the pin is also advertised in a dedicated I²C register bit.
2.3.15
VBUS_EN_SRC
In source power role, this pin allows the outgoing VBUS power to be enabled when the connection to a sink is
established and VBUS is in a valid operating range. The open drain output allows a PMOS transistor to be directly
driven. The logic value of the pin is also advertised in a dedicated I²C register bit.
2.3.16
VREG_1V2
This pin is used only for external decoupling of 1.2 V internal regulator. The recommended decoupling capacitor
is: 1 µF typ. (0.5 µF min.; 10 µF max.).
2.3.17
VSYS
This is the low power supply of the system, if there is any. It can be connected directly to a system power supply
delivering 3.3 V or 5 V. It is recommended to connect this pin to ground when it is not used.
2.3.18
VREG_2V7
This pin is used for external decoupling of the 2.7 V internal regulator. The recommended decoupling capacitor is:
1 µF typ. (0.5 µF min., 10 µF max.).
DS11254 - Rev 5
page 6/39
STUSB1602
Pin description
2.3.19
VDD
This is the power supply from the USB power line for applications powered by VBUS.
In source power role, this pin can be used to sense the voltage level of the main power supply providing the VBUS.
It allows UVLO and OVLO thresholds to be considered independently on the VDD pin as additional conditions to
enable the VBUS power path through the VBUS_EN_SRC pin (see Section 3.3.3 VBUS power path assertion).
When the UVLO threshold detection is enabled, the VDD pin must be connected to the main power supply to
establish the connection and to assert the VBUS power path.
DS11254 - Rev 5
page 7/39
STUSB1602
General description
3
General description
3.1
CC interface
The STUSB1602 controls the connection to the configuration channel (CC) pins, CC1 and CC2, through two main
blocks: the CC line interface block and the CC control logic block.
The CC line interface block is used to:
•
Configure termination mode on the CC pins relative to the power mode supported i.e. pull-up for source
power role
Monitor the CC pin voltage values relative to the attachment detection thresholds
•
•
Configure VCONN on the unconnected CC pin when required
•
Protect the CC pins against overvoltage
The CC control logic block is used to:
•
Execute the Type-C FSM relative to the Type-C power mode supported
•
Determine the electrical state for each CC pin relative to the detected thresholds
•
Evaluate the conditions relative to the CC pin states and the VBUS voltage value to transition from one state
to another in the Type-C FSM
•
Detect and establish a valid source-to-sink connection
•
Determine the attached device mode: source, sink or accessory
•
Determine cable orientation to allow external routing of the USB data
•
Manage VBUS power capability: USB default, Type-C medium or Type-C high current mode
•
Handle hardware faults
The CC control logic block implements the Type-C FSMs corresponding to the following Type-C power modes:
•
Source power role with accessory support
•
Sink power role with accessory support
•
Sink power role without accessory support
•
Dual power role with accessory support
The default Type-C power mode is selected through NVM programming (see Section 6 Start-up configuration)
and can be changed by software during operation through the I²C interface.
3.2
BMC interface
Figure 3. BMC interface
DS11254 - Rev 5
page 8/39
STUSB1602
VBUS power path control
3.2.1
BMC interface behavior
When a connection is established on the STUSB1602 (any attached state), the CC line used for connection is
also internally connected to BMC block which allows the communication on this line.
The CC line is primary managed by CC control logic. BMC communication on the CC line must not interact with
this control logic, as driving times of the line are short and are related to denounce times of the CC logic.
BMC block handles BMC encoding and decoding. It also handles CC line activity detection, discharging the
external MCU of such operations.
The default state of the BMC block is to listen to the line (RX mode). TX mode is enabled only by assertion of the
TX_EN signal via the external MCU.
3.2.2
TX mode
When the TX_EN signal is asserted via MCU, BMC block goes to the TX state:
•
NSS signal is driven low, indicating to the SPI/MSP slave interface of the MCU that data are being
transmitted on the CC line. MCU provides the data
•
The STUSB1602 drives the NSS signal low, informing SPI/MSP slave interface of the MCU that data are
requested on the MISO line
•
The STUSB1602 clocks the SCLK signal
•
MCU presents data to be transmitted on the MISO line and data are sampled on the rising edge of SCLK
(data must be stable on this edge)
•
Sampled data (from MISO line) are encoded by the BMC, and the resulting values drive the CC line
according to USB PD standard
When all data are transmitted, MCU drives the TX_EN pin low, and lists the end of transmission. The STUSB1602
ends transmission with a corresponding trailing edge termination. It then goes back into to default state and
releases the CC line from the BMC driver to the pull-up/pull-down CC line interfaces.
3.2.3
RX mode
RX mode is the default state of the BMC interface.
In this mode, the receiver listens to the connected CC line. It does not interface with the CC line interfaces or the
CC control logic.
When all data are detected and received on the CC line, according to the activity described in the USB Power
Delivery Standard, the BMC interface:
•
Drives NSS signal low
Outputs the clock on the SCLK signal which is recovered from the BMC signal
•
•
Outputs recovered data (from the BMC signal) on the MOSI line to the connected MCU. Data are valid on
the SCLK falling edge and are sampled on this edge by the SPI/MSP interface of MCU
When no more data are detected on the CC line, the NSS goes back to “high” which is its default state. This
informs the MCU that no more activity is present on the bus.
3.3
VBUS power path control
3.3.1
VBUS monitoring
The VBUS monitoring block supervises from the VBUS_SENSE pin the VBUS voltage on the USB Type-C
receptacle side.
It is used to check that the VBUS is within a valid voltage range:
•
•
DS11254 - Rev 5
To establish a valid source-to-sink connection according to USB Type-C standard specifications
To safely enable the VBUS power path through the VBUS_EN_SRC pin or VBUS_EN_SNK pin depending
on the power role.
page 9/39
STUSB1602
VBUS power path control
It allows detection of unexpected VBUS voltage conditions such as undervoltage or overvoltage relative to the valid
VBUS voltage range. When such conditions occur, the STUSB1602 reacts as follows:
•
At attachment, it prevents the source-to-sink connection and the VBUS power path assertion
•
After attachment, it deactivates the source-to-sink connection and disables the VBUS power path. In source
power role, the device goes into error recovery state. In sink power role, the device goes into unattached
state.
The VBUS voltage value is adjusted automatically at attachment (vSafe5V) and via MCU at each PDO transition.
Monitoring is then disabled during T_PDO_transition (i.e. the default value of 300 ms is changed through NVM
programming). Additionally, if a transition occurs to a lower voltage, the discharge path is activated during this
time.
The valid VBUS voltage range is defined from the VBUS nominal voltage by a high threshold voltage and a low
threshold voltage whose nominal values are respectively VBUS +5% and VBUS -5%. The nominal threshold limits
can be shifted by a fraction of VBUS from +1% to +15% for the high threshold voltage and from -1% to -15% for
the low threshold voltage. This means the threshold limits can vary from VBUS +5% to VBUS +20% for the high
limit and from VBUS-5% to VBUS -20% for the low limit.
The threshold limits are preset by default in NVM (see Section 8.3 Electrical and timing characteristics). The
threshold limits can be changed independently through NVM programming (see Section 6 Start-up configuration)
and also by software during attachment through the I²C interface.
3.3.2
VBUS discharge
The monitoring block also handles the internal VBUS discharge path connected to the VBUS_SENSE pin. The
discharge path is activated at detachment, or when the device goes into the error recovery state whatever the
power role (see Section 3.7 Hardware fault management).
The VBUS discharge path is enabled by default in NVM and can be disabled through NVM programming only
(see Section 6 Start-up configuration). The discharge time duration is also preset by default in NVM (see
Section 8.3 Electrical and timing characteristics). The discharge time duration can be changed through NVM
programming (see Section 6 Start-up configuration) and also by software through the I²C interface.
3.3.3
VBUS power path assertion
The STUSB1602 can control the assertion of the VBUS power path on the USB Type-C port, directly or indirectly,
through the VBUS_EN_SRC pin and VBUS_EN_SNK pins according to the system power role.
The tables below summarize the configurations and the operation conditions that determine the electrical value of
the VBUS_EN_SRC and VBUS_EN_SNK pins during system operations.
Table 5. Conditions for VBUS power path assertion in source power role
Electrical
value
Pin
0
Operation conditions
Type-C attached state
VDD pin monitoring
Attached.SRC or
VDD > UVLO if
VDD_UVLO enabled
and/or
VDD < OVLO if
VDD_OVLO enabled
UnorientedDebug
Accessory.SRC
or OrientedDebug
Accessory.SRC
VBUS_EN_SRC
HiZ
Any other state
VDD < UVLO if
VDD_UVLO enabled
and/or
VDD > OVLO if
VDD_OVLO enabled
VBUS_SENSE pin monitoring
Comment
VBUS is within valid voltage range if
VBUS_VALID_RANGE
enabled or
VBUS > UVLO if
The signal is
asserted only if all
the valid operation
conditions are met
VBUS _VALID_RANGE disabled
VBUS is out of valid voltage range if
VBUS_VALID_RANGE
enabled or
VBUS < UVLO if
VBUS _VALID_RANGE disabled
The signal is deasserted when at
least one non valid
operation condition is
met
As specified in the USB Type-C standard specification, the attached state “Attached.SRC” is reached only if the
voltage on the VBUS receptacle side is at vSafe0V condition when a connection is detected.
DS11254 - Rev 5
page 10/39
STUSB1602
VCONN supply
Table 6. Conditions for VBUS power path assertion in sink power role
Operation conditions
Electrical
Pin
value
Type-C attached
state
VDD pin
VBUS_SENSE pin
monitoring
monitoring
Comment
VBUS is within valid
voltage range if
VBUS
_VALID_RANGE
Attached.SNK
or
0
Debug
Not applicable
Accessory.SNK
enabled
or
VBUS > UVLO if
The signal is asserted
only if all the valid
operation conditions
are met
VBUS
_VALID_RANGE
disabled
VBUS_EN_SNK
VBUS is out of valid
voltage range if
VBUS
_VALID_RANGE
enabled
Hiz
Any other state
Not applicable
or
VBUS < UVLO
The signal is deasserted when at
least one non valid
operation condition is
met
if
VBUS
_VALID_RANGE
disabled
“Type-C attached state” refers to the Type-C FSM states as defined in the USB Type-C standard specification and
as described in the I²C register CC_OPERATION_STATUS.
“VDD pin monitoring” is valid only in source power role. Activation of the UVLO and OVLO threshold detections
can be done through NVM programming (see Section 6 Start-up configuration) and also by software through
the I²C interface. When UVLO and/or OVLO threshold detection is activated, VBUS_EN_SRC pin is asserted only
if the device is attached and the valid threshold conditions on VDD are met. Once the VBUS_EN_SRC pin is
asserted, the VBUS monitoring is done on VBUS_SENSE pin instead of the VDD pin.
“VBUS_SENSE pin monitoring” relies, by default, on a valid VBUS voltage range. The voltage range condition can
be disabled to consider UVLO threshold detection instead. The monitoring condition of the VBUS voltage can be
changed through NVM programming (see Section 6 Start-up configuration) and also by software through the
I²C interface. VBUS_EN_SRC pin is maintained asserted as long as the device is attached and a valid voltage
condition on the VBUS is met.
3.4
VCONN supply
3.4.1
VCONN input voltage
VCONN is a regulated supply used to power circuits in the plug of USB3.1 full-featured cables and other
accessories. VCONN nominal operating voltage is 5.0 V +/- 5%.
3.4.2
VCONN application conditions
VCONN pin of the STUSB1602 is connected to each CC pin (CC1 and CC2) across independent power switches.
The STUSB1602 applies VCONN only to the CC pin not connected to the CC wire when all below conditions are
met:
DS11254 - Rev 5
page 11/39
STUSB1602
VCONN supply
•
•
The device is configured in source power role
VCONN power switches are enabled
•
•
A valid connection to a sink is achieved
Ra presence is detected on the unwired CC pin
•
A valid power source is applied to the VCONN pin with respect to a predefined UVLO threshold
The STUSB1602 does not provide VCONN when it is in sink power role.
3.4.3
VCONN monitoring
The VCONN monitoring block detects if VCONN power supply is available on the VCONN pin. It is used to check that
VCONN voltage is above a pre-defined undervoltage lockout (UVLO) threshold to allow the enabling of the VCONN
power switches.
The default value of the UVLO threshold is 4.65 V typical for powered cables operating at 5 V. This value can be
changed by software to 2.65 V typical to support VCONN-powered accessories that operate down to 2.7 V.
3.4.4
VCONN discharge
The behavior of Type-C FSMs is extended to an internal VCONN discharge path capability on the CC pins
in source power mode only. The discharge path is activated during 250 ms from sink detachment detection.
This feature is disabled by default. It can be activated through NVM programming (see Section 6 Start-up
configuration) and also by software through the I²C interface.
3.4.5
VCONN control and status
The supplying conditions of VCONN across the STUSB1602 are managed through the I²C interface. Different I²C
registers and bits are used specifically for this purpose.
3.4.6
VCONN power switches
Features
The STUSB1602 integrates two current limited high-side power switches with protection that tolerates high
voltage up to 22 V on the CC pins.
Each VCONN power switch presents the following features:
•
•
•
•
•
•
DS11254 - Rev 5
Soft-start to limit inrush current
Constant current mode overcurrent protection
Adjustable current limit
Thermal protection
Undervoltage and overvoltage protections
Reverse current and reverse voltage protections
page 12/39
STUSB1602
VCONN supply
Figure 4. VCONN to CC1 and CC2 power switch protections
Current limit programming
The current limit can be set within the range 100 mA to 600 mA by a step of 50 mA. The default current limit is
programmed through NVM programming (see Section 6 Start-up configuration) and can be changed by software
through the I²C interface. At power-on or after a reset, the current limit takes the default value preset in the NVM.
Fault management
The table below summarizes the different fault conditions that could occur during switch operation and the
associated responses. An I²C alert is generated when a fault condition happens.
Table 7. Fault management conditions
Fault types
Fault conditions
Short-circuit
CC output pin shorted to ground via
very low resistive path causing rapid
current surge
Overcurrent
CC output pin connected to a load
Power switch limits the current and reduces the output voltage. I²C
that sinks current above programmed alert is asserted immediately thanks to VCONN_SW_OCP_FAULT
limit
bits
Overheating
Junction temperature exceeding 145
°C due to any reason
Power switch is disabled immediately until the temperature falls
below 145 °C minus hysteresis of 15 °C. I²C alert is asserted
immediately thanks to THERMAL_FAULT bit. The STUSB1602 goes
into transient error recovery state
Undervoltage
VCONN input voltage drops below
UVLO threshold minus hysteresis
Power switch is disabled immediately until the input voltage rises
above the UVLO threshold. I²C alert is asserted immediately thanks
to VCONN_PRESENCE bit
Overvoltage
CC output pin voltage exceeds
maximum operating limit of 6.0 V
Power switch is opened immediately until the voltage falls below
the voltage limit. I²C alert is asserted immediately thanks to
VCONN_SW_OVP_FAULT bits
CC output pin voltage exceeds
Reverse current VCONN input voltage when the power
switch is turned off
DS11254 - Rev 5
Expected actions
Power switch limits the current and reduces the output voltage. I²C
alert is asserted immediately thanks to VCONN_SW_OCP_FAULT
bits
The reverse biased body diode of the back- to-back MOS switches is
naturally disabled preventing current from flowing from CC output pin
to the input
page 13/39
STUSB1602
High voltage protection
Fault types
Fault conditions
Expected actions
CC output pin voltage exceeds
Power switch is opened immediately until the voltage difference falls
V
input voltage of more than
Reverse voltage CONN
below the voltage limit. I²C alert is asserted immediately thanks to
0.35 V for 5 V when the power switch
VCONN_SW_RVP_FAULT bits
is turned on
3.5
High voltage protection
The STUSB1602 can be safely used in systems or connected to systems that handle high voltage on the VBUS
power path. The device integrates an internal circuitry on the CC pins that tolerates high voltages and ensures
protection up to 22 V in case of unexpected short-circuits with the VBUS or in the case of a connection to a device
supplying high voltage on the VBUS.
3.6
Dead battery
Dead battery mode allows systems powered by a battery to be supplied by the VBUS when the battery is
discharged and to start the battery charging process. This mode is also used in systems that are powered through
the VBUS only.
Dead battery mode is only supported in sink power role and dual power role configurations. It operates only if the
CC1DB and CC2DB pins are connected respectively to the CC1 and CC2 pins. Thanks to these connections, the
STUSB1602 presents a pull down termination on its CC pins and advertises itself as a sink even if the device is
not supplied.
When a source system connects to a USB Type-C port with the STUSB1602 configured in dead battery mode,
it can detect the pull down termination, establish the source-to-sink connection, and provide the VBUS. The
STUSB1602 is then supplied thanks to the VDD pin connected to the VBUS on the USB Type-C receptacle side.
The STUSB1602 can finalize the source-to-sink connection and enable the power path on the VBUS thanks to the
VBUS_EN_SNK pin which allows the system to be powered.
3.7
Hardware fault management
The STUSB1602 handles hardware fault conditions related to the device itself and to the VBUS power path during
system operation.
When such conditions occur, the circuit goes into a transient error recovery state named ErrorRecovery in the
Type-C FSM. In this state, the device de-asserts the VBUS power path by disabling the VBUS_EN_SRC pin and
it removes the terminations from the CC pins during several tens of milliseconds. Then, it goes to the unattached
source state.
The STUSB1602 goes into error recovery state when at least one condition listed below is met:
•
If an overtemperature is detected, the “THERMAL_FAULT” flag is asserted
•
If an internal pull-up voltage on the CC pins is below the UVLO threshold, the “VPU_VALID” flag is asserted
•
If an overvoltage is detected on the CC pins, the “VPU_OVP_FAULT” flag is asserted
•
If the VBUS voltage is out of the valid voltage range during attachment, the “VBUS_VALID” flag is asserted
•
If an undervoltage is detected on the VDD pin during attachment when UVLO detection is enabled, the
“VDD_UVLO_DISABLE” flag is asserted
•
If an overvoltage is detected on the VDD pin during attachment when OVLO detection is enabled, the
“VDD_OVLO_DISABLE” flag is asserted
The I²C register bits mentioned above give either the state of the hardware fault when it occurs or the setting
condition to detect the hardware fault.
DS11254 - Rev 5
page 14/39
STUSB1602
Accessory mode detection
3.8
Accessory mode detection
The STUSB1602 supports the detection of audio accessory mode and debug accessory mode as defined
in the USB Type-C standard specification with the following Type-C power modes (see Section 6 Start-up
configuration):
•
Source power role with accessory support
•
Sink power role with accessory support
•
Sink power role without accessory support
•
Dual power role with accessory support
3.8.1
Audio accessory mode detection
The STUSB1602 detects an audio accessory device when both CC1 and CC2 pins are pulled down to
ground by an Ra resistor from the connected device. The audio accessory detection is advertised through the
CC_ATTACHED_MODE bits of the I²C register CC_CONNECTION_STATUS.
3.8.2
Debug accessory mode detection
The STUSB1602 detects a connection to a debug and test system (DTS) when it operates either in sink power
role or in source power role. The debug accessory detection is advertised by the DEBUG1 and DEBUG2 pins as
well as through the CC_ATTACHED_MODE bits of the I²C register CC_CONNECTION_STATUS.
•
In sink power role, a debug accessory device is detected when both the CC1 and CC2 pins are pulled up by
an Rp resistor from the connected device. The voltage levels on the CC1 and CC2 pins give the orientation
and current capability as described in the table below. The DEBUG1 pin is asserted to advertise the DTS
detection and the A_B_SIDE pin indicates the orientation of the connection. The current capability of the
DTS is given through the SINK_POWER_STATE bits of the I²C register CC_OPERATION_STATUS.
Table 8. Orientation and current capability detection in sink power role
#
CC1 pin
(CC2 pin)
CC2 pin (CC1 pin)
Charging
A_B_SIDE pin
Current capability state
current
CC1/CC2
SINK_POWER_STATE
configuration
(CC2/CC1)
bit values
Default
HiZ (0)
PowerDefault.SNK (source
1
Rp 3 A
Rp 1.5 A
supplies default USB
current)
2
Rp 1.5 A
Rp default
1.5 A
HiZ (0)
Power1.5.SNK (source supplies 1.5 A USB Type-C current)
Power3.0.SNK (source
3
Rp 3 A
Rp default
3.0 A
HiZ (0)
supplies 3.0 A USB Type-C
current)
PowerDefault.SNK (source
4
Rpdef/1.5 A/ 3 A
Rpdef/1.5 A/ 3 A
Default
HiZ (HiZ)
supplies default USB
current)
•
DS11254 - Rev 5
In source power role, a debug accessory device is detected when both the CC1 and
CC2 pins are pulled down to ground by an Rd resistor from the connected device. The orientation detection
is performed in two steps as described in the table below. The DEBUG2 pin is asserted to advertise the
DTS detection and the A_B_SIDE pin indicates the orientation of the connection. The orientation detection is
advertised through the TYPEC_FSM_STATE bits of the I²C register CC_OPERATION_STATUS.
page 15/39
STUSB1602
Accessory mode detection
Table 9. Orientation detection in source power role
#
CC1 pin
CC1 pin
Detection
(CC2 pin)
(CC2 pin)
process
A_B_SIDE pin
CC1/CC2
Orientation
detection state
(CC2/CC1)
TYPEC_FSM_STATE
bits value
HiZ (HiZ)
UnorientedDebugAcc
essory.SRC
HiZ (0)
OrientedDebugAcces
sory.SRC
1st step: debug
1
Rd
Rd
accessory mode
detected
2nd step:
orientation
detected (DTS
2
Rd
≤Ra
presents a
resistance to GND
with a value ≤ Ra
on its CC2 pin)
DS11254 - Rev 5
page 16/39
STUSB1602
Managing USB PD transactions
4
Managing USB PD transactions
Due to specific HW/SW partitioning, the STUSB1602 requires a specific alignment between the lower protocol
stack (managed by the STUSB1602) and the higher protocol stack (managed by the external MCU). Therefore,
dedicated read and write I²C accesses are needed to perform the following actions:
•
Acknowledge a HW reset request
Request a HW reset
•
•
Perform a VCONN SWAP
•
•
•
DS11254 - Rev 5
Perform a data role SWAP
Acknowledge a power role SWAP request
Request a power role SWAP
page 17/39
STUSB1602
I²C interface
5
I²C interface
5.1
Read and write operations
The I²C interface is used to configure, control and read the operation status of the device. It is compatible with the
Philips I²C BUS® (version 2.1). The I²C is a slave serial interface based on two signals:
•
SCL - serial clock line: input clock used to shift data
SDA - serial data line: input/output bidirectional data transfers
•
A filter rejects the potential spikes on the bus data line to preserve data integrity.
The bidirectional data line supports transfers up to 400 Kbit/s (fast mode). The data are shifted to and from the
chip on the SDA line, MSB first.
The first bit must be high (START) followed by the 7-bit device address and the read/write control bit.
Two 7-bit device addresses are available for the STUSB1602 thanks to external programming of DevADDR0
through ADDR0 pin setting, i.e. 0x28 or 0x29. This allows two STUSB1602 devices to be connected on the same
I²C bus.
Table 10. Device address format
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
DevADDR6
DevADDR5
DevADDR4
DevADDR3
DevADDR2
DevADDR1
DevADDR0
R/W
0
1
0
1
0
0
ADDR0
0/1
Table 11. Register address format
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
RegADDR7
RegADDR6
RegADDR5
RegADDR4
RegADDR3
RegADDR2
RegADDR1
RegADDR0
Table 12. Register data format
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
Figure 5. Read operation
Slave
Master
Start
Device addr
7 bits
W A
Reg address
8 bits
Start bit = SDA falling when SCL= 1
Stop bit = SDA rising when SCL= 1
Restart bit = start after a start
Acknowledg e = SDA forced low during a SCL clock
DS11254 - Rev 5
A Restart
Device addr
7 bits
R
A
Reg data
8 bits
A
Reg data
8 bits
Address
n+1
A
Reg data
8 bits
A
Stop
Address
n+2
page 18/39
STUSB1602
Timing specifications
Figure 6. Write operation
Start
W A
Device addr
7 bits
A Reg data
8 bits
Reg address
8 bits
A
A
Reg data
8 bits
A
Stop
Address
n+2
Address
n+1
Start bit = SD A fa lling when S CL = 1
Stop bit = SD A rising when SCL = 1
Restart bit = start after a start
5.2
Reg data
8 bits
Timing specifications
The device uses a standard slave I²C channel at speed up to 400 kHz.
Table 13. I²C timing parameters - VDD = 5 V
Symbol
Min.
Typ.
Max.
Unit
0
-
400
kHz
Hold time (repeated) START condition
0.6
-
-
tlow
LOW period of the SCL clock
1.3
-
-
thigh
HIGH period of the SCL clock
0.6
-
-
tsu,dat
Set-up time for repeated START condition
0.6
-
-
thd,dat
Data hold time
0.04
-
0.9
tsu,dat
Data setup time
100
-
-
Fscl
thd,sta
Parameter
SCL clock frequency
tr
Rise time of both SDA and SCL signals
20 + 0.1 Cb
-
300
tf
Fall time of both SDA and SCL signals
20 + 0.1 Cb
-
300
Set-up time for STOP condition
0.6
-
-
tbuf
Bus free time between a STOP and START condition
1.3
-
-
Cb
Capacitive load for each bus line
-
-
400
tsu,sto
μs
ns
μs
pF
Figure 7. I²C timing diagram
Vih
SDA
tf
Vil
t hd,st a
tr
t su,dat t high
SCL
t low
DS11254 - Rev 5
t hd,dat
t su,st a
page 19/39
STUSB1602
Start-up configuration
6
Start-up configuration
6.1
User-defined parameters
The STUSB1602 has a set of user-defined parameters that can be customized by NVM reprogramming and/or by
software through the I²C interface. This feature allows the customer to change the preset configuration of the USB
Type-C interface and to define a new configuration to meet specific customer requirements addressing various
applications, use cases, or specific implementations.
The NVM re-programming overrides the initial default setting to define a new default setting that is used at
power-up or after a reset. The default value is copied at power-up, or after a reset, from the embedded NVM into
dedicated I²C register bits. The NVM re-programming is possible only once with a customer password.
When a default value is changed during functioning by software, the new setting remains in effect as long as
the STUSB1602 runs or when it is changed again. But after power- off and power-up, or after a reset, the
STUSB1602 takes back the default values defined in the NVM.
6.2
Default start-up configuration
The table below lists the user-defined parameters and indicates the default start-up configuration of the
STUSB1602.
Three types of user-defined parameters are specified in the table with respect to the “Customization type” column:
•
SW: indicates parameters that can be customized only by software through the I²C interface during system
operation
•
NVM: indicates parameters that can be customized only by NVM re-programming
•
NVM/SW: indicates parameters that can be customized by NVM re-programming and/or by software through
the I²C interface during system operation
Table 14. STUSB1602 user-defined parameters and default setting
Parameter
NVM/SW
CC_CONNECTION_STATUS_AL_MASK
1b: interrupt masked
0Ch
NVM/SW
MONITORING_STATUS_AL_MASK
1b: interrupt masked
0Ch
NVM/SW
HW_FAULT_STATUS_AL_MASK
1b: interrupt masked
0Ch
STANDBY_POWER_MODE_DISABLE
1b: disables standby power mode
n.a.
NVM/SW
CC_POWER_MODE
011b: dual power role with accessory
support
28h
NVM/SW
CC_CURRENT_ADVERTISED
01b: 1.5 A
18h
NVM/SW
CC_VCONN_DISCHARGE_EN
0b: VCONN discharge disabled on CC pin
18h
NVM/SW
CC_VCONN_SUPPLY_EN
1b: VCONN supply capability enabled on
CC pin
18h
NVM/SW
CC_VCONN_SWITCH_ILIM
0000b: 350 mA
1Eh
SW
VCONN_MONITORING_EN
1b: enables UVLO threshold detection on
VCONN pin
20h
SW
VCONN_UVLO_THRESHOLD
0b: high UVLO threshold of 4.65 V
20h
NVM/SW
SHIFT_HIGH_VBUS_LIMIT_SOURCE
0101b: in source power role, shifts
nominal high voltage limit by 5% of VBUS
22h
NVM/SW
SHIFT_LOW_VBUS_LIMIT_SOURCE
0101b: in source power role, shifts
nominal low voltage limit by -5% of VBUS
22h
NVM
DS11254 - Rev 5
Default value and description
I²Cregister
address
Customization type
page 20/39
STUSB1602
Default start-up configuration
Customization type
Default value and description
I²Cregister
address
SW_RESET_EN
0b: device reset is performed from
hardware RESET pin
23h
NVM/SW
VBUS_DISCHARGE_TIME_TO_0V
1010b: 840 ms discharge time
25h
NVM/SW
VBUS_DISCHARGE_TIME_TRANSITION 1010b: 200 ms discharge time
25h
SW
VBUS_DISCHARGE_DISABLE
0b: enables VBUS discharge path
n. a.
NVM/SW
CC_POWER_MODE
011b: dual power role with accessory
support
28h
NVM/SW
VDD_OVLO_DISABLE
0b: enables OVLO threshold detection on
VDD pin
2Eh
NVM/SW
VBUS_VALID_RANGE_DISABLE
0b: enables valid VBUS voltagerange
detection
2Eh
NVM/SW
VBUS_VSAFE0V_THRESHOLD
00b: VBUS vSafe0Vthreshold = 0.6 V
2Eh
NVM/SW
VDD_UVLO_DISABLE
1b: disables UVLO threshold detection on
VDD pin
2Eh
NVM
DS11254 - Rev 5
Parameter
page 21/39
STUSB1602
Application
7
Application
The sections below are not part of the ST product specifications. They are intended to give a generic application
overview to be used by the customer as a starting point for further implementation and customization. ST does
not warrant compliancy with customer specifications. Full system implementation and validation are under the
customer’s responsibility.
7.1
General description
7.1.1
Power supplies
The STUSB1602 can be supplied in three different ways depending on the targeted application:
•
Through the VDD pin only for applications powered by VBUS that operate either in source power role
•
•
7.1.2
Through the VSYS pin only for AC powered applications with a system power supply delivering 3.3 V or 5 V
Through the VDD and VSYS pins for applications powered by VBUS with a system power supply delivering
3.3 V or 5 V. When both VDD and VSYS power supplies are present, the low power supply VSYS is selected
when VSYS voltage is above 3.1 V. Otherwise VDD is selected
Connection to MCU or application processor
The I²C interface is used to provide extensive functionality during system operation. For instance:
1.
Define the port configuration during system boot (in case NVM parameters are not customized during
manufacturing)
2.
Change the default configuration at any time during operation
3.
Adjust the port power capability in source power role according to contextual power availability and/or the
power partitioning with other ports
4.
Save system power by shutting down the DC-DC converter according to the attachment detection state
5.
Provide a diagnostic of the Type-C connection and the VBUS power path in real time
DS11254 - Rev 5
page 22/39
STUSB1602
USB Type-C typical applications
7.2
USB Type-C typical applications
7.2.1
Source type application schematic
Figure 8. Typical STUSB1602 implementation in source type application
STL9P3LLH6
VBUS
C2
R1
10K
VI O
1µF
C1
10µF
Application
Processor
MI SO
14
MOSI
11
NSS
12
SCLK
16
TX_EN
15
7
SCL
SDA
8
ALERT#
9
6
RESET
R11
10K
SPC5 Power Architecture
32-bit MCUs
MISO
MOSI
NSS
GND
19
U1
NC
24
VBUS_EN_SRC
R8
R9 R3
10K 10K 10K
VI O
VDD
R6
R7
10K 10K
22
R5
10K
VSYS
R10 R4
10K 10K
GND
20
R2
1K
VBUS_SENSE
SSI
CC1GND
SCLK
CC1
TX_EN
CC2
SCL
SDA
I²C
CC2GND
STUSB1602
AL ERT#
VReg_1V2
RESET
R12
100K
VReg_2V7
18
To GND/VIO
17
ADDR0
13
A_B_SIDE
ADDR0
VCONN
GND
10
CC2
D2
GND
Type C connector
GND
2
4
5
GND
21
C3
1µF
23
C4
1µF
5V
A_B_Side
D1
GND
1
GND
To Super Speed M UX
CC1
ESDA25 L
Management
Unit
STL9P3LLH6
VBUS
3V3
SMM4 F24A
Power
GND
3
EP
0
C5
GND
10µF
GND
Table 15. Default setting for a source type application
I²C register
address
I²C register field name
I²C register reset value/description
Customization type
0Eh
START_UP_POWER_MODE
0b: device starts in normal mode
NVM/SW
18h
CC_CURRENT_ADVERTISED
01b: 1.5 A
NVM/SW
18h
CC_VCONN_DISCHARGE_EN
0b: VCONN discharge disabled on CC pin
NVM/SW
18h
CC_VCONN_SUPPLY_EN
1b: VCONN supply capability enabled on CC pin
NVM/SW
1Eh
CC_VCONN_SWITCH_ILIM
0000b: 350 mA
NVM/SW
20h
VCONN_MONITORING_EN
1b: enables UVLO threshold detection on VCONN pin
SW
20h
VCONN_UVLO_THRESHOLD
0b: high UVLO threshold of 4.65 V
SW
22h
SHIFT_HIGH_VBUS_LIMIT_SOURCE
0101b: in source power role, shifts nominal high voltage
limit by +5% of VBUS
NVM/SW
22h
SHIFT_LOW_VBUS_LIMIT_SOURCE
0101b: in source power role, shifts nominal low voltage
limit by -5% of VBUS
NVM/SW
25h
VBUS_DISCHARGE_TIME_TO_0V
1010b: 840 ms discharge time
NVM/SW
25h
VBUS_DISCHARGE_TIME_TRANSITION 1010b: 200 ms discharge time
NVM/SW
26h
VBUS_DISCHARGE_EN
1b: enables the VBUS discharge path
28h
POWER_MODE
000b: source power role with accessory support
2Eh
VDD_OVLO_DISABLE
0b: enables OVLO threshold detection on VDD pin
SW
2Eh
VBUS_RANGE_DISABLE
0b: enables VBUS voltage range detection
SW
2Eh
VBUS_VSAFE0V_THRESHOLD
00b: VBUS vSafe0V threshold = 0.6 V
SW
DS11254 - Rev 5
NVM/SW
NVM/SW (1)
page 23/39
STUSB1602
USB Type-C typical applications
I²C register
address
2Eh
I²C register field name
VDD_UVLO_DISABLE
I²C register reset value/description
Customization type
1b: disables UVLO threshold detection on VDD pin
SW
1. Italic text indicates this parameter is customized by NVM re-programming.
Table 16. Conditions for VBUS power path assertion in source power role
Pin
Operation conditions
Electrical
value
Type-C attached state
0
Attached.SRC or
UnorientedDebug
Accessory.SRC
or OrientedDebug
Accessory.SRC
VBUS_EN_SRC
HiZ
Anyother state
Comment
VDD pin monitoring
VBUS_SENSEpin
monitoring
VDD < OVLO if VDD
pin is supplied
VBUS within valid voltage
range
The signal is asserted
only if all the valid
operation conditions are
met
VDD > OVLO if VDD
pin is supplied
VBUS is out ofvalid voltage
range
The signal is de-asserted
when at least one non
valid operation condition
is met.
Table 17. Source power role with accessory support
Connection
state
CC1
pin
CC2
pin
Type-C device state
CC_OPERATION_STATUS
register @11h
A_B_SIDE
pin
VCONN
supply
VBUS_EN_SRC
pin
CC_CONNECTION_STATUS
register @0Eh
Nothing attached
Open
Open
Unattached.SRC
HiZ
OFF
HiZ
00h
Rd
Open
HiZ
OFF
0
2Dh
Open
Rd
0
OFF
0
2Dh
Powered cable
withoutsink
attached
Open
Ra
HiZ
OFF
HiZ
00h
Ra
Open
HiZ
OFF
HiZ
00h
Powered cable
with sink
attached or
VCONNpowered
accessory
attached
Rd
Ra
HiZ
CC2
0
2Fh
Ra
Rd
0
CC1
0
2Fh
Debug
accessory mode
attached source
role
Rp
Rp
HiZ
OFF
HiZ
00h
Debug
accessory mode
attached sink
role
Rd
Rd
HiZ
OFF
0
6Dh
Rd
≤Ra
HiZ
OFF
0
6Dh
≤ Ra
Rd
Accessory.SRC
0
OFF
0
6Dh
Ra
Ra
AudioAccessory
HiZ
OFF
HiZ
81h
Sink attached
Debug
accessory mode
attached sink
role
Audio adapter
accessory mode
attached
DS11254 - Rev 5
Attached.SRC
Unattached.SRC
Attached.SRC
Unattached.SRC
UnorientedDebug
Accessory.SRC
OrientedDebug
page 24/39
STUSB1602
USB Type-C typical applications
The value of the CC1 and CC2 pins is defined from a termination perspective and corresponds to the termination
presented by the connected device. The CC_CONNECTION_STATUS register can report other values than the
one presented in Table 17. Source power role with accessory support. In this table, it reflects the state transitions
in Type-C FSM that can be ignored from the application stand point.
DS11254 - Rev 5
page 25/39
STUSB1602
Electrical characteristics
8
Electrical characteristics
8.1
Absolute maximum ratings
All voltages are referenced to GND.
Table 18. Absolute maximum ratings
Symbol
Parameter
VDD
Supply voltage
28
VSYS
Supply voltage on VSYS pin
6
VCC1, VCC2, VCC1DB, VCC2DB
High voltage on CC pins
22
VVBUS_EN_SRC, VVBUS_EN_SNK, VVBUS_SENSE
High voltage on VBUS pins
28
VSCL, VSDA, VALERT#, VRESET, VA_B_SIDE
Operating voltage on I/O pins
VMOSI, VMISO, VNSS, VTX_EN, VSCLK
VCONN
VCONN voltage
TSTG
Storagetemperature
TJ
Maximum junction temperature
ESD
8.2
Value
Unit
V
-0.3 to 6
6
-55 to 150
°C
145
HBM
4
CDM
1.5
kV
Operating conditions
Table 19. Operating conditions
Symbol
Parameter
Value
VDD
Supply voltage
4.1 to 22
VSYS
Supply voltage on VSYS pin
3.0 to 5.5
VCC1, VCC2, VCC1DB, VCC2DB
CC pins
-0.3 to 5.5
VVBUS_EN_SRC, VVBUS_EN_SNK,VVBUS_SENSE
High voltage pins
0 to 22
Operating voltage on I/O pins
0 to 4.5
VCONN
VCONN voltage
2.7 to 5.5
ICONN
VCONN rated current (default = 0.35 A)
0.1 to 0.6
A
TA
Operating temperature
-40 to 105
°C
VSCL, VSDA, VALERT#, VRESET, VA_B_SIDE
VMOSI, VMISO, VNSS, VTX_EN, VSCLK
Note:
DS11254 - Rev 5
Unit
V
The transient voltage on the CC1 and CC2 pins drops to -0.3 during BMC communication.
page 26/39
STUSB1602
Electrical and timing characteristics
8.3
Electrical and timing characteristics
Unless otherwise specified: VDD = 5 V, TA = +25 °C, all voltages are referenced to GND.
Table 20. Electrical characteristics
Symbol
Parameter
Conditions
IDD (SRC)
Current
consumption
Device idle as a SOURCE (not
connected, no communication)
IDD (SNK)
Current
consumption
Device idle as a SINK (not connected,
no communication)
ISTDBY
Standby current
consumption
Device in standby (not connected, low
power)
Min.
Typ.
VSYS @ 3.3 V
158
VDD @ 5.0 V
188
VSYS @ 3.3 V
113
VDD @ 5.0 V
140
VSYS @ 3.3 V
33
VDD @ 5.0 V
53
Max.
Unit
µA
µA
CC1 and CC2 pins
IP-USB
IP-1.5
CC current
sources
IP-3.0
CC pin voltage, VCC = -0.3 to 2.6 V,
40 °C < TA < 105 °C
-20%
80
+20%
-8%
180
+8%
-8%
330
+8%
VCCO
CC open pin
voltage
CC unconnected, VDD = 3.0 to 5.5 V
2.75
Rd
CC pull-down
resistors
40 °C < TA < 105 °C
-10%
VCCDB-1.5
CC pin voltage
in dead battery
µA
V
5.1
External IP = 180 μA applied into CC,
10%
kΩ
1.2
VDD = 0 V, dead-battery function enabled
V
External IP = 330 μA applied into CC,
VCCDB-3.0
condition
RINCC
CC input
impedance
Pull-up and pull-down resistors off
200
VTH0.2
Detection
threshold 1
Max. Ra detection by DFP at IP = IP-USB, min. IP_USB
detection by UFP on Rd, min CC voltage for connected
UFP
0.15
0.20
0.25
V
VTH0.4
Detection
threshold 2
Max. Ra detection by DFP at IP = IP-1.5
0.35
0.40
0.45
V
VTH0.66
Detection
threshold 3
Min. IP_1.5 detection by UFP on Rd
0.61
0.66
0.70
V
VTH0.8
Detection
threshold 4
Max. Ra detection by DFP at IP = IP-3.0
0.75
0.80
0.85
V
VTH1.23
Detection
threshold 5
Min. IP_3.0 detection by UFP on Rd
1.16
1.23
1.31
V
VTH1.6
Detection
threshold 6
Max. Rd detection by DFP at IP = IP-USB and IP = IP-1.5
1.50
1.60
1.65
V
VTH2.6
Detection
threshold 7
Max. Rd detection by DFP at IP-3.0, max. CC voltage for
connected UFP
2.45
2.60
2.75
V
IVCONN = 0.2 A-
0.25
0.50
0.975
Ω
Programmable current limit threshold
85
100
125
(from 100 mA to 600 mA by step of 50 mA)
300
350
400
2.0
VDD = 0 V, dead-battery function enabled
kΩ
VCONN protection
DS11254 - Rev 5
RVCONN
VCONN power
path resistance
IOCP
Overcurrent
protection
mA
page 27/39
STUSB1602
Electrical and timing characteristics
Symbol
Parameter
Conditions
IOCP
Overcurrent
protection
(from 100 mA to 600 mA by step of 50 mA)
VOVP
Output
overvoltage
protection
VUVP
Input
undervoltage
protection
Programmable current limit threshold
Min.
Typ.
Max.
Unit
550
600
650
mA
5.9
6.0
6.1
V
Low UVLO threshold
2.6
2.7
High UVLO threshold (default)
4.6
4.8
V
VBUS monitoring and driving
VTHUSB
VBUS presence
threshold
VBUS safe 0
V threshold
(vSafe0V)
VTH0V
RDISUSB
VSYS = 3.0 to 5.5 V
3.8
3.9
4.0
V
VSYS = 3.0 to 5.5 V
0.5
0.6
0.7
V
Programmable threshold
0.8
0.9
1
V
Programmable threshold from 0.6 V to 1.8 V
1.1
1.2
1.3
V
Default VTHOV = 0.6 V
1.7
1.8
1.9
V
600
700
800
Ω
VBUS discharge
resistor
VBUS discharge
time to 0V
Default TDISPARAM = 840 ms, the coefficient TDISPARAM
is programmable by NVM
70
84
100
VBUS discharge
time to PDO
Default TDISPARAM = 200 ms, the coefficient TDISPARAM
is programmable by NVM
20
24
28
VMONUSBH
VBUS monitoring
high voltage
threshold
VBUS = nominal target value, default VMONUSBH = VBUS
+10 %, the threshold limit is programmable by NVM
from +5 % to +20 %
VBUS +
10%
V
VMONUSBL
VBUS monitoring
low voltage
threshold
VBUS = nominal target value, default VMONUSBL = VBUS
-10 %, the threshold limit is programmable by NVM from
-20 % to -5 %
VBUS 10%
V
VIH
High level input
voltage
VIL
Low level input
voltage
VOL
Low level output
voltage
TDISUSB
(1)
ms
Digital input/output (SCL, SDA, ALERT#, A_B_SIDE, MOSI, MISO, NSS, TX_EN, SCLK)
1.2
Ioh = 3 mA
V
0.35
V
0.4
V
0.4
V
20 V open drain outputs (VBUS_EN_SRC, VBUS_EN_SNK)
VOL
Low level output
voltage
Ioh = 3 mA
1. TDISPARAM
DS11254 - Rev 5
page 28/39
STUSB1602
Package information
9
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
9.1
QFN24 EP 4x4 mm package information
Figure 9. QFN24 EP 4x4 mm package outline
DS11254 - Rev 5
page 29/39
STUSB1602
QFN24 EP 4x4 mm package information
Table 21. QFN24 EP 4x4 mm mechanical data
Ref.
Dimensions (mm)
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
0.80
0.90
1.00
0.031
0.035
0.039
A1
0.00
0.02
0.05
0.000
0.001
0.002
b
0.18
0.25
0.30
0.007
0.010
0.012
D
3.95
4.00
4.05
0.156
0.157
0.159
D2
2.55
2.70
2.80
0.100
0.106
0.110
E
3.95
4.00
4.05
0.156
0.157
0.159
E2
2.55
2.70
2.80
0.100
0.106
0.110
e
0.45
0.50
0.55
0.018
0.020
0.022
K
0.15
L
0.30
0.016
0.020
0.006
0.40
0.50
0.012
Figure 10. QFN24 EP 4x4 mm recommended footprint
DS11254 - Rev 5
page 30/39
STUSB1602
QFN24 EP 4x4 mm packing information
9.2
QFN24 EP 4x4 mm packing information
Figure 11. Reel outline
Table 22. Tape dimensions
9.3
Package
Pitch
Carrier width
Reel
QFN24 EP 4x4
8 mm
12 mm
13"
Thermal Information
Table 23. Thermal information
Symbol
DS11254 - Rev 5
Parameter
Value
Unit
RθJA
Junction-to-ambient thermal resistance
37
°C/W
RθJC
Junction-to-case thermal resistance
5
°C/W
page 31/39
STUSB1602
Terms and abbreviations
10
Terms and abbreviations
Table 24. List of terms and abbreviations
Term
Description
Audio adapter accessory mode. It is defined by the presence of Ra/Ra on the CC1/CC2 pins.
Accessory modes
DS11254 - Rev 5
Debug accessory mode. It is defined by the presence of Rd/Rd on CC1/CC2 pins in source
power role or Rp/Rp on CC1/CC2 pins in sink power role.
DFP
Downstream facing port, specifically associated with the flow of data in a USB connection.
Typically, the ports on a HOST or the ports on a hub to which devices are connected. In its
initial state, DFP sources VBUS and VCONN, and supports data.
DRP
Dual-role port. A port that can operate as either a source or a sink. The port role may be
changed dynamically.
Sink
Port asserting Rd on the CC pins and consuming power from the VBUS; most commonly a
device.
Source
Port asserting Rp on the CC pins and providing power over the VBUS; most commonly a host
or hub DFP.
UFP
Upstream facing port, specifically associated with the flow of data in a USB connection. The
port on a device or a hub that connects to a host or the DFP of a hub. In its initial state, the
UFP sinks the VBUS and supports data.
page 32/39
STUSB1602
Revision history
Table 25. Document revision history
Date
Revision
27-Jan-2017
1
Initial release.
05-Apr-2017
2
Updated Features section and ESD reference in Table 28: Absolute
maximum ratings.
04-Aug-2017
3
Updated Table 1: Device summary.
19-Nov-2020
4
Updated Table 18, Table 21 and Table 24.
5
Updated Section Features, Section Applications, Section 1 Functional
description, Figure 2. STUSB1602 pin connections, Section 6.2 Default
start-up configuration.
19-Jul-2021
Changes
Updated Table 1. Pin functions list , Table 18. Absolute maximum ratings
and Table 19. Operating conditions.
DS11254 - Rev 5
page 33/39
STUSB1602
Contents
Contents
1
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2
Inputs / outputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
3
2.1
Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2
Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3.1
CC1 / CC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3.2
CC1DB/CC2DB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3.3
VCONN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3.4
RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3.5
I²C interface pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3.6
GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3.7
MOSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3.8
NSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3.9
MISO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3.10
TX_EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3.11
SCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3.12
A_B_SIDE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3.13
VBUS_SENSE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3.14
VBUS_EN_SNK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3.15
VBUS_EN_SRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3.16
VREG_1V2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3.17
VSYS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3.18
VREG_2V7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3.19
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
General description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.1
CC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2
BMC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
DS11254 - Rev 5
3.2.1
BMC interface behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2.2
TX mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2.3
RX mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
page 34/39
STUSB1602
Contents
3.3
3.4
VBUS power path control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.3.1
VBUS monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.3.2
VBUS discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3.3
VBUS power path assertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
VCONN supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.4.1
VCONN input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.4.2
VCONN application conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.4.3
VCONN monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.4.4
VCONN discharge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.4.5
VCONN control and status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.4.6
VCONN power switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5
High voltage protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.6
Dead battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.7
Hardware fault management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.8
Accessory mode detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.8.1
Audio accessory mode detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.8.2
Debug accessory mode detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4
Managing USB PD transactions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
5
I²C interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
6
7
5.1
Read and write operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.2
Timing specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Start-up configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
6.1
User-defined parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.2
Default start-up configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
7.1
7.2
General description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.1.1
Power supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.1.2
Connection to MCU or application processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
USB Type-C typical applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.2.1
8
Source type application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
DS11254 - Rev 5
page 35/39
STUSB1602
Contents
9
10
8.1
Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.2
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.3
Electrical and timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
9.1
[Package name] package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
9.2
QFN24 EP 4x4 mm packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
9.3
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Terms and abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
DS11254 - Rev 5
page 36/39
STUSB1602
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Pin functions list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin function descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . .
I²C interface pins list. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
USB data MUX select. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Conditions for VBUS power path assertion in source power role
Conditions for VBUS power path assertion in sink power role .
Fault management conditions . . . . . . . . . . . . . . . . . . . . . . .
Orientation and current capability detection in sink power role .
Orientation detection in source power role. . . . . . . . . . . . . . .
Device address format . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Register address format . . . . . . . . . . . . . . . . . . . . . . . . . . .
Register data format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I²C timing parameters - VDD = 5 V . . . . . . . . . . . . . . . . . . . .
STUSB1602 user-defined parameters and default setting . . . .
Default setting for a source type application. . . . . . . . . . . . . .
Conditions for VBUS power path assertion in source power role
Source power role with accessory support. . . . . . . . . . . . . . .
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . .
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .
QFN24 EP 4x4 mm mechanical data . . . . . . . . . . . . . . . . . .
Tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of terms and abbreviations . . . . . . . . . . . . . . . . . . . . . .
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . .
DS11254 - Rev 5
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page 37/39
STUSB1602
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
DS11254 - Rev 5
Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . .
STUSB1602 pin connections . . . . . . . . . . . . . . . . . . . . . . . .
BMC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VCONN to CC1 and CC2 power switch protections . . . . . . . . . .
Read operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Write operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I²C timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical STUSB1602 implementation in source type application .
QFN24 EP 4x4 mm package outline . . . . . . . . . . . . . . . . . . .
QFN24 EP 4x4 mm recommended footprint . . . . . . . . . . . . . .
Reel outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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. 2
. 3
. 8
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page 38/39
STUSB1602
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service
names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
DS11254 - Rev 5
page 39/39
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