STUSBCD01B
USB charger detection interface
Features
■
Capable of detecting dedicated USB chargers
and host chargers (current sink and dedicated
methods)
■
Operates with VBAT supply voltage ranging
from 2.2 V to 4.5 V
■
Active high open drain hardware detection pin
(DETECT)
■
GPIO control interface
■
1.6 V - 2.8 V interface voltage range (VIO)
■
VBUS voltage 6 V clamping circuit
■
Low DP-DM input capacitance
■
ESD: HBM ± 2 kV, CDM 500 V on every pin
■
12 bumps Flip-Chip package, 1.6 x1.2 mm,
pitch 0.4 mm, max thickness 0.60 mm,
Halogen free RoHS compliant package
Operation is controlled through three general
purpose I/O pins; a hardware open drain
detection output is also available.
An internal regulator provides the 1.8 V supply
voltage for the internal blocks and state machine
while a clamping device prevents VBUS voltage
from going over 6 V (typ.).
Applications
■
Mobile phones
■
PDAs, MP3 players
Flip-Chip 12 (1.6 x 1.2 mm)
The STUSBCD01B is available in a 12 bumps
Flip-Chip 0.4 mm pitch package.
Description
The STUSBCD01B is a USB charger detection IC
which can detect dedicated USB chargers,
Host/Hub chargers or standard host ports
connected to the USB DP/DM data lines.
The device implements two different detection
methods in order to be able to distinguish
between a dedicated charger and a Host/Hub
charger.
Table 1.
Device summary
Order code
Package
Packaging
STUSBCD01BJR
Flip-Chip 12 (1.6 x 1.2 mm)
3000 parts per reel
November 2008
Rev 1
1/19
www.st.com
19
Contents
STUSBCD01B
Contents
1
Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1
Detection methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2
Dedicated charger detection method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.3
Current sink method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.4
Detection triggering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.5
VBUS clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.6
Internal regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Functional tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7
Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/19
STUSBCD01B
1
Application
Figure 1.
Application circuit
Application
3/19
Pin configuration
STUSBCD01B
2
Pin configuration
Figure 2.
Bump configuration (top through view)
Table 2.
Pin description
Bump
name
Symbol
Type
C3
VBAT
PWR
Analog supply voltage input (2.2 V - 4.5 V)
C2
GND
PWR
Ground reference
A3
VIO
PWR
Digital interface supply voltage (1.6 V - 2.8 V)
B4
DP
AI/O
Connected to USB D+ Data line
A4
DM
AI/O
Connected to USB D- Data line
B2
DETECT
O
Hardware detection pin (open drain). 300 kΩ internal pull-down resistor. VBAT
referred.
A2
SHUTDOWN
I
Standby mode selection pin. Active HIGH. Terminates the detection and resets
the device.
A1
/OE
I
Output enable for DETECT output. Active LOW.
B1
STATUS/
METHOD
AI/O
B3
DEFAULT
METHOD
AI
Hardware selection for detection method. Active only if VIO is not present.
Dedicated method is selected if driven low, current sink method if driven high.
VBAT referred. Do not leave floating to avoid increased power consumption.
C4
VBUS
AI
VBUS voltage comparator input. Triggers the charger detection. 6V limited voltage
when 10 V are applied externally.
C1
1V8V
O
Regulator output voltage. Bypass capacitor not required.
4/19
Description
SW detection output: High when Charger detected. Pulled high or low through
internal weak pull-up to 1V8V and weak pull-down.
Detection method selection input: low for dedicated method, high for current sink
method.
STUSBCD01B
3
Functional description
Functional description
The STUSBCD01B is designed to provide USB charger detection functionality to USB
platforms which do not have this feature integrated in the PHY. The device can work with a
supply voltage ranging from 2.2 V to 4.5 V and has an internal regulator which generates the
1.8 V voltage required for the internal blocks and state machine.
The STUSBCD01B can detect a dedicated charger or a Host/Hub charger connected to
USB data lines and provides both an open drain pin and a digital I/O pin for the detection
output signal. The open drain output can be disabled using the /OE input signal.
Two different detection methods, selectable through the STATUS/METHOD pin, are
implemented in order to distinguish between a dedicated charger and a Host/Hub charger. If
the interface voltage is not present the detection method is defined by the status of default
method pin.
The STUSBCD01B features very low power consumption in Standby mode and low input
capacitance on DP/DM pins. An over voltage protection circuit is also implemented on the
VBUS pin in order to limit VBUS voltage to 6 V and provide protection to external devices
connected to it.
3.1
Detection methods
The STUSBCD01B implements a current source/sink method to detect dedicated chargers
(wall chargers) and a current sink method for Host/Hub chargers (based on USB battery
charging spec v1.0). If a standard Host/Hub is connected to the device it is recognized
thanks to its pull-down resistors on DP/DM lines and therefore DETECT/STATUS outputs
will be low.
3.2
Dedicated charger detection method
Selected driving method pin low during the falling edge of shutdown or driving default
method pin low if VIO is not present. The dedicated charger detection method uses a current
source on DP pin and a current sink on DM pin to detect the resistor (max 200 Ω) which
connects DP and DM in dedicated chargers.
3.3
Current sink method
Selected driving method pin high during the falling edge of shutdown or driving default
method pin high if VIO is not present. A voltage source of VDAT_SRC is connected to DP
and a current of IDAT_SINK is drawn from DM.
If a Host/Hub charger is connected, STUSBCD01B will see a voltage of VDAT_SRC on pin
DM. The same happens if a dedicated charger is connected and, therefore, in order to
distinguish between the two, if the current sink method detection is successful it is
necessary to run the dedicated charger detection method immediately after.
5/19
Functional description
3.4
STUSBCD01B
Detection triggering
USB Charger detection automatically starts when VBUS voltage is over VTH_VBUS threshold
and shutdown input is low.
If VBUS drops under VTH_VBUS threshold or shutdown input is pulled high, the charger
detection is immediately terminated.
If no charger is detected (DETECT = 0 and /OE = 0), VBUS voltage is kept over VTH_VBUS
threshold and VIO is not present then a new detection is started every 1 s.
If a charger is detected, detect and status pins are kept high until VBUS drops under
VTH_VBUS threshold or a new detection is started.
Any hardware detection (VIO not present) is terminated as soon as VIO voltage rises above
VTH_IO threshold.
3.5
VBUS clamping
The STUSBCD01B features a built in over voltage protection circuit which prevents VBUS
voltage from going over 6 V. The device is able to withstand continuous voltages of up to
10 V applied to VBUS pin through an external resistor; in this case the clamping circuit limits
the voltage to 6 V within 1 µs. A 470 Ω resistor in series between VBUS voltage and VBUS pin
is required. Any external device needing VBUS over-voltage protection must be connected to
STUSBCD01B's VBUS pin.
Minimum input resistance for VBUS pin in normal operating conditions (up to ~ 5.3 V) is
400 kΩ.
3.6
Internal regulator
The STUSBCD01B has an internal regulator which outputs 1.8 V (nominal) to supply
internal blocks. The regulator does not require any bypass capacitor for stability.
6/19
STUSBCD01B
Figure 3.
Functional description
Functional diagram
7/19
Functional tables
STUSBCD01B
4
Functional tables
Table 3.
Operating mode
SHUTDOWN
/OE
VIO
VBAT
VBUS
STATUSDETECT
X
X
X
Not available
X
X
X
(1)
Operating mode
Power down
Standby (SW control)
H
X
Available
Available
Not available
-
-
Not available
Available
Not available
L
Standby (NO SW control)
L
X
Available
Available
Available
L
Active, SW detection
-
-
Not available
Available
Available
L
Active, HW detection
1. Low when value is not forced by controller.
Table 4.
Output signals
VIO
Shutdown
Detection result
/OE
Status/Method
Detect
Available
L
Charger detected
L
H (pull up active)
Active (driving to VBAT)
Available
L
Charger detected
H
H (pull up active)
L (internally pulled down)
Available
L
Charger not detected
X
L (pull down active)
L (internally pulled down)
Available
H
-
X
Input
L (internally pulled down)
Not available
-
Charger detected
-
Undefined
Active (driving to VBAT)
Not available
-
Charger not detected
-
Undefined
L (internally pulled down)
Table 5.
Note:
8/19
Pin states during detection
Detection method
DP
DM
Dedicated
Outputs IDCH_SRC
Sinks IDAT_SINK
Current sink
Outputs VDAT_SRC
Sinks IDAT_SINK
See timing diagrams for more details.
STUSBCD01B
Maximum ratings
5
Maximum ratings
Table 6.
Absolute maximum ratings (1)
Symbol
Value
Unit
Battery supply voltage
6
V
USB VBUS voltage
6
V
USB VBUS voltage with external 470 Ω resistor
12
V
DP, DM, DETECT,
DEFAULT METHOD
Detection pins
6
V
VX
All other pins
-0.5 to 4.6
V
Storage temperature range
-65 to +150
°C
Electrostatic discharge voltage (according to HBM
JESD22-A114D)
±2
kV
Electrostatic discharge voltage (according to CDM
JESD22-C101C)
200
V
VBAT
VBUS
TSTG
ESD (2)
Parameter
1. Exceeding the absolute maximum rating may damage the device.
2. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5 kΩ in series with 100 pF.
Note:
Absolute maximum ratings are those values above which damage to the device may occur.
Functional operation under these conditions is not implied. All voltages are referenced to
GND.
Table 7.
Recommended operating conditions (1)
Symbol
VBAT
VIO
VBUS
Parameter
Min.
Typ.
Max.
Unit
Analog supply voltage
2.2
4.2
4.5
V
Interface supply voltage
1.5
1.8
2.8
V
5.25
V
VBUS voltage
0
1. The device is not guaranteed to function outside its operating rating.
9/19
Electrical characteristics
STUSBCD01B
6
Electrical characteristics
Table 8.
DC electrical characteristics (power supply and digital I/O pins) (1)
(VBAT = 4.2 V, TA = 25°C, specifications over temperature, -40 to 85 °C)
Symbol
Parameter
1V8V
LDO regulated voltage output
VBAT supply current
IBAT
VIO supply current
IIO
Test conditions
Min.
Typ.
Max.
Unit
VBUS > VTH_VBUS, VBAT = 2.2V to
4.5V
1.76
1.8
1.84
V
VBAT = 2.2 to 4.5V; Standby mode
20
µA
VBAT = 2.2 to 4.5V; Detection
1
mA
STATUS/METHOD=”open”
5
µA
VIO detection threshold voltage
VTH_IO
1
V
VIL
Low level input voltage
(Note 1)
VIO = 1.6 to 2.8V
VIH
High level input voltage
(Note 1)
VIO = 1.6 to 2.8V
VILDM
Low level input voltage
(Note 2)
VIHDM
High level input voltage
(Note 2)
IIL
Low level input leakage
(SHUTDOWN, /OE)
VIO = 1.6 to 2.8V, all inputs at GND
±5
µA
IIH
High level input leakage
(SHUTDOWN, /OE)
VIO = 1.6 to 2.8V, all inputs at VIO
±5
µA
VOL
Low level output voltage
(STATUS)
IOL = +10µA, VIO = 1.8V
0
100
mV
VOH
High level output voltage
(STATUS)
IOH = -10µA, VIO = 1.8V
1.7
1.8
V
CIN
Input capacitance (Note 1)
0.15 VIO
0.85 VIO
V
0.15 VBAT
0.85
VBAT
10/19
V
V
4
1. Characterized specification(s), but not production tested.
Note:
V
1
Specification applies to the following pins: /OE, SHUTDOWN, STATUS/METHOD
2
Specification applies to DEFAULT METHOD pin.
pF
STUSBCD01B
Table 9.
Electrical characteristics
DC electrical characteristics (analog pins)
(VBAT = 4.2 V, TA = 25 °C, specifications over temperature, -40 to 85 °C)
Symbol
Parameter
VBUS
VBUS voltage
IVBUS
VBUS current
Test conditions
Typ.
Max.
Unit
5.25
V
10
µA
5.3
6
V
2
4
V
0
VBUS=0 to 5.25V
VBUS_CLMP VBUS clamping voltage
REXT = 470Ω
VTH_VBUS
VBUS voltage detection threshold
ZIN_VBUS
VBUS input impedance
CIN
Min.
VBUS max 5.25V
400
kΩ
DP, DM input capacitance
(1)
VDAT_SRC
Data source voltage
IDP=IDAT_SRC
VDAT_REF
Data detect voltage
IDAT_SINK
Data sink current
IDCH_SRC
Dedicated charger detection DP
source current
(2)
DP low threshold
ZPD_DET
DETECT pin pull down impedance /OE=1
VOH_DET
DETECT output driving voltage
pF
0.7
V
0.25
0.34
V
50
100
µA
15
30
µA
0.615
VDM=VDAT_SINK (3)
VTHDPL
5
0.65
0.6
240
IOH_DET = 0.5mA,
VBAT = 2.2 to 4.5V
300
VBAT–0.2
V
360
kΩ
VBAT
V
1. Measured at DP pin. Includes effect of internal switches.
2. IDAT_SRC = 0 to 200 µA according to USB specs.
3. VDAT_SINK = 0.15 V to 3.6 V according to USB specs.
Table 10.
AC electrical characteristics (1)
(VBAT = 4.2 V, TA = 25 °C, specifications over temperature, -40 to 85 °C)
Symbol
Parameter
Max.
Unit
5
8
ms
Current sink method
100
170
ms
Current sink method
20
40
ms
DP source off to DETECT high
time
Current sink method
40
70
ms
VDAT_SRC on delay
Current sink method
5
8
ms
TVBUS_DET_CS
VBUS attach to DETECT high time
Current sink method
150
270
ms
TVBUS_DET_DC
VBUS attach to DETECT high time
Dedicated charger method
145
248
ms
Dedicated charger method
140
240
ms
TVBUS_DBNC
VBUS debounce time
TDP_SRC_ON
DP source on time
TCHGR_DET_DBNC Charger detect debounce
TDPSRC_HICRNT
TD_VDAT
(2)
Test conditions
Min.
Typ.
TIDCH_SRC_ON
IDCH_SRC on time
TIDAT_SINK_ON
IDAT_SINK on time
Dedicated charger method
40
70
ms
IDCH_SRC on to IDAT_SINK on delay
Dedicated charger method
100
170
ms
Periodic detection period
Hardware detection, No
charger
1
1.6
s
Minimum pulse width High/Low
All digital inputs
2
TD_IDAT_SINK
TPER_DET
TW_H/L
µs
1. All AC parameters guaranteed by design but not production tested.
2. TIDCH_SRC_ON = TD_IDAT_SINK + TIDAT_SINK_ON
11/19
Timing diagrams
STUSBCD01B
7
Timing diagrams
Figure 4.
Current sink method (with charger connected)
VBUS+
VBUS
VBUS-
TVBUS_DBNC
5ms
TD_VDAT
TDP_SRC_ON
5ms
TVBUS_DBNC
>100ms
VDAT_SRC
0.615-0.7V
IDAT_SINK
50-100µA
Applied to DP
Applied to DM
DM_SRC
Either returned VDAT_SRC if
dedicated charger or applied
VDAT_SRC by HOST charger
TDM_SRC_EN
TDM_SRC_DIS
20ms
TCHGR_DET_DBNC
>40ms
150ms < TVBUS_DET_CS < 270ms
DETECT
12/19
TDPSRC_HICRNT
5ms
STUSBCD01B
Figure 5.
Timing diagrams
Dedicated charger detection method (with charger connected)
VBUS+
VBUS
VBUS-
TVBUS_DBNC
TIDCH_SRC_ON
IDCH_SRC
TVBUS_DBNC
15-30µA
Applied to DP
TD_IDAT_SINK
TIDAT_SINK_ON
50-100µA
IDAT_SINK
Applied to DM
DP
DM
145ms < TVBUS_DET_DC < 248ms
DETECT
13/19
Package mechanical data
8
STUSBCD01B
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
14/19
STUSBCD01B
Package mechanical data
Flip-Chip 12 mechanical data
mm.
mils.
Dim.
Min.
Typ.
Max.
Min.
Typ.
Max.
A
0.52
0.56
0.60
20.5
22.0
23.6
A1
0.17
0.20
0.23
6.7
7.9
9.1
A2
0.35
0.36
0.37
13.8
14.2
14.6
b
0.23
0.26
0.29
9.1
10.2
11.4
D
1.543
1.593
1.643
60.7
62.7
64.7
D1
E
1.20
1.15
1.202
47.2
1.25
45.3
47.3
E1
0.80
31.5
e
0.40
15.7
SE
0.20
7.9
49.2
Bottom view
0.075
Top view
7504892-D
15/19
Package mechanical data
STUSBCD01B
Tape & reel Flip-Chip 12 mechanical data
mm.
inch.
Dim.
Min.
Typ.
A
Min.
Typ.
180
13.2
Max.
7.087
C
12.8
D
20.2
0.795
N
60
2.362
T
16/19
Max.
0.504
0.520
14.4
0.567
Ao
1.43
1.48
1.53
0.056
0.058
0.060
Bo
1.71
1.76
1.81
0.067
0.069
0.071
Ko
0.75
0.80
0.85
0.030
0.031
0.033
Po
3.9
4.1
0.154
0.161
P
3.9
4.1
0.154
0.161
STUSBCD01B
Figure 6.
Package mechanical data
Footprint data (mm.)
17/19
Revision history
STUSBCD01B
9
Revision history
Table 11.
Document revision history
Date
Revision
18-Nov-2008
1
18/19
Changes
Initial release.
STUSBCD01B
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