STW12NK95Z

STW11NK100Z STW12NK95Z N-channel 950V - 0.69Ω - 10A - TO-247 Zener - Protected SuperMESH™ PowerMOSFET General features Type STW12NK95Z ■ ■ ■ VDSS RDS(on) (@Tjmax) 950 V < 0.90Ω ID 10 A PW 230W Gate charge minimized 100% avalanche tested Extremely high dv/dt capability TO-247 Description The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip-based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Internal schematic diagram Applications ■ Switching application Order codes Part number STW12NK95Z Marking W12NK95Z Package TO-247 Packaging Tube August 2006 Rev 2 1/14 www.st.com 14 Contents STW12NK95Z Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Protection features of gate-to-source zener diodes . . . . . . . . . . . . . . . . . . 4 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Electrical characteristics (curves) ............................ 7 3 4 5 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/14 STW12NK95Z Electrical ratings 1 Electrical ratings Table 1. Symbol VDS VDGR VGS ID ID IDM(1) PTOT Absolute maximum ratings Parameter Drain-source voltage (VGS = 0) Drain-gate voltage (RGS = 20KΩ) Gate-source voltage Drain current (continuous) at TC = 25°C Drain current (continuous) at TC=100°C Drain current (pulsed) Total dissipation at TC = 25°C Derating Factor Gate source ESD (HBM-C=100pF, R=1,5KΩ) Peak diode recovery voltage slope Operating junction temperature Storage temperature Value 950 950 ± 30 10 6.3 40 230 1.85 6000 4.5 -55 to 150 Unit V V V A A A W W/°C V V/ns °C VESD (G-S) dv/dt TJ Tstg (2) 1. Pulse width limited by safe operating area 2. ISD ≤10A, di/dt ≤200A/µs, VDD ≤V(BR)DSS, Tj ≤TJMAX Table 2. Symbol Rthj-case Rthj-a Tl Thermal data Parameter Thermal resistance junction-case Max Thermal resistance junction-ambient Max Maximum lead temperature for soldering purpose Value 0.54 50 300 Unit °C/W °C/W °C Table 3. Symbol IAR EAS Avalanche characteristics Parameter Avalanche current, repetitive or not-repetitive (pulse width limited by Tj Max) Single pulse avalanche energy (starting Tj=25°C, Id=Iar, Vdd=50V) Value 10 500 Unit A mJ 3/14 Electrical ratings STW12NK95Z Table 4. Symbol BVGSO Gate-source zener diode Parameter Test conditions Min. 30 Typ. Max. Unit V Gate-source breakdown voltage Igs=± 1mA (Open Drain) 1.1 Protection features of gate-to-source zener diodes The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. 4/14 STW12NK95Z Electrical characteristics 2 Electrical characteristics (TCASE=25°C unless otherwise specified) Table 5. Symbol V(BR)DSS On/off states Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Test conditions ID = 1mA, VGS= 0 VDS = Max rating, VDS = Max rating, Tc = 125°C Min. 950 1 50 ±10 Typ. Max. Unit V µA µA µA V Ω IDSS IGSS VGS(th) RDS(on) Gate body leakage current VGS = ± 20V (VGS = 0) Gate threshold voltage Static drain-source on resistance VDS = VGS, ID = 100µA VGS = 10V, ID = 5 A 3 3.75 0.69 4.5 0.9 Table 6. Symbol gfs (1) Ciss Coss Crss Cosseq(2). Qg Qgs Qgd Dynamic Parameter Test conditions Min. Typ. 12 3500 280 58 117 113 19 60 Max. Unit S pF pF pF pF nC nC nC Forward transconductance VDS =15V, ID = 5A Input capacitance Output capacitance Reverse transfer capacitance Equivalent output capacitance Total gate charge Gate-source charge Gate-drain charge VDS =25V, f=1 MHz, VGS=0 VGS=0, VDS =0V to 760V VDD=760V, ID = 10A VGS =10V (see Figure 15) 152 1. Pulsed: pulse duration=300µs, duty cycle 1.5% 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS Table 7. Symbol td(on) tr td(off) tf Switching times Parameter Turn-on Delay Time Rise Time Test conditions VDD=475V, ID=5A, RG=4.7Ω, VGS=10V (see Figure 14) VDD=475V, ID=5A, RG=4.7Ω, VGS=10V (see Figure 14) Min. Typ. 31 20 Max. Unit ns ns Turn-off Delay Time Fall Time 88 55 ns ns 5/14 Electrical characteristics Table 8. Symbol ISD ISDM(1) VSD (2) STW12NK95Z Source drain diode Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current Reverse recovery time Reverse recovery charge Reverse recovery current ISD=8.3A, VGS=0 ISD=10, di/dt = 100A/µs, VDD=50V, Tj=25°C ISD=10A, di/dt = 100A/µs, VDD=50V, Tj=150°C 728 78 21.6 964 11 23 Test conditions Min Typ. Max 10 40 1.6 Unit A A V ns µC A ns µC A trr Qrr IRRM trr Qrr IRRM 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300µs, duty cycle 1.5% 6/14 STW12NK95Z Electrical characteristics 2.1 Figure 1. Electrical characteristics (curves) Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 7/14 Electrical characteristics Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations STW12NK95Z Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on resistance vs temperature Figure 11. Source-drain diode forward characteristics Figure 12. Normalized BVDSS vs temperature 8/14 STW12NK95Z Figure 13. Maximum avalanche energy vs temperature Electrical characteristics 9/14 Test circuit STW12NK95Z 3 Test circuit Figure 15. Gate charge test circuit Figure 14. Switching times test circuit for resistive load Figure 16. Test circuit for inductive load Figure 17. Unclamped Inductive load test switching and diode recovery times circuit Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform 10/14 STW12NK95Z Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 11/14 Package mechanical data STW12NK95Z TO-247 MECHANICAL DATA mm. MIN. 4.85 2.20 1.0 2.0 3.0 0.40 19.85 15.45 5.45 14.20 3.70 18.50 3.55 4.50 5.50 3.65 5.50 0.140 0.177 0.216 14.80 4.30 0.560 0.14 0.728 0.143 0.216 TYP MAX. 5.15 2.60 1.40 2.40 3.40 0.80 20.15 15.75 MIN. 0.19 0.086 0.039 0.079 0.118 0.015 0.781 0.608 0.214 0.582 0.17 inch TYP. MAX. 0.20 0.102 0.055 0.094 0.134 0.03 0.793 0.620 DIM. A A1 b b1 b2 c D E e L L1 L2 øP øR S 12/14 STW12NK95Z Revision history 5 Revision history Table 9. Date 16-Jan-2006 01-Aug-2006 Revision history Revision 1 2 Initial release. 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