TDA7492MV
50 W mono BTL class-D audio amplifier
Features
50 W continuous output power:
RL = 6 Ω, THD = 10% at VCC = 25 V
40 W continuous output power:
RL = 8 Ω, THD = 10% at VCC = 25 V
Wide range single supply operation (10 - 26 V)
High efficiency (η = 90%)
Four selectable, fixed gain settings of
nominally 21.6 dB, 27.6 dB, 31.1 dB and
33.6 dB
Differential inputs minimize common-mode
noise
Description
Standby and mute features
Short-circuit protection
Thermal-overload protection
The TDA7492MV is a mono BTL class-D audio
amplifier with single power supply designed for
home systems and docking stations.
Externally synchronizable
Table 1.
PowerSSO-36 with
exposed pad down
Thanks to the high efficiency and an
exposed-pad-down (EPD) package no heatsink is
required.
Device summary
Order code
Operating temp. range
Package
Packaging
TDA7492MV
0 to 70 °C
PowerSSO-36 EPD
Tube
TDA7492MV13TR
0 to 70 °C
PowerSSO-36 EPD
Tape and reel
October 2009
Doc ID 16264 Rev 1
1/26
www.st.com
26
Contents
TDA7492MV
Contents
1
Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
2.1
Pin out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2
Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.3
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1
For 6-Ω load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2
For 8-Ω load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.3
Test board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6
Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7
2/26
6.1
Applications circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.2
Mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.3
Gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.4
Input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.5
Internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.5.1
Master mode (internal clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.5.2
Slave mode (external clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.6
Output low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.7
Protection function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.8
Diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Doc ID 16264 Rev 1
TDA7492MV
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin description list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
PowerSSO-36 EPD dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
How to set up SYNCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Doc ID 16264 Rev 1
3/26
List of figures
TDA7492MV
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
4/26
Internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin connection (top view, PCB view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Output power vs supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
THD vs output power (1 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
THD vs output power (100 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
THD vs frequency (100 mW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
THD vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
FFT (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
FFT (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output power vs supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
THD vs output power (1 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
THD vs output power (100 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
THD vs frequency (100 mW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
THD vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
FFT (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
FFT (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Test board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
PowerSSO-36 EPD outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Applications circuit for class-D amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Standby and mute circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Turn-on/off sequence for minimizing speaker “pop” . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Device input circuit and frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Master and slave connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Typical LC filter for a 8-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Typical LC filter for a 4-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Behavior of pin DIAG for various protection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Doc ID 16264 Rev 1
TDA7492MV
1
Device block diagram
Device block diagram
Figure 1 shows the block diagram of the TDA7492MV.
Figure 1.
Internal block diagram
Doc ID 16264 Rev 1
5/26
Pin description
TDA7492MV
2
Pin description
2.1
Pin out
Figure 2.
Pin connection (top view, PCB view)
SUB_GND
1
36
VSS
NC
2
35
SVCC
NC
3
34
VREF
NC
4
33
SGND2
NC
5
32
VDDS2
NC
6
31
GAIN1
NC
7
30
GAIN0
NC
8
29
SVR
9
28
DIAG
OUTN
10
27
SGND
OUTN
11
26
VDDS
PVCC
12
25
SYNCLK
PVCC
13
24
ROSC
23
INN
NC
6/26
EP, exposed pad down
Connect to ground
PGND
14
PGND
15
22
INP
OUTP
16
21
MUTE
OUTP
17
20
STBY
PGND
18
19
VDDPW
Doc ID 16264 Rev 1
TDA7492MV
2.2
Pin description
Pin list
Table 2.
Pin description list
Number
Name
Type
Description
1
SUB_GND
POWER
Connect to the frame
2,3
NC
-
No internal connection
4,5
NC
-
No internal connection
6,7
NC
-
No internal connection
8,9
NC
-
No internal connection
10,11
OUTN
OUT
Negative PWM output
12,13
PVCC
POWER
Power supply for output channel
14,15
PGND
POWER
Power ground for output channel
16,17
OUTP
OUT
Positive PWM output
18
PGND
POWER
Power supply ground
19
VDDPW
OUT
3.3-V (nominal) regulator output referred to ground for power
stage
20
STBY
INPUT
Standby mode control
21
MUTE
INPUT
Mute mode control
22
INP
INPUT
Positive differential input
23
INN
INPUT
Negative differential input
24
ROSC
OUT
Master oscillator frequency-setting pin
25
SYNCLCK
IN/OUT
Clock in/out for external oscillator
26
VDDS
OUT
3.3-V (nominal) regulator output referred to ground for signal
blocks
27
SGND
POWER
Signal ground
28
DIAG
OUT
Open-drain diagnostic output
29
SVR
OUT
Supply voltage rejection
30
GAIN0
INPUT
Gain setting input 1
31
GAIN1
INPUT
Gain setting input 2
32
VDDS2
INPUT
To be connected to VDDS (pin 26)
33
SGND2
INPUT
To be connected to SGND (pin 27)
34
VREF
OUT
Half VDDS (nominal) referred to ground
35
SVCC
POWER
Signal power supply
36
VSS
OUT
3.3-V (nominal) regulator output referred to power supply
-
EP
-
Exposed pad for ground-plane heatsink, to be connected to
ground
Doc ID 16264 Rev 1
7/26
Electrical specifications
TDA7492MV
3
Electrical specifications
3.1
Absolute maximum ratings
Table 3.
Absolute maximum ratings
Symbol
3.2
Value
Unit
VCC
DC supply voltage for pins PVCC, SVCC
30
V
VI
Voltage limits for input pins
STBY, MUTE, INN, INP, GAIN0, GAIN1
-0.3 - 3.6
V
Top
Operating temperature
0 to 70
°C
Tj
Junction temperature
-40 to 150
°C
Tstg
Storage temperature
-40 to 150
°C
Thermal data
Table 4.
3.3
Parameter
Thermal data
Symbol
Parameter
Rth j-case
Thermal resistance, junction to case
Min
-
Typ
2
Max
3
Unit
°C/W
Electrical specifications
Unless otherwise stated, the results in Table 5 below are given for the conditions:
VCC = 25 V, RL (load) = 8 Ω, ROSC = R3 = 39 kΩ, C8 = 100 nF, f = 1 kHz, GV = 21.6 dB and
Tamb = 25 °C.
Table 5.
Symbol
8/26
Electrical specifications
Parameter
Condition
Min
Typ
Max
Unit
VCC
Supply voltage for
pins PVCCA, PVCCB, SVCC
-
10
-
26
V
Iq
Total quiescent current
Without LC
-
26
35
mA
IqSTBY
Quiescent current in standby
-
-
2.5
5.0
µA
Play mode
-100
-
100
VOS
Output offset voltage
Mute mode
-60
-
60
IOCP
Overcurrent protection threshold RL = 0 Ω
4.8
6.0
-
A
Tj
Junction temperature at thermal
shutdown
-
-
150
-
°C
Ri
Input resistance
Differential input
48
60
-
kΩ
VOVP
Overvoltage protection threshold -
28
29
-
V
mV
Doc ID 16264 Rev 1
TDA7492MV
Electrical specifications
Table 5.
Electrical specifications (continued)
Symbol
Parameter
VUVP
Undervoltage protection
threshold
RdsON
Power transistor on resistance
Po
Output power
Po
Condition
Min
Typ
Max
-
-
-
7
High side
-
0.2
-
Low side
-
0.2
-
THD = 10%
-
40
-
THD = 1%
-
32
-
RL = 6 Ω, THD = 10%,
VCC = 25V
-
50
-
RL = 6 Ω, THD = 1%
VCC = 25V
-
40
-
Unit
V
Ω
W
Output power
W
PD
Dissipated power
Po =40W, THD = 10%
-
4.0
-
W
η
Efficiency
Po = 40 W
80
90
-
%
THD
Total harmonic distortion
Po = 1 W
-
0.1
0.4
%
GAIN0 = L, GAIN1 = L
20.6
21.6
22.6
GAIN0 = L, GAIN1 = H
26.6
27.6
28.6
GAIN0 = H, GAIN1 = L
30.1
31.1
32.1
GAIN0 = H, GAIN1 = H
32.6
33.6
34.6
-
-1
-
1
A Curve, GV = 20 dB
-
20
-
f = 22 Hz to 22 kHz
-
25
35
GV
Closed-loop gain
∆GV
Gain matching
eN
Total input noise
dB
dB
µV
SVRR
Supply voltage rejection ratio
fr = 100 Hz, Vr = 0.5 V,
CSVR = 10 µF
40
50
-
dB
Tr, Tf
Rise and fall times
-
-
50
-
ns
fSW
Switching frequency
Internal oscillator
290
310
330
kHz
250
-
400
With external oscillator (2) 250
-
400
2.3
-
-
-
-
0.8
60
80
-
fSWR
Output switching frequency
range
VinH
Digital input high (H)
VinL
Digital input low (L)
AMUTE
Mute attenuation
With internal oscillator
(1)
kHz
VMUTE = 1 V
V
dB
1. fSW = 106 / ((16 * ROSC + 182) * 4) kHz, fSYNCLK = 2 * fSW with R3 = 39 kΩ (see Figure 21.).
2. fSW = fSYNCLK / 2 with the frequency of the external oscillator.
Doc ID 16264 Rev 1
9/26
Characterization curves
4
TDA7492MV
Characterization curves
The following characterization curves were made using the TDA7492MV exposed-pad-down
test board with VCC = 25 V, a signal frequency of 1 kHz and an output power of 1 W unless
otherwise specified.
The LC filter for the 8-Ω load uses components of 33 µH and 220 nF and for the 6-Ω load
22 µH and 220 nF.
4.1
For 6-Ω load
Figure 3.
Output power vs supply voltage
52
48
Output Power (W)
44
THD = 10%
40
36
32
28
THD = 1%
24
20
16
12
15
16
17
18
19
20
21
22
23
24
Supply Voltage (V)
Figure 4.
THD vs output power (1 THD
kHz)vs. Output Power
THD (%)
10
5
2
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
200m
500m
1
2
5
Output Power (W)
10/26
Doc ID 16264 Rev 1
10
20
60
25
TDA7492MV
Figure 5.
Characterization curves
THD vs output powerTHD
(100vs.
Hz)
Output Power
THD (%)
10
5
2
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
200m
500m
1
2
5
10
20
60
Output Power (W)
Figure 6.
THD vs frequency (100 mW)
THD vs. Frequency
THD (%)
0.5
0.4
0.3
0.2
0.1
0.08
0.06
0.05
0.04
0.03
0.02
0.01
20
50
100
200
500
1k
2k
5k
10k
20k
Frequency (Hz)
Figure 7.
THD vs frequency
THD vs. Frequency
THD (%)
0.5
0.4
0.3
0.2
0.1
0.08
0.06
0.05
0.04
0.03
0.02
0.01
20
50
100
200
500
1k
2k
5k
10k
20k
Frequency (Hz)
Doc ID 16264 Rev 1
11/26
Characterization curves
Figure 8.
TDA7492MV
Frequency response
q
y
200
500
p
Ampl (dB)
+2
+1
-0
-1
-2
-3
-4
-5
10
20
50
100
1k
2k
5k
10k
30k
Frequency (Hz)
Figure 9.
FFT (0 dB)
FFT (0 dB)
FFT (dB)
+10
+0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
20
50
100
200
500
1k
2k
5k
10k
20k
Frequency (Hz)
Figure 10. FFT (-60 dB)
FFT ( 60 dB)
FFT (dB)
+0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
20
50
100
200
500
1k
Frequency (Hz)
12/26
Doc ID 16264 Rev 1
2k
5k
10k
20k
TDA7492MV
For 8-Ω load
Figure 11. Output power vs supply voltage
42
38
Out put Power ( W)
4.2
Characterization curves
34
THD = 10%
30
26
THD = 1%
22
18
14
10
15
16
17
18 19 20 21 22
Suppl y Vol t age ( V)
23
24
25
Figure 12. THD vs output power (1 kHz)
THD vs. Output Power
THD (%)
10
5
2
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
100m
200m
500m
1
2
5
10
20
60
Output Power (W)
Doc ID 16264 Rev 1
13/26
Characterization curves
TDA7492MV
Figure 13. THD vs output power (100 Hz)
THD vs. Output Power
THD (%)
10
5
2
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
100m
200m
500m
1
2
5
10
20
60
Output Power (W)
Figure 14. THD vs frequency (100 mW)
THD vs. Frequency
THD (%)
0.5
0.4
0.3
0.2
0.1
0.08
0.06
0.05
0.04
0.03
0.02
0.01
20
50
100
200
500
1k
2k
5k
10k
Frequency (Hz)
Figure 15. THD vs frequency
THD vs. Frequency
THD (%)
0.5
0.4
0.3
0.2
0.1
0.08
0.06
0.05
0.04
0.03
0.02
0.01
20
50
100
200
500
1k
Frequency (Hz)
14/26
Doc ID 16264 Rev 1
2k
5k
10k
20k
20k
TDA7492MV
Characterization curves
Figure 16. Frequency response
Frequency Response
Ampl (dB)
+2
+1
-0
-1
r
-2
-3
-4
-5
10
20
50
100
200
500
1k
2k
5k
10k
30k
Frequency (Hz)
Figure 17. FFT (0 dB)
FFT (0 dB)
FFT (dB)
+10
+0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
20
50
100
200
500
1k
2k
5k
10k
20k
Frequency (Hz)
Figure 18. FFT (-60 dB)
FFT (-60 dB)
FFT (dB)
+0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
20
50
100
200
500
1k
2k
5k
10k
20k
Frequency (Hz)
Doc ID 16264 Rev 1
15/26
Characterization curves
4.3
TDA7492MV
Test board
Figure 19. Test board layout
16/26
Doc ID 16264 Rev 1
TDA7492MV
Package mechanical data
The TDA7492MV comes in a 36-pin PowerSSO package with exposed pad down.
Figure 20 below shows the package outline and Table 6 gives the dimensions.
Figure 20. PowerSSO-36 EPD outline drawing
h x 45°
5
Package mechanical data
Doc ID 16264 Rev 1
17/26
Package mechanical data
Table 6.
TDA7492MV
PowerSSO-36 EPD dimensions
Dimensions in mm
Dimensions in inches
Symbol
Min
Typ
Max
Min
Typ
Max
A
2.15
-
2.47
0.085
-
0.097
A2
2.15
-
2.40
0.085
-
0.094
a1
0.00
-
0.10
0.000
-
0.004
b
0.18
-
0.36
0.007
-
0.014
c
0.23
-
0.32
0.009
-
0.013
D
10.10
-
10.50
0.398
-
0.413
E
7.40
-
7.60
0.291
-
0.299
e
-
0.5
-
-
0.020
-
e3
-
8.5
-
-
0.335
-
F
-
2.3
-
-
0.091
-
G
-
-
0.10
-
-
0.004
H
10.10
-
10.50
0.398
-
0.413
h
-
-
0.40
-
-
0.016
k
0
-
8 degrees
0
-
8 degrees
L
0.60
-
1.00
0.024
-
0.039
M
-
4.30
-
-
0.169
-
N
-
-
10 degrees
-
-
10 degrees
O
-
1.20
-
-
0.047
-
Q
-
0.80
-
-
0.031
-
S
-
2.90
-
-
0.114
-
T
-
3.65
-
-
0.144
-
U
-
1.00
-
-
0.039
-
X
4.10
-
4.70
0.161
-
0.185
Y
6.50
-
7.10
0.256
-
0.280
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
18/26
Doc ID 16264 Rev 1
TDA7492MV
Applications information
6
Applications information
6.1
Applications circuit
Figure 21. Applications circuit for class-D amplifier
TDA7492MV
Doc ID 16264 Rev 1
19/26
Applications information
6.2
TDA7492MV
Mode selection
The three operating modes of the TDA7492MV are set by the two inputs STBY (pin 20) and
MUTE (pin 21).
z
Standby mode: all circuits are turned off, very low current consumption.
z
Mute mode: inputs are connected to ground and the positive and negative PWM
outputs are at 50% duty cycle.
z
Play mode: the amplifiers are active.
The protection functions of the TDA7492MV are realized by pulling down the voltages of the
STBY and MUTE inputs shown in Figure 22. The input current of the corresponding pins
must be limited to 200 µA.
Table 7.
Mode settings
Mode Selection
STBY
MUTE
L (1)
Standby
Mute
H
Play
H
X (don’t care)
(1)
L
H
1. Drive levels defined in Table 5: Electrical specifications on page 8
Figure 22. Standby and mute circuits
Standby
STBY
3.3 V
0V
R2
30 kΩ
C7
2.2 µF
R4
30 kΩ
C15
2.2 µF
Mute
MUTE
3.3 V
0V
TDA7492MV
Figure 23. Turn-on/off sequence for minimizing speaker “pop”
20/26
Doc ID 16264 Rev 1
TDA7492MV
6.3
Applications information
Gain setting
The gain of the TDA7492MV is set by the two inputs, GAIN0 (pin 30) and GAIN1 (pin 31).
Internally, the gain is set by changing the feedback resistors of the amplifier.
Table 8.
Gain settings
GAIN0
6.4
GAIN1
Nominal gain, Gv (dB)
L
L
21.6
L
H
27.6
H
L
31.1
H
H
33.6
Input resistance and capacitance
The input impedance is set by an internal resistor Ri = 60 kΩ (typical). An input capacitor
(Ci) is required to couple the AC input signal.
The equivalent circuit and frequency response of the input components are shown in
Figure 24. For Ci = 470 nF the high-pass filter cut-off frequency is below 20 Hz:
fc = 1 / (2 * π * Ri * Ci)
Figure 24. Device input circuit and frequency response
Rf
Input
signal
Ci
Input
pin
Ri
Doc ID 16264 Rev 1
21/26
Applications information
6.5
TDA7492MV
Internal and external clocks
The clock of the class-D amplifier can be generated internally or can be driven by an
external source.
If two or more class-D amplifiers are used in the same system, it is recommended that all
devices operate at the same clock frequency. This can be implemented by using one
TDA7492MV as master clock, while the other devices are in slave mode (that is, externally
clocked. The clock interconnect is via pin SYNCLK of each device. As explained below,
SYNCLK is an output in master mode and an input in slave mode.
6.5.1
Master mode (internal clock)
Using the internal oscillator, the output switching frequency, fSW, is controlled by the
resistor, ROSC, connected to pin ROSC:
fSW = 106 / ((16 * ROSC + 182) * 4) kHz
where ROSC is in kΩ.
In master mode, pin SYNCLK is used as a clock output pin, whose frequency is:
fSYNCLK = 2 * fSW
For master mode to operate correctly then resistor ROSC must be less than 60 kΩ as given
below in Table 9.
6.5.2
Slave mode (external clock)
In order to accept an external clock input the pin ROSC must be left open, that is, floating.
This forces pin SYNCLK to be internally configured as an input as given in Table 9.
The output switching frequency of the slave devices is:
fSW = fSYNCLK / 2
Table 9.
How to set up SYNCLK
Mode
ROSC
SYNCLK
Master
ROSC < 60 kΩ
Output
Slave
Floating (not connected)
Input
Figure 25. Master and slave connection
Master
Slave
TDA7492xy
ROSC
TDA7492MV
SYNCLK
Output
Cosc
100 nF
22/26
Rosc
39 kΩ
Doc ID 16264 Rev 1
SYNCLK
Input
ROSC
TDA7492MV
6.6
Applications information
Output low-pass filter
To avoid EMI problems, it may be necessary to use a low-pass filter before the speaker. The
cutoff frequency should be larger than 22 kHz and much lower than the output switching
frequency. It is necessary to choose the L-C component values depending on the loud
speaker impedance. Some typical values, which give a cut-off frequency of 27 kHz, are
shown in Figure 26 and Figure 27 below.
Figure 26. Typical LC filter for a 8-Ω speaker
Figure 27. Typical LC filter for a 4-Ω speaker
6.7
Protection function
The TDA7492MV is fully protected against overvoltages, undervoltages, overcurrents and
thermal overloads as explained here.
Overvoltage protection (OVP)
If the supply voltage exceeds the value for VOVP given in Table 5: Electrical specifications on
page 8 the overvoltage protection is activated which forces the outputs to the
high-impedance state. When the supply voltage falls back to within the operating range the
device restarts.
Undervoltage protection (UVP)
If the supply voltage drops below the value for VUVP given in Table 5: Electrical
specifications on page 8 the undervoltage protection is activated which forces the outputs to
Doc ID 16264 Rev 1
23/26
Applications information
TDA7492MV
the high-impedance state. When the supply voltage recovers to within the operating range
the device restarts.
Overcurrent protection (OCP)
If the output current exceeds the value for IOCP given in Table 5: Electrical specifications on
page 8 the overcurrent protection is activated which forces the outputs to the
high-impedance state. Periodically, the device attempts to restart. If the overcurrent
condition is still present then the OCP remains active. The restart time, TOC, is determined
by the R-C components connected to pin STBY.
Thermal protection (OTP)
If the junction temperature, Tj, reaches 145 °C (nominal), the device goes to mute mode and
the positive and negative PWM outputs are forced to 50% duty cycle. If the junction
temperature exceeds the value for Tj given in Table 5: Electrical specifications on page 8 the
device shuts down and the output is forced to the high impedance state. When the device
cools sufficiently the device restarts.
6.8
Diagnostic output
The output pin DIAG is an open drain transistor. When the protection is activated it is in the
high-impedance state. The pin can be connected to a power supply (< 26 V) by a pull-up
resistor whose value is limited by the maximum sinking current (200 µA) of the pin.
Figure 28. Behavior of pin DIAG for various protection conditions
VDD
TDA7492MV
R1
DIAG
Protection logic
VDD
Restart
Restart
Overcurrent
protection
24/26
OV, UV, OT
protection
Doc ID 16264 Rev 1
TDA7492MV
7
Revision history
Revision history
Table 10.
Document revision history
Date
Revision
20-Oct-2009
1
Changes
Initial release.
Doc ID 16264 Rev 1
25/26
TDA7492MV
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2009 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
26/26
Doc ID 16264 Rev 1