TS512AID

TS512, TS512A, TS512B Precision dual operational amplifiers Datasheet - production data Description The TS512x devices are high-performance dual operational amplifiers with frequency and phase compensation built into the chip. The internal phase compensation allows stable operation in voltage follower configurations in spite of its high gain bandwidth product. D SO-8 (plastic micropackage) Pin connections (top view) The circuit presents very stable electrical characteristics over the entire supply voltage range and it is particularly intended for professional and telecom applications (such as active filtering). 9 && 2XWSXW ,QYHUWLQJLQSXW  1RQLQYHUWLQJLQSXW    9 &&   2XWSXW   ,QYHUWLQJLQSXW   1RQLQYHUWLQJLQSXW The TS512B is guaranteed with a higher minimum slew rate (1.072 V/µs) than TS512 and TS512A (0.8 V/µs). Features • Low input offset voltage: 500 µV max. (A version) • Low power consumption • Short-circuit protection • Wide power supply range: – Single supply: 3 to 30 V – Dual supplies: ±1.5 to ±15 V • Low distortion, low noise • High gain bandwidth product: 3 MHz • High channel separation • ESD protection 2 kV • Macromodel included in this specification May 2017 This is information on a product in full production. DocID004948 Rev 8 1/18 www.st.com Contents TS512, TS512A, TS512B Contents 1 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3 2 Schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1 Important notes concerning this macromodel . . . . . . . . . . . . . . . . . . . . . .11 4.2 Macromodel code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2/18 DocID004948 Rev 8 TS512, TS512A, TS512B 1 Absolute maximum ratings and operating conditions Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings Symbol Parameter VCC Supply voltage Vin Input voltage Vid Differential input voltage Rthja Rthjc Tj Tstg ESD Value Unit ±18 V ±VCC ±(VCC - 1) Thermal resistance junction-to-ambient(1) 125 °C/W 40 °C/W +150 °C Storage temperature range -65 to +150 °C HBM: human body model(2) 2 kV 200 V 1.5 kV Thermal resistance junction-to-case (1) Junction temperature MM: machine model(3) CDM: charged device model(4) 1. Short-circuits can cause excessive heating and destructive dissipation. Rth are typical values. 2. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 3. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations while the other pins are floating. 4. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to ground through only one pin. This is done for all pins. Table 2. Operating conditions Symbol Parameter VCC Supply voltage(1) Vicm Common mode input voltage range Toper Operating free air temperature range Value Unit 6 to 30V V VCC-+1.5 to VCC+-1.5 V -40 to +125 °C 1. Value with respect to VCC- pin. DocID004948 Rev 8 3/18 18 Schematic diagram 2 TS512, TS512A, TS512B Schematic diagram Figure 1. Schematic diagram (1/2 TS512) 9&& 5 N 5 5 5 5 5 4 4 4 5 4 4 4 4 5 4 4 4 4 5 4 4 1RQLQYHUWLQJ LQSXW ,QYHUWLQJ LQSXW 2XWSXW 4 5 4 4 4 4 & S) 4 4 4 4 4 5 5 4 5 4 5 4 4 4 4 4 4 & S) 4 5 5 4 5 4 5 9&& 4/18 DocID004948 Rev 8 TS512, TS512A, TS512B 3 Electrical characteristics Electrical characteristics Table 3. VCC = ±15 V, Tamb = 25 °C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit ICC Supply current (per channel) Tmin ≤ Tamb ≤ T max 0.5 0.6 0.75 mA Iib Input bias current Tmin ≤ Tamb ≤ T max 50 150 300 nA Rin Input resistance, f = 1 kHz 1 Vio Input offset voltage TS512 TS512A and TS512B Tmin ≤ Tamb ≤ Tmax TS512 TS512A and TS512B ∆Vio Iio 5 Ios Output short-circuit current Avd Large signal voltage gain RL = 2 kΩ, VCC = ±15 V, Tmin ≤ Tamb ≤ T max VCC = ± 4 V Gain bandwidth product, f = 100 kHz en Total harmonic distortion Av = 20 dB, RL = 2 kΩ Vo = 2 Vpp, f = 1 kHz ±Vopp Output voltage swing RL = 2 kΩ, VCC = ±15 V, Tmin ≤ Tamb ≤ T max VCC = ± 4 V SR Slew rate Unity gain, RL = 2 kΩ, TS512B CMR Common mode rejection ratio CMR = 20 log (∆Vic/∆Vio) (Vic = -10 V to 10 V, Vout = VCC/2, RL > 1 MΩ) DocID004948 Rev 8 µV/°C 20 40 nA nA/°C 23 mA 90 100 95 dB 1.8 3 MHz 8 10 18 nV -----------Hz 0.03 % V ±13 ±3 Large signal voltage swing RL = 10 kΩ, f = 10 kHz Slew rate Unity gain, RL = 2 kΩ , TS512 and TS512A mV 0.08 Equivalent input noise voltage, f = 1 kHz Rs = 50 Ω Rs = 1 kΩ Rs = 10 kΩ THD Vopp 2 Input offset current Tmin ≤ Tamb ≤ Tmax Input offset current drift Tmin ≤ Tamb ≤ Tmax 2.5 0.5 3.5 1.5 Input offset voltage drift Tmin ≤ Tamb ≤ Tmax ∆Iio GBP 0.5 MΩ 28 0.8 Vpp 1.5 V/µs 1.072 90 dB 5/18 18 Electrical characteristics TS512, TS512A, TS512B Table 3. VCC = ±15 V, Tamb = 25 °C (unless otherwise specified) (continued) Symbol SVR Parameter Supply voltage rejection ratio 20 log (∆VCC/∆Vio) (VCC = ±4 V to ±15 V, Vout = Vicm = VCC/2) Vo1/Vo2 Channel separation, f = 1 kHz 6/18 DocID004948 Rev 8 Min. Typ. 90 Max. Unit dB 120 dB TS512, TS512A, TS512B Electrical characteristics Figure 2. Vio distribution at VCC = ±15 V and T = 25 °C Figure 3. Vio distribution at VCC = ±15 V and T = 125 °C   9LR GLVWULEXWLRQDW7 ƒ& 9LRGLVWULEXWLRQDW7 ƒ&   3RSXODWLRQ  3RSXODWLRQ                    ,QSXWRIIVHW YR OWDJH—9 ,QSXWRIIVHW YR OWDJH—9 Figure 4. Input offset voltage vs. input common Figure 5. Input offset voltage vs. input common mode voltage at VCC =10 V mode voltage at VCC = 30 V  7 ƒ& ,QSXWRIIVHWYROWDJHP9  7 ƒ&  7 ƒ&   9&& 9         ,QSXWFRPPRQPRGHYROWDJH9 Figure 6. Supply current (per channel) vs. supply voltage at Vicm = VCC/2 Figure 7. Supply current (per channel) vs. input common mode voltage at VCC = 6 V     6XSSO\ FXUUHQWP$ 6XSSO\ FXUUHQWP$ 7 ƒ& 7 ƒ&  7 ƒ&    7 ƒ&  7 ƒ&   9LFP  9&&   7 ƒ&            6XSSO\YROWDJH9 )ROORZHUFRQILJXUDWLRQ 9&&  9           ,QSXWFRPPRQ PRGHYROWDJH9 DocID004948 Rev 8 7/18 18 Electrical characteristics TS512, TS512A, TS512B Figure 8. Supply current (per channel) vs. input Figure 9. Supply current (per channel) vs. input common mode voltage at VCC = 10 V common mode voltage at VCC = 30 V    7 ƒ&  7 ƒ&  7 ƒ&        7 ƒ&  7 ƒ&   )ROORZHUFRQILJXUDWLRQ 9&&  9  7 ƒ&     )ROORZHUFRQILJXUDWLRQ 9&&  9   Figure 10. Output current vs. supply voltage at Vicm = VCC/2 2XW SXWFXUUHQWP$  6RXUFH 9LG 9 7 ƒ&   9LFP 9&&      7 ƒ&  && 7 ƒ&     6XSSO\ YR OWDJH9 2XWSXWYROWDJH9 Figure 12. Output current vs. output voltage at VCC = 30 V Figure 13. Voltage gain and phase for different capacitive loads at VCC = 6 V, Vicm = 3 V and T = 25 °C   *DLQ  && *DLQ G% 2XWSXWFXUUHQWP$   3KDVH   &/ S)  &/    2XWSXWYROWDJH9 S)    )UHTXHQF\+] DocID004948 Rev 8  9&&  99LFP 9 *  5/ N FRQQHFWHGWRWKHJURXQG 7DPE ƒ&    &/ S)   8/18  7 ƒ& 6LQN 9LG 9   7 ƒ& 7 ƒ&   Figure 11. Output current vs. output voltage at VCC = 5 V 2XWSXWFXUUHQWP$   ,QSXWFRPPRQPRGHYROWDJH9 ,QSXWFRPPRQPRGHYROWDJH9     3KDVHƒ    6XSSO\ FXUUHQWP$ 6XSSO\ FXUUHQWP$  TS512, TS512A, TS512B Electrical characteristics  *DLQG %  3KDVH &/  &/  S) S) &/             S)     *DLQ            )UHTXHQF\+] Figure 17. Frequency response for different capacitive loads at VCC = 10 V, Vicm = 5 V and T = 25 °C   *DLQZLWK&/ S) *DLQZLWK&/ S)  *DLQZLWK&/ S) *DLQG% *DLQG%  N  9&& 9 9LFP 9*  5/ N FRQQHFWHGWRWKHJURXQG 7 DPE ƒ&    &/ S)    S) &/ S)    &/   Figure 16. Frequency response for different capacitive loads at VCC = 6 V, Vicm = 3 V and T = 25 °C   3KDVH )UHTXHQF\+]     9&& 9 9LFP 9*  5/  FRQQHFWHGWRWKHJURXQG 7 DPE ƒ&   *DLQG % *DLQ   3KDV Hƒ  Figure 15. Voltage gain and phase for different capacitive loads at VCC = 30 V, Vicm = 15 V and T = 25 °C 3KDV Hƒ Figure 14. Voltage gain and phase for different capacitive loads at VCC = 10 V, Vicm = 5 V and T = 25 °C *DLQZLWK&/ S)  9FF 9 9LFP 9 5/  FRQQHFWHGWRWKHJURXQG 7DPE  ƒ& N 0 *DLQZLWK&/ S)   0  N )UHTXHQF\ +] *DLQZLWK&/ S) 9&&  9 9LFP  9 5/ N FRQQHFWHGWRWKHJURXQG 7DPE ƒ& N 0 0 )UHTXHQF\ +] Figure 18. Frequency response for different capacitive loads at VCC = 30 V, Vicm = 15 V and T = 25 °C Figure 19. Phase margin vs. output current, at VCC = 6 V, Vicm = 3 V and T = 25 °C   *DLQZLWK& S) / *DLQG%      N *DLQZLWK&/ S) *DLQZLWK& S) / 9&&  9 9LFP 9 5/  FRQQHFWHGWRWKHJURXQG 7DPE ƒ& N 0 0 )UHTXHQF\ +] DocID004948 Rev 8 9/18 18 Electrical characteristics TS512, TS512A, TS512B Figure 20. Phase margin vs. output current, at VCC = 10 V, Vicm = 5 V and T = 25 °C 10/18 Figure 21. Phase margin vs. output current, at VCC = 30 V, Vicm = 15 V and T = 25 °C DocID004948 Rev 8 TS512, TS512A, TS512B Macromodel 4 Macromodel 4.1 Important notes concerning this macromodel • All models are a trade-off between accuracy and complexity (i.e. simulation time). • Macromodels are not a substitute to breadboarding; rather, they confirm the validity of a design approach and help to select surrounding component values. • A macromodel emulates the nominal performance of a typical device within specified operating conditions (temperature, supply voltage, for example). Thus the macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the main parameters of the product. Data derived from macromodels used outside of the specified conditions (VCC, temperature, for example) or even worse, outside of the device operating conditions (VCC, Vicm, for example), is not reliable in any way. 4.2 Macromodel code ** Standard Linear Ics Macromodels, 1993. ** CONNECTIONS : * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY .SUBCKT TS512 1 3 2 4 5 ******************************************************** .MODEL MDTH D IS=1E-8 KF=6.565195E-17 CJO=10F * INPUT STAGE CIP 2 5 1.000000E-12 CIN 1 5 1.000000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 2.600000E+01 RIN 15 16 2.600000E+01 RIS 11 15 1.061852E+02 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 0 VOFN 13 14 DC 0 IPOL 13 5 1.000000E-05 CPS 11 15 12.47E-10 DINN 17 13 MDTH 400E-12 VIN 17 5 1.500000e+00 DINR 15 18 MDTH 400E-12 DocID004948 Rev 8 11/18 18 Macromodel TS512, TS512A, TS512B VIP 4 18 1.500000E+00 FCP 4 5 VOFP 3.400000E+01 FCN 5 4 VOFN 3.400000E+01 FIBP 2 5 VOFN 1.000000E-02 FIBN 5 1 VOFP 1.000000E-02 * AMPLIFYING STAGE FIP 5 19 VOFP 9.000000E+02 FIN 5 19 VOFN 9.000000E+02 RG1 19 5 1.727221E+06 RG2 19 4 1.727221E+06 CC 19 5 6.000000E-09 DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 6.521739E+03 VIPM 28 4 1.500000E+02 HONM 21 27 VOUT 6.521739E+03 VINM 5 27 1.500000E+02 GCOMP 5 4 4 5 6.485084E-04 RPM1 5 80 1E+06 RPM2 4 80 1E+06 GAVPH 5 82 19 80 2.59E-03 RAVPHGH 82 4 771 RAVPHGB 82 5 771 RAVPHDH 82 83 1000 RAVPHDB 82 84 1000 CAVPHH 4 83 0.331E-09 CAVPHB 5 84 0.331E-09 EOUT 26 23 82 5 1 VOUT 23 5 0 ROUT 26 3 6.498455E+01 COUT 3 5 1.000000E-12 DOP 19 25 MDTH 400E-12 VOP 4 25 1.742230E+00 DON 24 19 MDTH 400E-12 VON 24 5 1.742230E+00 .ENDS 12/18 DocID004948 Rev 8 TS512, TS512A, TS512B Macromodel Table 4. VCC = ±15 V, Tamb = 25 °C (unless otherwise specified) Symbol Conditions Vio Value Unit 0 mV Avd RL = 2 kΩ 100 V/mV ICC No load, per channel 350 µA -13.4 to 14 V Vicm VOH RL = 2 kΩ +14 V VOL RL = 2 kΩ -14 V Isink Vo = 0 V 27.5 mA Isource Vo = 0 V 27.5 mA GBP RL = 2 kΩ, CL = 100 pF 2.5 MHz SR RL = 2 kΩ 1.4 V/µs ∅m RL = 2 kΩ, CL = 100 pF 55 Degrees DocID004948 Rev 8 13/18 18 Package information 5 TS512, TS512A, TS512B Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 14/18 DocID004948 Rev 8 TS512, TS512A, TS512B Package information Figure 22. SO-8 package outline Table 5. SO-8 package mechanical data Dimensions Symbol Millimeters Min. Typ. A Inches Max. Min. Typ. 1.75 0.069 A1 0.10 A2 1.25 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.010 D 4.80 4.90 5.00 0.189 0.193 0.197 E 5.80 6.00 6.20 0.228 0.236 0.244 E1 3.80 3.90 4.00 0.150 0.154 0.157 e 0.25 Max. 0.004 0.010 0.049 1.27 0.050 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 L1 k ccc 1.04 0 0.040 8° 0.10 DocID004948 Rev 8 1° 8° 0.004 15/18 18 Ordering information 6 TS512, TS512A, TS512B Ordering information Table 6. Order codes Order code Temperature range Package Packaging TS512IDT Marking 512I SO-8 TS512AIDT 512AI TS512IYDT(1) TS512AIYDT (1) -40 °C, + 125 °C Tape and reel SO-8 (automotive grade) TS512BIYDT(1) 512IY 512AIY 512BIY 1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 and Q002 or equivalent. 16/18 DocID004948 Rev 8 TS512, TS512A, TS512B 7 Revision history Revision history Table 7. Document revision history Date Revision 21-Nov-2001 1 Initial release. 23-Jun-2005 2 PPAP references inserted in the datasheet, see Table 6: Order codes. 3 AC and DC performance characteristics curves added for VCC= 6V, VCC= 10V and VCC= 30V. Modified ICC typ, added parameters over temperature range in electrical characteristics table. Corrected macromodel information. 04-Feb-2010 4 Updated document format. Added TS512A and related parameters. Modified footnote 1 under Table 2. Removed Figure 11. Modified Figure 12 and Figure 13. Removed TS512AIYD order code from Table 6. 12-Sep-2012 5 Updated CMR and SVR test conditions inTable 3. Removed TS512IYD order code from Table 6. Minor corrections throughout document. 20-Mar-2014 6 Removed DIP8 package option Removed shipping option in tubes from Table 6: Order codes Updated footnote 1 of Table 6: Order codes Minor textual updates 17-Apr-2017 7 Updated title, Features, Description and Table 6: Order codes to add the TS512B device and related parameters. 15-May-2017 8 Updated title, added reference to TS512B device in Table 3 Vio parameter description. 05-May-2008 Changes DocID004948 Rev 8 17/18 18 TS512, TS512A, TS512B IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved 18/18 DocID004948 Rev 8