TS924IYPT

TS924, TS924A Rail-to-rail output current quad operational amplifier Datasheet - production data • ESD internal protection: 3 kV • Latch-up immunity • Macromodel included in this specification D SO14 (plastic micropackage) Related products • See the TS921 device for the single version and the TS922 device for the dual version • See the TSX56x series for smaller packages Applications P TSSOP14 (thin shrink small outline package) • Headphone amplifiers • Piezoelectric speaker drivers • Sound cards • MPEG boards, multimedia systems Pin connections (top view) • Line drivers, buffers 14 Output 4 Output 1 1 Inverting input 1 2 - - 13 Inverting input 4 Non-inverting input 1 3 + + 12 Non-inverting input 4 VCC + 4 Non-inverting input 2 5 Inverting input 2 6 • Cordless telephones and portable communication equipment • Instrumentation with low noise as key factor 11 VCC + + 10 Non-inverting input 3 - - 9 Inverting input 3 8 Output 3 Output 2 7 Features • Rail-to-rail input and output • Low noise: 9 nV/√Hz • Low distortion • High output current: 80 mA (able to drive 32 Ω loads) • High-speed: 4 MHz, 1.3 V/µs Description The TS924 and TS924A devices are rail-to-rail quad BiCMOS operational amplifiers optimized and fully specified for 3 V and 5 V operation. High output current allows low load impedances to be driven. The TS924 and TS924A devices exhibit a very low noise, low distortion, low offset, and high output current capability, making these devices an excellent choice for high-quality, low-voltage, and battery-operated audio systems. The devices are stable for capacitive loads up to 500 pF. • Operating range from 2.7 V to 12 V • Low input offset voltage: 900 µV max. (TS924A) June 2014 This is information on a product in full production. DocID5065 Rev 11 1/18 www.st.com Contents TS924, TS924A Contents 1 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 3.1 Important note concerning this macromodel . . . . . . . . . . . . . . . . . . . . . . 10 3.2 Electrical characteristics from macromodelization . . . . . . . . . . . . . . . . . . 10 3.3 Macromodel code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.1 SO14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.2 TSSOP14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2/18 DocID5065 Rev 11 TS924, TS924A 1 Absolute maximum ratings and operating conditions Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings Symbol VCC Vid Parameter Supply voltage(1) Differential input voltage Tstg Storage temperature VCC- -0.3 to VCC+ +0.3 -65 to +150 °C Maximum junction temperature 150 Thermal resistance junction-to-ambient(4) SO14 TSSOP14 66 100 °C/W 3 kV 100 V CDM: charged device model SO14 TSSOP14 1.5 1 kV Output short-circuit duration See footnote(8) HBM: human body model(5) MM: machine model(6) ESD V ±1 (3) Input voltage Rthja Unit 14 (2) Vin Tj Value (7) Latch-up immunity 200 Soldering temperature (10 sec.), leaded version 250 Soldering temperature (10 sec.), unleaded version 260 mA °C 1. All voltage values, except the differential voltage, are with respect to network ground terminal. 2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal. If Vid > ±1 V, the maximum input current must not exceed ±1 mA. In this case (Vid > ±1 V), an input series resistor must be added to limit input current. 3. Do not exceed 14 V. 4. Short-circuits can cause excessive heating and destructive dissipation. Rth are typical values. 5. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations while the other pins are floating. 7. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to ground through only one pin. This is done for all pins. 8. There is no short-circuit protection inside the device: short-circuits from the output to VCC can cause excessive heating. The maximum output current is approximately 80 mA, independent of the magnitude of VCC. Destructive dissipation can result from simultaneous short-circuits on all amplifiers. Table 2. Operating conditions Symbol Parameter VCC Supply voltage Vicm Common mode input voltage range Toper Operating free air temperature range Value 2.7 to 12 DocID5065 Rev 11 VCC- -0.2 to VCC+ +0.2 -40 to +125 Unit V °C 3/18 18 Electrical characteristics 2 TS924, TS924A Electrical characteristics Table 3. Electrical characteristics at VCC+ = +3 V with VCC- = 0 V, Vicm = VCC+/2, Tamb = 25 °C, and RL connected to VCC+/2 (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit DC performance Vio Input offset voltage TS924 TS924A Tmin ≤ Tamb ≤ Tmax TS924 TS924A 3 0.9 5 1.8 Input offset voltage drift 2 Iio Input offset current - Tmin ≤ Tamb ≤ Tmax 1 30 Iib Input bias current - Tmin ≤ Tamb ≤ Tmax 15 100 DVio CMR Vicm from 0 to 3 V Tmin ≤ Tamb ≤ Tmax 60 56 80 SVR Supply voltage rejection ratio - VCC+ = 2.7 to 3.3 V Tmin ≤ Tamb ≤ Tmax 60 60 85 Avd Large signal voltage gain (Vout = 2 Vpk-pk) RL= 10 kΩ, Tmin ≤ Tamb ≤ Tmax RL = 600 Ω, Tmin ≤ Tamb ≤ Tmax RL = 32 Ω 70 15 200 35 16 VOH High level output voltage RL= 10 kΩ, Tmin ≤ Tamb ≤ Tmax RL = 600 Ω, Tmin ≤ Tamb ≤ Tmax RL = 32 Ω VOL Io ICC mV µV/°C nA dB V/mV 2.90 2.87 V 2.63 Low level output voltage RL= 10 kΩ, Tmin ≤ Tamb ≤ Tmax RL = 600 Ω, Tmin ≤ Tamb ≤ Tmax RL = 32 Ω 50 100 mV 1.5 1.6 mA 180 Output short-circuit current 50 Supply current /operator - no load, Vout = VCC+/2 Tmin ≤ Tamb ≤ Tmax 80 1 AC performance Gain bandwidth product - RL = 600 Ω 4 MHz φm Phase margin at unit gain - RL = 600 Ω, CL =100 pF 68 Degrees Gm Gain margin - RL = 600 Ω, CL =100 pF 12 dB SR Slew rate 1.3 V/µs en Equivalent input noise voltage - f = 1 kHz 9 nV -----------Hz GBP 4/18 0.7 DocID5065 Rev 11 TS924, TS924A Electrical characteristics Table 3. Electrical characteristics at VCC+ = +3 V with VCC- = 0 V, Vicm = VCC+/2, Tamb = 25 °C, and RL connected to VCC+/2 (unless otherwise specified) (continued) Symbol THD Cs Parameter Total harmonic distortion Vout = 2 Vpk-pk, F = 1 kHz, Av = 1, RL = 600 Ω Channel separation DocID5065 Rev 11 Min. Typ. Max. Unit 0.005 % 120 dB 5/18 18 Electrical characteristics TS924, TS924A Table 4. VCC+ = +5 V, VCC- = 0 V, Vicm = VCC/2, Tamb = 25 °C, RL connected to VCC/2 (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit DC performance Vio Input offset voltage TS924 TS924A Tmin ≤ Tamb ≤ Tmax TS924 TS924A 3 0.9 5 1.8 Input offset voltage drift 2 Iio Input offset current - Tmin ≤ Tamb ≤ Tmax 1 30 Iib Input bias current - Tmin ≤ Tamb ≤ Tmax 15 100 DVio CMR Vicm from 0 to 5 V Tmin ≤ Tamb ≤ Tmax 60 56 80 SVR Supply voltage rejection ratio - VCC+ = 3 V to 5 V Tmin ≤ Tamb ≤ Tmax 60 60 85 Avd Large signal voltage gain (Vout = 2Vpk-pk) RL= 10 kΩ, Tmin ≤ Tamb ≤ Tmax RL = 600 Ω, Tmin ≤ Tamb ≤ Tmax RL = 32 Ω 70 20 200 40 17 VOH High level output voltage RL= 10 kΩ, Tmin ≤ Tamb ≤ Tmax RL = 600 Ω, Tmin ≤ Tamb ≤ Tmax RL = 32 Ω VOL Io ICC mV µV/°C nA dB V/mV 4.90 4.85 V 4.4 Low level output voltage RL= 10 kΩ, Tmin ≤ Tamb ≤ Tmax RL = 600 Ω, Tmin ≤ Tamb ≤ Tmax RL = 32 Ω 50 120 mV 1.5 1.6 mA 300 Output short-circuit current 50 Supply current / operator - no load, Vout = VCC+/2 Tmin ≤ Tamb ≤ Tmax 80 1 AC performance Gain bandwidth product - RL = 600 Ω 4 MHz φm Phase margin at unit gain - RL = 600 Ω, CL =100 pF 68 Degrees Gm Gain margin -RL = 600 Ω, CL =100 pF 12 dB SR Slew rate 1.3 V/µs en Equivalent input noise voltage - f = 1 kHz 9 nV -----------Hz 0.005 % 120 dB GBP THD Cs 6/18 0.7 Total harmonic distortion Vout = 2 Vpk-pk, F = 1 kHz, Av = 1, RL = 600 Ω Channel separation DocID5065 Rev 11 TS924, TS924A Electrical characteristics Figure 1. Output short-circuit current vs. output voltage (VCC = 0/12 V) Figure 2. Output short-circuit current vs. output voltage (VCC = 0/3 V) Figure 3. Voltage gain and phase vs. frequency (CL = 500 pF, VCC = ±1.5 V) Figure 4. Output short-circuit current vs. output voltage (VCC = 0/5 V) Phase d CL = 500 pF VCC = ±1.5 V Gain Figure 5. Voltage gain and phase vs. frequency Figure 6. THD + noise vs. frequency (RL = 2 kΩ, (RL = 10 kΩ, CL = 100 pF, VCC = ±1.5 V) VO = 10 Vpp, VCC = ±6 V, Av = -1) RL =10 kΩ CL = 100 pF VCC = ±1.5 V RL = 2 kΩ, VO = 10 Vpp VCC = ±6 V, Av = -1 Phase Gain DocID5065 Rev 11 7/18 18 Electrical characteristics TS924, TS924A Figure 7. THD + noise vs. frequency (RL = 2 kΩ, Figure 8. THD + noise vs. frequency (RL = 32 Ω, VO = 10 Vpp, VCC = ±6 V, Av = 1) VO = 2 Vpp, VCC = ±1.5 V, Av = 10) RL = 32 Ω, VO = 2 Vpp VCC = ±1.5 V, Av = 10 RL = 2 kΩ, VO = 10 Vpp VCC = ±6 V, Av = 1 Figure 9. THD + noise vs. Vout (RL = 32 Ω, f = 1 kHz, VCC = ±1.5 V, Av = -1) Figure 10. THD + noise vs. frequency (RL = 32 Ω, VO = 4 Vpp, VCC = ±2.5 V, Av = 1) RL = 32 Ω, VO = 4 Vpp VCC = ±2.5 V, Av = 1 RL = 32 Ω, f = 1 kHz VCC = ±1.5 V, Av = -1 Figure 11. THD + noise vs. Vout (RL = 600 Ω, f = 1 kHz, VCC = ±1.5 V , Av = -1) Figure 12. THD + noise vs. Vout (RL = 2 kΩ, f = 1 kHz, VCC = ±1.5 V, Av = -1) RL = 2 kΩ, f = 1 kHz VCC = ±1.5 V, Av = -1 8/18 DocID5065 Rev 11 TS924, TS924A Electrical characteristics Figure 13. PSRR for TS924/TS924A at VCC = 5 V, Vicm = 2.5 V, T = 25 °C, RI = 100 kΩ, and CI = 100pF ϭϮϬ ϭϬϬ ϴϬ W^ZZ;ĚͿ ϲϬ sZ'WŽƐ sZ'EĞŐ ϰϬ ϮϬ Ϭ ͲϮϬ ϭϬ ϭϬϬ ϭϬϬϬ ϭϬϬϬϬ ϭϬϬϬϬϬ ϭϬϬϬϬϬϬ ϭϬϬϬϬϬϬϬ &ƌĞƋƵĞŶĐLJ;ŚnjͿ DocID5065 Rev 11 9/18 18 Macromodel TS924, TS924A 3 Macromodel 3.1 Important note concerning this macromodel Note the following remarks before using this macromodel: • All models are a trade-off between accuracy and complexity (that is, simulation time). • Macromodels are not a substitute to breadboarding; rather, they confirm the validity of a design approach and help to select surrounding component values. • A macromodel emulates the nominal performance of a typical device within specified operating conditions (for example, temperature, supply voltage). Thus, the macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the main parameters of the product. Data derived from macromodels used outside of the specified conditions (such as VCC and temperature) or worse, outside of the device operating conditions (such as VCC and Vicm), are not reliable in any way. Section 3.2 presents the electrical characteristics resulting from the use of these macromodels. 3.2 Electrical characteristics from macromodelization Table 5. Macromodel simulation at VCC+ = 3 V, VCC- = 0 V, RL, CL connected to VCC/2, and Tamb = 25 °C (unless otherwise specified) Symbol Conditions Vio Unit 0 mV Avd RL = 10 kΩ 200 V/mV ICC No load, per operator 1.2 mA -0.2 to 3.2 Vicm 10/18 Value V VOH RL = 10 kΩ 2.95 VOL RL = 10 kΩ 25 Isink VO = 3 V 80 Isource VO = 0 V 80 GBP RL = 600 kΩ 4 MHz SR RL = 10 kΩ, CL = 100 pF 1 V/µs φm RL = 600 kΩ 68 Degrees DocID5065 Rev 11 mV mA TS924, TS924A 3.3 Macromodel Macromodel code ** Standard Linear Ics Macromodels, 1996. ** CONNECTIONS: * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY .SUBCKT TS92X 1 2 3 4 5 * .MODEL MDTH D IS=1E-8 KF=2.664234E-16 CJO=10F * * INPUT STAGE CIP 2 5 1.000000E-12 CIN 1 5 1.000000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 8.125000E+00 RIN 15 16 8.125000E+00 RIS 11 15 2.238465E+02 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 153.5u VOFN 13 14 DC 0 IPOL 13 5 3.200000E-05 CPS 11 15 1e-9 DINN 17 13 MDTH 400E-12 VIN 17 5 -0.100000e+00 DINR 15 18 MDTH 400E-12 VIP 4 18 0.400000E+00 FCP 4 5 VOFP 1.865000E+02 FCN 5 4 VOFN 1.865000E+02 FIBP 2 5 VOFP 6.250000E-03 FIBN 5 1 VOFN 6.250000E-03 * GM1 STAGE *************** FGM1P 119 5 VOFP 1.1 FGM1N 119 5 VOFN 1.1 RAP 119 4 2.6E+06 RAN 119 5 2.6E+06 * GM2 STAGE *************** G2P 19 5 119 5 1.92E-02 G2N 19 5 119 4 1.92E-02 R2P 19 4 1E+07 DocID5065 Rev 11 11/18 18 Macromodel TS924, TS924A R2N 19 5 1E+07 ************************** VINT1 500 0 5 GCONVP 500 501 119 4 19.38 VP 501 0 0 GCONVN 500 502 119 5 19.38 VN 502 0 0 ********* orientation isink isource ******* VINT2 503 0 5 FCOPY 503 504 VOUT 1 DCOPYP 504 505 MDTH 400E-9 VCOPYP 505 0 0 DCOPYN 506 504 MDTH 400E-9 VCOPYN 0 506 0 *************************** F2PP 19 5 poly(2) VCOPYP VP 0 0 0 0 0.5 F2PN 19 5 poly(2) VCOPYP VN 0 0 0 0 0.5 F2NP 19 5 poly(2) VCOPYN VP 0 0 0 0 1.75 F2NN 19 5 poly(2) VCOPYN VN 0 0 0 0 1.75 * COMPENSATION ************ CC 19 119 25p * OUTPUT *********** DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 6.250000E+02 VIPM 28 4 5.000000E+01 HONM 21 27 VOUT 6.250000E+02 VINM 5 27 5.000000E+01 VOUT 3 23 0 ROUT 23 19 6 COUT 3 5 1.300000E-10 DOP 19 25 MDTH 400E-12 VOP 4 25 1.052 DON 24 19 MDTH 400E-12 VON 24 5 1.052 .ENDS ;TS92X 12/18 DocID5065 Rev 11 TS924, TS924A 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DocID5065 Rev 11 13/18 18 Package information 4.1 TS924, TS924A SO14 package information Figure 14. SO14 package outline Table 6. SO14 package mechanical data Dimensions Symbol Millimeters Min. Typ. Inches Max. Min. Max. A 1.35 1.75 0.05 0.068 A1 0.10 0.25 0.004 0.009 A2 1.10 1.65 0.04 0.06 B 0.33 0.51 0.01 0.02 C 0.19 0.25 0.007 0.009 D 8.55 8.75 0.33 0.34 E 3.80 4.0 0.15 0.15 e 1.27 0.05 H 5.80 6.20 0.22 0.24 h 0.25 0.50 0.009 0.02 L 0.40 1.27 0.015 0.05 k ddd 14/18 Typ. 8° (max.) 0.10 DocID5065 Rev 11 0.004 TS924, TS924A 4.2 Package information TSSOP14 package information Figure 15. TSSOP14 package outline Table 7. TSSOP14 package mechanical data Dimensions Symbol Millimeters Min. Typ. A Inches Max. Min. Typ. 1.20 A1 0.05 A2 0.80 b Max. 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.90 5.00 5.10 0.193 0.197 0.201 E 6.20 6.40 6.60 0.244 0.252 0.260 E1 4.30 4.40 4.50 0.169 0.173 0.176 e L 0.65 0.45 L1 k aaa 1.00 0.60 0.0256 0.75 0.018 1.00 0° 0.024 0.030 0.039 8° 0.10 DocID5065 Rev 11 0° 8° 0.004 15/18 18 Ordering information 5 TS924, TS924A Ordering information Table 8. Order codes Order code Temperature range TS924ID TS924IDT TS924AID TS924AIDT TS924IYDT(1) TS924AIYDT (1) TS924IPT -40 °C, 125 °C Package Packaging SO14 Tube or tape and reel TS924AIPT (1) TS924IYPT TS924AIYPT(1) TSSOP14 (automotive grade) 924I 924AI 924IY SO14 (automotive grade) TSSOP14 Marking 924AIY 924I Tape and reel 924AI 924IY 924AIY 1. Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 and Q 002 or equivalent. 16/18 DocID5065 Rev 11 TS924, TS924A 6 Revision history Revision history Table 9. Document revision history Date Revision 28-May-2001 1 First release. 12-May-2005 2 Modifications on AMR Table on page 3 (explanation of Vid and Vin limits, ESD MM and CDM values added, Rthja added). 31-Jul-2005 3 PPAP references inserted in the datasheet, see order codes table. 30-Nov-2005 4 Package mechanical data modified. TS924IYPT/TS924AYIPT PPAP reference inserted in order code table. Macromodel modified. 11-Mar-2008 5 Added footnotes for automotive grade order codes in Table 8: Order codes. Updated document format. 6 ESD tolerance improved for machine model in Table 1: Absolute maximum ratings. Removed TS914AIN order code and corrected footnotes in Table 8: Order codes. 08-Oct-2009 7 Added part number TS924A on cover page. Added limits on full temperature range in Table 3 and Table 4. Removed order codes TS924IYD and TS924AIYD from Table 8. 15-Apr-2011 8 Modified CMR parameter values in Table 3 and Table 4. 19-May-2011 9 Added A version in title and header. 04-Dec-2012 10 Added DIP14 package to Figure on page 1. Added Related products to Features. Added DIP14 with value for Rthja in Table 1. Added conditions to titles of Figure 1 to Figure 12. Replaced VCC by VCC+ and VDD by VCC- in title of Table 5. Qualified status of TS924IYPT and TS924AIYPT order codes in Table 8. Minor corrections throughout document. 05-Jun-2014 11 Removed DIP14 package and order code pertaining to it Added Figure 13 19-Dec-2008 Changes DocID5065 Rev 11 17/18 18 TS924, TS924A Please Read Carefully: Information in this document is provided solely in connection with ST products. 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