TSX56x, TSX56xA
Micropower, wide bandwidth (900 kHz), 16 V CMOS operational
amplifiers
Datasheet - production data
Easy interfacing with high impedance
sensors
SOT23- 5 ( single)
DFN8 2x2 ( dual)
Related topics
See TSX63x series for reduced power
consumption (45 mA, 200 kHz)
See TSX92x series for higher gain
bandwidth products (10 MHz)
Applications
MiniSO8 ( dual)
Industrial and automotive signal conditioning
Active filtering
Medical instrumentation
High impedance sensors
Description
QFN16 3x3 ( quad)
TSSOP14 ( quad)
Features
Low power consumption: 235 µA typ. at 5 V
Supply voltage: 3 V to 16 V
Gain bandwidth product: 900 kHz typ.
Low offset voltage
“A” version: 600 µV max.
Standard version: 1 mV max.
Low input bias current: 1 pA typ.
High tolerance to ESD: 4 kV
Wide temperature range: -40 to 125 °C
Automotive qualification
Tiny packages available: SOT23-5,
DFN8 2 mm x 2 mm, MiniSO8,
QFN16 3 mm x 3 mm, and TSSOP14
The TSX56x, TSX56xA series of operational
amplifiers benefit from STMicroelectronics® 16 V
CMOS technology to offer state-of-the-art
accuracy and performance in the smallest
industrial packages. The TSX56x, TSX56xA have
pinouts compatible with industrial standards and
offer an outstanding speed/power consumption
ratio, 900 kHz gain bandwidth product while
consuming only 250 µA at 16 V. Such features
make the TSX56x, TSX56xA ideal for sensor
interfaces and industrial signal conditioning. The
wide temperature range and high ESD tolerance
ease use in harsh automotive applications.
Table 1: Device summary
Version
Standard VIO
Enhanced VIO
Single
TSX561
TSX561A
Dual
TSX562
TSX562A
Quad
TSX564
TSX564A
Benefits
Power savings in power-conscious
applications
February 2017
DocID023274 Rev 5
This is information on a product in full production.
1/28
www.st.com
Contents
TSX56x, TSX56xA
Contents
1
Pinout information........................................................................... 3
2
Absolute maximum ratings and operating conditions ................. 4
3
4
Electrical characteristics ................................................................ 6
Electrical characteristic curves .................................................... 12
5
Application information ................................................................ 16
6
5.1
Operating voltages .......................................................................... 16
5.2
Rail-to-rail input ............................................................................... 16
5.3
Input offset voltage drift over temperature ....................................... 16
5.4
Long term input offset voltage drift .................................................. 17
5.5
PCB layouts .................................................................................... 18
5.6
Macromodel .................................................................................... 18
Package information ..................................................................... 19
6.1
SOT23-5 package information ........................................................ 20
6.2
DFN8 2x2 package information ....................................................... 21
6.3
MiniSO8 package information ......................................................... 22
6.4
QFN16 3x3 package information..................................................... 23
6.5
TSSOP14 package information ....................................................... 25
7
Ordering information..................................................................... 26
8
Revision history ............................................................................ 27
2/28
DocID023274 Rev 5
TSX56x, TSX56xA
1
Pinout information
Pinout information
Figure 1: Pin connections for each package (top view)
Single
SOT23-5 ( TSX561)
Dual
DFN8 2x2 ( TSX562)
MiniSO8 ( TSX562)
Quad
QFN16 3x3 (TSX564)
DocID023274 Rev 5
TSSOP14 ( TSX564)
3/28
Absolute maximum ratings and operating
conditions
2
TSX56x, TSX56xA
Absolute maximum ratings and operating conditions
Table 2: Absolute maximum ratings (AMR)
Symbol
Parameter
VCC
Supply voltage (1)
Vid
Differential input voltage (2)
Vin
Iin
Tstg
Value
Unit
18
±VCC
Input voltage
(3)
(VCC-) - 0.2 to (VCC+) + 0.2
Input current
(4)
10
Storage temperature
V
mA
-65 to 150
°C
Tj
Maximum junction temperature
150
SOT23-5
250
DFN8 2x2
120
MiniSO8
190
QFN16 3x3
80
TSSOP14
100
DFN8 2x2
33
QFN16 3x3
30
Thermal resistance
junction-to-ambient (5) (6)
Rthja
Thermal resistance
junction-to-case
Rthjc
HBM: human body model
(7)
4
MM: machine model for TSX561
ESD
(8)
MM: machine model for TSX562 and TSX564
CDM: charged device model
°C/W
kV
200
(8)
(9)
Latch-up immunity
V
100
1.5
kV
200
mA
Notes:
(1)All
voltage values, except the differential voltage are with respect to the network ground terminal.
(2)The
(3)V
cc
differential voltage is the non-inverting input terminal with respect to the inverting input terminal.
- Vin must not exceed 18 V, Vin must not exceed 18 V
(4)Input
(5)R
th
current must be limited by a resistor in series with the inputs.
are typical values.
(6)Short-circuits
can cause excessive heating and destructive dissipation.
(7)Human
body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all
couples of pin combinations with other pins floating.
(8)Machine
model: a 200 pF cap is charged to the specified voltage, then discharged directly between two pins of
the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin combinations with
other pins floating.
(9)Charged
device model: all pins plus package are charged together to the specified voltage and then discharged
directly to ground.
4/28
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TSX56x, TSX56xA
Absolute maximum ratings and operating
conditions
Table 3: Operating conditions
Symbol
Parameter
VCC
Supply voltage
Vicm
Common-mode input voltage range
Toper
Operating free-air temperature range
Value
3 to 16
DocID023274 Rev 5
(VCC-) - 0.1 to (VCC+) + 0.1
-40 to 125
Unit
V
°C
5/28
Electrical characteristics
3
TSX56x, TSX56xA
Electrical characteristics
Table 4: Electrical characteristics at VCC+ = 3.3 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 ° C, and
RL = 10 kΩ connected to VCC/2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
DC performance
Vio
Offset voltage
TSX56xA, T = 25 °C
600
TSX56xA, -40 °C < T < 125 °C
1800
TSX56x, T = 25 °C
1
TSX56x, -40 °C < T < 125 °C
2.2
ΔVio/ΔT
Input offset voltage drift
-40 °C < T < 125 °C (1)
2
12
Iib
Input bias current,
Vout = VCC/2
T = 25 °C
1
100 (2)
-40 °C < T < 125 °C
1
200 (2)
Iio
Input offset current,
Vout = VCC/2
T = 25 °C
1
100 (2)
-40 °C < T < 125 °C
1
200 (2)
CMR1
Common mode rejection
ratio, CMR = 20 log
(ΔVic/ΔVio), Vic = -0.1 V to
VCC - 1.5 V, Vout = VCC/2,
RL > 1 MΩ
CMR2
Common mode rejection
ratio, CMR = 20 log
(ΔVic/ΔVio), Vic = -0.1 V to
VCC + 0.1 V, Vout = VCC/2,
RL > 1 MΩ
Avd
Large signal voltage gain,
Vout = 0.5 V to (VCC - 0.5 V),
RL > 1 MΩ
VOH
High-level output voltage,
VOH = VCC - Vout
VOL
Low-level output voltage
Isink, Vout = VCC
Iout
Isource, Vout = 0 V
ICC
Supply current, per
channel, Vout = VCC/2,
RL > 1 MΩ
T = 25 °C
63
-40 °C < T < 125 °C
59
T = 25 °C
47
μV
mV
µV/°C
pA
80
66
dB
-40 °C < T < 125 °C
45
T = 25 °C
85
-40 °C < T < 125 °C
83
T = 25 °C
70
-40 °C < T < 125 °C
100
T = 25 °C
70
-40 °C < T < 125 °C
mV
100
T = 25 °C
4.3
-40 °C < T < 125 °C
2.5
T = 25 °C
3.3
-40 °C < T < 125 °C
2.5
T = 25 °C
5.3
mA
4.3
220
-40 °C < T < 125 °C
300
350
μA
AC performance
GBP
Gain bandwidth product
Fu
Unity gain frequency
ɸm
Phase margin
Gm
Gain margin
6/28
600
RL = 10 kΩ, CL = 100 pF
DocID023274 Rev 5
800
690
kHz
55
Degrees
9
dB
TSX56x, TSX56xA
Electrical characteristics
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
SR
Slew rate
RL = 10 kΩ, CL = 100 pF,
Vout = 0.5 V to VCC - 0.5 V
1
en
Equivalent input noise
voltage density
f = 1 kHz
55
f = 10 kHz
29
∫en
Low-frequency peak-topeak input noise
Bandwidth, f = 0.1 to 10 Hz
16
µVpp
THD+N
Total harmonic distortion +
noise
Follower configuration, fin = 1 kHz,
RL = 100 kΩ, Vicm = (VCC -1.5 V)/2,
BW = 22 kHz, Vout = 1 Vpp
0.004
%
V/μs
nV/√Hz
Notes:
(1)See
Section 5.3: "Input offset voltage drift over temperature"
(2)Guaranteed
by design
DocID023274 Rev 5
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Electrical characteristics
TSX56x, TSX56xA
Table 5: Electrical characteristics at VCC+ = 5 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 ° C, and
RL = 10 kΩ connected to VCC/2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
DC performance
Vio
Offset voltage
TSX56xA, T = 25 °C
600
TSX56xA, -40 °C < T < 125 °C
1800
TSX56x, T = 25 °C
1
TSX56x, -40 °C < T < 125 °C
2.2
ΔVio/ΔT
Input offset voltage drift
-40 °C < T < 125 °C (1)
2
ΔVio
Long-term input offset
voltage drift
T = 25 °C (2)
5
Iib
Input bias current,
Vout = VCC/2
T = 25 °C
1
100 (3)
-40 °C < T < 125 °C
1
200 (3)
Iio
Input offset current,
Vout = VCC/2
T = 25 °C
1
100 (3)
-40 °C < T < 125 °C
1
200 (3)
CMR1
Common mode rejection
ratio, CMR = 20 log
(ΔVic/ΔVio), Vic = -0.1 V to
VCC - 1.5 V, Vout = VCC/2,
RL > 1 MΩ
CMR2
Common mode rejection
ratio, CMR = 20 log
(ΔVic/ΔVio), Vic = -0.1 V to
VCC + 0.1 V, Vout = VCC/2,
RL > 1 MΩ
Avd
Large signal voltage gain,
Vout = 0.5 V to (VCC - 0.5 V),
RL > 1 MΩ
VOH
High-level output voltage,
VOH = VCC - Vout
VOL
Low-level output voltage
Isink
Iout
Isource
ICC
Supply current, per
channel, Vout = VCC/2,
RL > 1 MΩ
T = 25 °C
66
-40 °C < T < 125 °C
63
T = 25 °C
50
12
μV
mV
µV/°C
nV/
√month
pA
84
69
dB
-40 °C < T < 125 °C
47
T = 25 °C
85
-40 °C < T < 125 °C
83
RL = 10 kΩ, T = 25 °C
70
RL = 10 kΩ, -40 °C < T < 125 °C
100
RL = 10 kΩ, T = 25 °C
70
RL = 10 kΩ, -40 °C < T < 125 °C
100
Vout = VCC, T = 25 °C
11
Vout = VCC, -40 °C < T < 125 °C
8
Vout = 0 V, T = 25 °C
9
Vout = 0 V, -40 °C < T < 125 °C
7
T = 25 °C
mV
14
mA
12
235
-40 °C < T < 125 °C
350
400
μA
AC performance
GBP
Gain bandwidth product
Fu
Unity gain frequency
ɸm
Phase margin
Gm
Gain margin
8/28
700
RL = 10 kΩ, CL = 100 pF
DocID023274 Rev 5
850
730
kHz
55
Degrees
9
dB
TSX56x, TSX56xA
Electrical characteristics
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
SR
Slew rate
RL = 10 kΩ, CL = 100 pF,
Vout = 0.5 V to VCC - 0.5 V
1.1
en
Equivalent input noise
voltage density
f = 1 kHz
55
f = 10 kHz
29
∫en
Low-frequency peak-topeak input noise
Bandwidth, f = 0.1 to 10 Hz
15
µVpp
THD+N
Total harmonic distortion +
noise
Follower configuration, fin = 1 kHz,
RL = 100 kΩ, Vicm = (VCC -1.5 V)/2,
BW = 22 kHz, Vout = 2 Vpp
0.002
%
V/μs
nV/√Hz
Notes:
(1)See
Section 5.3: "Input offset voltage drift over temperature"
(2)Typical
value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration.
(3)Guaranteed
by design
DocID023274 Rev 5
9/28
Electrical characteristics
TSX56x, TSX56xA
Table 6: Electrical characteristics at VCC+ = 16 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 ° C, and
RL = 10 kΩ connected to VCC/2 (unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
DC performance
Vio
Offset voltage
TSX56xA, T = 25 °C
600
TSX56xA, -40 °C < T < 125 °C
1800
TSX56x, T = 25 °C
1
TSX56x, -40 °C < T < 125 °C
2.2
ΔVio/ΔT
Input offset voltage drift
-40 °C < T < 125 °C (1)
2
ΔVio
Long-term input offset
voltage drift
T = 25 °C (2)
1.6
Iib
Input bias current,
Vout = VCC/2
T = 25 °C
1
100 (3)
-40 °C < T < 125 °C
1
200 (3)
Iio
Input offset current,
Vout = VCC/2
T = 25 °C
1
100 (3)
-40 °C < T < 125 °C
1
200 (3)
CMR1
Common mode rejection
ratio, CMR = 20 log
(ΔVic/ΔVio), Vic = -0.1 V to
VCC - 1.5 V, Vout = VCC/2,
RL > 1 MΩ
CMR2
Common mode rejection
ratio, CMR = 20 log
(ΔVic/ΔVio), Vic = -0.1 V to
VCC + 0.1 V, Vout = VCC/2,
RL > 1 MΩ
SVR
Common mode rejection
ratio, 20 log (ΔVCC/ΔVio),
VCC = 3 V to 16 V,
Vout = Vicm = VCC/2
Avd
Large signal voltage gain,
Vout = 0.5 V to (VCC - 0.5 V),
RL > 1 MΩ
VOH
High-level output voltage,
VOH = VCC - Vout
VOL
Low-level output voltage
Isink
Iout
Isource
ICC
10/28
Supply current, per
channel, Vout = VCC/2,
RL > 1 MΩ
T = 25 °C
76
-40 °C < T < 125 °C
72
T = 25 °C
60
-40 °C < T < 125 °C
56
T = 25 °C
76
-40 °C < T < 125 °C
72
T = 25 °C
85
-40 °C < T < 125 °C
83
12
dB
90
100
RL = 10 kΩ, T = 25 °C
70
RL = 10 kΩ, -40 °C < T < 125 °C
100
35
Vout = 0 V, T = 25 °C
30
Vout = 0 V, -40 °C < T < 125 °C
25
T = 25 °C
-40 °C < T < 125 °C
DocID023274 Rev 5
pA
78
RL = 10 kΩ, -40 °C < T < 125 °C
Vout = VCC, -40 °C < T < 125 °C
µV/°C
95
70
40
mV
nV/
√month
RL = 10 kΩ, T = 25 °C
Vout = VCC, T = 25 °C
μV
mV
92
mA
90
250
360
400
μA
TSX56x, TSX56xA
Symbol
Parameter
Electrical characteristics
Conditions
Min.
Typ.
750
900
Max.
Unit
AC performance
GBP
Gain bandwidth product
Fu
Unity gain frequency
ɸm
Phase margin
Gm
Gain margin
RL = 10 kΩ, CL = 100 pF
kHz
750
55
Degrees
9
dB
RL = 10 kΩ, CL = 100 pF,
Vout = 0.5 V to VCC - 0.5 V
1.1
V/μs
f = 1 kHz
48
f = 10 kHz
27
SR
Slew rate
en
Equivalent input noise
voltage density
∫en
Low-frequency peak-topeak input noise
Bandwidth, f = 0.1 to 10 Hz
15
µVpp
THD+N
Total harmonic distortion +
noise
Follower configuration, fin = 1 kHz,
RL = 100 kΩ, Vicm = (VCC -1.5 V)/2,
BW = 22 kHz, Vout = 5 Vpp
0.000
5
%
nV/√Hz
Notes:
(1)See
Section 5.3: "Input offset voltage drift over temperature"
(2)Typical
value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration.
(3)Guaranteed
by design
DocID023274 Rev 5
11/28
Electrical characteristic curves
4
TSX56x, TSX56xA
Electrical characteristic curves
Figure 2: Supply current vs. supply voltage at
Vicm = VCC/2
Figure 3: Input offset voltage distribution at
VCC = 16 V and Vicm = 8 V
Figure 4: Input offset voltage temperature coefficient
distribution at VCC = 16 V, Vicm = 8 V
Figure 5: Input offset voltage vs. input common-mode
voltage at VCC = 12 V
Figure 6: Input offset voltage vs. temperature at VCC = 16 V
2500
2000
Limit for TSX56xA
Limit for TSX56x
1500
1000
500
0
-500
-1000
-1500
VCC= 16V, Vicm = 8V
-2000
-2500
-40
12/28
-20
0
20
40
60
DocID023274 Rev 5
80
100
120
TSX56x, TSX56xA
Electrical characteristic curves
Figure 7: Output current vs. output voltage at
VCC = 3.3 V
Figure 8: Output current vs. output voltage at VCC = 5 V
Figure 9: Output current vs. output voltage at
VCC = 16 V
Figure 10: Bode diagram at VCC = 3.3 V
Figure 11: Bode diagram at VCC = 5 V
Figure 12: Bode diagram at VCC = 16 V
DocID023274 Rev 5
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Electrical characteristic curves
TSX56x, TSX56xA
Figure 13: Phase margin vs. capacitive load at
VCC = 12 V
Figure 14: GBP vs. input common-mode voltage at
VCC = 12 V
Figure 15: Avd vs. input common-mode voltage at
VCC = 12 V
Figure 16: Slew rate vs. supply voltage
Figure 17: Noise vs. frequency at VCC = 3.3 V
Figure 18: Noise vs. frequency at VCC = 5 V
14/28
DocID023274 Rev 5
TSX56x, TSX56xA
Electrical characteristic curves
Figure 19: Noise vs. frequency at VCC = 16 V
Figure 20: Distortion and noise vs. output voltage
amplitude
Figure 21: Distortion and noise vs. amplitude at
Vicm = VCC/2 and VCC = 12 V
Figure 22: Distortion and noise vs. frequency
DocID023274 Rev 5
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Application information
TSX56x, TSX56xA
5
Application information
5.1
Operating voltages
The amplifiers of the TSX56x and TSX56xA series can operate from 3 V to 16 V. Their
parameters are fully specified at 3.3 V, 5 V, and 16 V power supplies. However, the
parameters are very stable in the full VCC range. Additionally, the main specifications are
guaranteed in extended temperature ranges from -40 to 125 ° C.
5.2
Rail-to-rail input
The TSX56x and TSX56xA devices are built with two complementary PMOS and NMOS
input differential pairs. The devices have a rail-to-rail input, and the input common mode
range is extended from (VCC-) - 0.1 V to (VCC+) + 0.1 V.
However, the performance of these devices is clearly optimized for the PMOS differential
pairs (which means from (VCC-) - 0.1 V to (VCC+) - 1.5 V).
Beyond (VCC+) - 1.5 V, the operational amplifiers are still functional but with degraded
performance, as can be observed in the electrical characteristics section of this datasheet
(mainly Vio and GBP). These performances are suitable for a number of applications that
need to be rail-to-rail.
The devices are designed to prevent phase reversal.
5.3
Input offset voltage drift over temperature
The maximum input voltage drift over the temperature variation is defined as the offset
variation related to the offset value measured at 25 °C. The operational amplifier is one of
the main circuits of the signal conditioning chain, and the amplifier input offset is a major
contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated
during production at application level. The maximum input voltage drift over temperature
enables the system designer to anticipate the effects of temperature variations.
The maximum input voltage drift over temperature is computed using Equation 1.
Equation 1
∆Vio
V T – Vio 25 °C
= max io
∆T
T – 25 °C
Where T = -40 °C and 125 °C.
The datasheet maximum value is guaranteed by measurements on a representative
sample size ensuring a Cpk (process capability index) greater than 2.
16/28
DocID023274 Rev 5
TSX56x, TSX56xA
5.4
Application information
Long term input offset voltage drift
To evaluate product reliability, two types of stress acceleration are used:
Voltage acceleration, by changing the applied voltage
Temperature acceleration, by changing the die temperature (below the maximum
junction temperature allowed by the technology) with the ambient temperature.
The voltage acceleration has been defined based on JEDEC results, and is defined using
Equation 2.
Equation 2
AFV = e
β . V S – VU
Where:
AFV is the voltage acceleration factor
β is the voltage acceleration constant in 1/V, constant technology parameter (β = 1)
VS is the stress voltage used for the accelerated test
VU is the voltage used for the application
The temperature acceleration is driven by the Arrhenius model, and is defined in
Equation 3.
Equation 3
AFT = e
Ea
1
1
------ .
–
k
TU TS
Where:
AFT is the temperature acceleration factor
Ea is the activation energy of the technology based on the failure rate
k is the Boltzmann constant (8.6173 x 10-5 eV.K-1)
TU is the temperature of the die when VU is used (K)
TS is the temperature of the die under temperature stress (K)
The final acceleration factor, AF, is the multiplication of the voltage acceleration factor and
the temperature acceleration factor (Equation 4).
Equation 4
AF = AFT × AFV
AF is calculated using the temperature and voltage defined in the mission profile of the
product. The AF value can then be used in Equation 5 to calculate the number of months of
use equivalent to 1000 hours of reliable stress duration.
Equation 5
Months = AF × 1000 h × 12 months / 24 h × 365.25 days
DocID023274 Rev 5
17/28
Application information
TSX56x, TSX56xA
To evaluate the op amp reliability, a follower stress condition is used where V CC is defined
as a function of the maximum operating voltage and the absolute maximum rating (as
recommended by JEDEC rules).
The Vio drift (in µV) of the product after 1000 h of stress is tracked with parameters at
different measurement conditions (see Equation 6).
Equation 6
VCC = maxVop with Vicm = VCC 2
The long term drift parameter (ΔVio), estimating the reliability performance of the product, is
obtained using the ratio of the Vio (input offset voltage value) drift over the square root of
the calculated number of months (Equation 7).
Equation 7
∆Vio =
Vio dr ift
month s
Where Vio drift is the measured drift value in the specified test conditions after 1000 h
stress duration.
5.5
PCB layouts
For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible
to the power supply pins.
5.6
Macromodel
Accurate macromodels of the TSX56x, TSX56xA devices are available on the
STMicroelectronics’ website at: www.st.com. These models are a trade-off between
accuracy and complexity (that is, time simulation) of the TSX56x and TSX56xA operational
amplifiers. They emulate the nominal performance of a typical device within the specified
operating conditions mentioned in the datasheet. They also help to validate a design
approach and to select the right operational amplifier, but they do not replace on-board
measurements.
18/28
DocID023274 Rev 5
TSX56x, TSX56xA
6
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
DocID023274 Rev 5
19/28
Package information
6.1
TSX56x, TSX56xA
SOT23-5 package information
Figure 23: SOT23-5 package outline
Table 7: SOT23-5 mechanical data
Dimensions
Ref.
A
Millimeters
Min.
Typ.
Max.
Min.
Typ.
Max.
0.90
1.20
1.45
0.035
0.047
0.057
A1
20/28
Inches
0.15
0.006
A2
0.90
1.05
1.30
0.035
0.041
0.051
B
0.35
0.40
0.50
0.014
0.016
0.020
C
0.09
0.15
0.20
0.004
0.006
0.008
D
2.80
2.90
3.00
0.110
0.114
0.118
D1
1.90
0.075
e
0.95
0.037
E
2.60
2.80
3.00
0.102
0.110
0.118
F
1.50
1.60
1.75
0.059
0.063
0.069
L
0.10
0.35
0.60
0.004
0.014
0.024
K
0 degrees
10 degrees
0 degrees
DocID023274 Rev 5
10 degrees
TSX56x, TSX56xA
6.2
Package information
DFN8 2x2 package information
Figure 24: DFN8 2x2 package outline
Table 8: DFN8 2x2 mechanical data
Dimensions
Ref.
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
0.70
0.75
0.80
0.028
0.030
0.031
A1
0.00
0.02
0.05
0.000
0.001
0.002
b
0.15
0.20
0.25
0.006
0.008
0.010
D
2.00
0.079
E
2.00
0.079
e
0.50
0.020
L
0.045
0.55
0.65
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0.018
0.022
0.026
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Package information
6.3
TSX56x, TSX56xA
MiniSO8 package information
Figure 25: MiniSO8 package outline
Table 9: MiniSO8 mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
A
Max.
Min.
Typ.
1.1
A1
0
A2
0.75
b
Max.
0.043
0.15
0
0.95
0.030
0.22
0.40
0.009
0.016
c
0.08
0.23
0.003
0.009
D
2.80
3.00
3.20
0.11
0.118
0.126
E
4.65
4.90
5.15
0.183
0.193
0.203
E1
2.80
3.00
3.10
0.11
0.118
0.122
e
L
0.85
0.65
0.40
0.60
0.006
0.033
0.80
0.016
0.024
0.95
0.037
L2
0.25
0.010
ccc
0°
0.037
0.026
L1
k
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Inches
8°
0.10
DocID023274 Rev 5
0°
0.031
8°
0.004
TSX56x, TSX56xA
QFN16 3x3 package information
Figure 26: QFN16 3x3 package outline
D
A
B
aaa C 2x
E
INDEX AREA
( D/ 2xE/ 2)
aaa C 2x
TOP VI EW
A1
ccc C
C
A
6.4
Package information
SEATING
PLANE
SI DE VIEW
eee C
e
L
b
5
bbb
8
bbb
Pin#1 ID
R0.11
4
9
1
12
16
C A B
C
13
BOTTOM VIEW
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Package information
TSX56x, TSX56xA
Table 10: QFN16 3x3 mechanical data
Dimensions
Ref.
Millimeters
Min.
Max.
Min.
Typ.
Max.
A
0.50
0.65
0.020
0.026
A1
0
0.05
0
0.002
b
0.18
0.30
0.007
0.25
0.010
D
3.00
0.118
E
3.00
0.118
e
L
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Typ.
Inches
0.50
0.30
0.012
0.020
0.50
0.012
0.020
aaa
0.15
0.006
bbb
0.10
0.004
ccc
0.10
0.004
ddd
0.05
0.002
eee
0.08
0.003
DocID023274 Rev 5
TSX56x, TSX56xA
6.5
Package information
TSSOP14 package information
Figure 27: TSSOP14 package outline
aaa
Table 11: TSSOP14 mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
A
0.05
A2
0.80
b
c
D
4.90
E
E1
Typ.
Max.
0.047
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
0.09
0.20
0.004
0.0089
5.00
5.10
0.193
0.197
0.201
6.20
6.40
6.60
0.244
0.252
0.260
4.30
4.40
4.50
0.169
0.173
0.176
1.00
0.65
0.45
L1
k
Min.
0.15
e
aaa
Max.
1.20
A1
L
Inches
0.60
0.0256
0.75
0.018
1.00
0°
0.024
0.030
0.039
8°
0.10
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0°
8°
0.004
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Ordering information
7
TSX56x, TSX56xA
Ordering information
Table 12: Order codes
Order code
Temperature
range
TSX561ILT
TSX562IQ2T
-40 to 125 °C
TSX562IST
TSX564IQ4T
Channel
number
Package
1
SΟΤ23-5
2
4
TSX564IPT
DFN8 2x2
TSSOP14
2
MiniSO8
TSX564IYPT (1)
4
TSSOP14
TSX561AILT
1
SΟΤ23-5
2
MiniSO8
4
TSSOP14
1
SΟΤ23-5
2
MiniSO8
4
TSSOP14
TSX562IYST (1)
TSX562AIST
-40 to 125 °C
TSX564AIPT
TSX561AIYLT (1)
TSX562AIYST (1)
TSX564AIYPT (1)
-40 to 125 °C
automotive grade
K23
QFN16 3x3
SΟΤ23-5
-40 to 125 °C
automotive grade
Marking
MiniSO8
1
TSX561IYLT
(1)
Packaging
TSX5641
K116
Tape and
reel
TSX5641Y
K117
TSX564AI
K118
TSX564AIY
Notes:
(1)Qualified
and characterized according to AEC Q100 and Q003 or equivalent, advanced screening according to
AEC Q001 & Q 002 or equivalent
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8
Revision history
Revision history
Table 13: Document revision history
Date
Revision
06-Aug-2012
1
Initial release.
2
Added TSX562, TSX564, TSX562A, and TSX564A devices.
Updated Features, Description, Figure 1, Table 1 (added DFN8, MiniSO8, QFN16,
and TSSOP14 package).
Updated Table 1 (updated ESD MM values).
Updated Table 4 and Table 5 (added footnotes), Section 5 (added Figure 24 to
Figure 28 and Table 8 to Table 12), Table 13 (added dual and quad devices).
Minor corrections throughout document.
3
Replaced the silhouette, pinout, package diagram, and mechanical data of the DFN8
2x2 and QFN16 3x3 packages.
Added Benefits and Related products.
Table 1: updated Rthja values and added Rthjc values for DFN8 2x2 and QFN16 3x3.
Updated Section 4.3, Section 4.4, and Section 4.6
Replaced Figure 23: SOT23-5 package mechanical drawing and Table 7: SOT23-5
package mechanical data.
4
Added SO8 package for dual version TSX562 and TSX562A.
Table 2: updated for SO8 package
Table 13: added order codes TSX562IDT, TSX562IYDT, TSX562AIDT,
TSX562AIYDT; updated automotive grade status.
5
Removed SO8 package
Table 8: "DFN8 2x2 mechanical data": removed "N"
Table 11: "TSSOP14 mechanical data": added "L" and " L1" in inches; updated "aaa"
in inches.
Table 12: "Order codes": removed TSX562IDT, TSX562IYDT, TSX562AIDT,
TSX562AIYDT.
Updated terminology
18-Sep-2012
23-May-2013
09-Aug-2013
07-Feb-2017
Changes
DocID023274 Rev 5
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TSX56x, TSX56xA
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