VN5E025MJ-E
Single channel high side driver with analog current sense
for automotive applications
Datasheet - production data
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
– Overtemperature shutdown with auto
restart (thermal shutdown)
– Reverse battery protected
– Electrostatic discharge protection
PowerSSO-12
Features
Max supply voltage
VCC
41 V
Operating voltage range
VCC
4.5 to 28 V
Max on-state resistance
RON
25 mΩ
Current limitation (typ)
ILIMH
60 A
Off-state supply current
IS
2 µA(1)
1. Typical value with all loads connected.
• General
– Inrush current active management by
power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliant with European directive
2002/95/EC
– Very low current sense leakage
• Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
currents range
– Current sense disable
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
• Protections
– Undervoltage shutdown
– Overvoltage clamp
October 2013
This is information on a product in full production.
Applications
• All types of resistive, inductive and capacitive
loads
• Suitable as LED driver
Description
The VN5E025MJ-E is a single channel high-side
driver manufactured using ST proprietary
VIPower™ M0-5 technology and housed in
PowerSSO-12 package. The device is designed
to drive 12 V automotive grounded loads and
provides protection, diagnostics and easy 3 V and
5 V CMOS-compatible interface with any
microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with autorestart and over-voltage active clamp. A
dedicated analog current sense pin is associated
with every output channel in order to provide
enhanced diagnostic functions including fast
detection of overload and short-circuit to ground
through power limitation indication and
overtemperature indication.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to share the external sense
resistor with similar devices
DocID16373 Rev 2
1/34
www.st.com
Contents
VN5E025MJ-E
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolue maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.5
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1
4
3.1.1
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22
3.1.2
Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . . 23
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3
MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.5
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 25
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.1
5
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22
PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2
PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/34
DocID16373 Rev 2
VN5E025MJ-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Switching characteristics (VCC=13V, Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
DocID16373 Rev 2
3/34
3
List of figures
VN5E025MJ-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
4/34
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Delay response time between rising edge of ouput current and rising edge of current
sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
IOUT / ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Tj evolution in overload or short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input clamp level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
On-state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
On-state resistance vs. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 26
PowerSSO-12 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . 27
Thermal fitting model of a single channel HSD in PowerSSO-12 . . . . . . . . . . . . . . . . . . . 27
PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
PowerSSO-12 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
DocID16373 Rev 2
VN5E025MJ-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1. Block diagram
VCC
Reverse
Battery
Protection
Signal Clamp
Undervoltage
IN1
Control & Diagnostic
Power
Clamp
DRIVER
CH 1
VON
Limitation
Over
temp.
Current
Limitation
CS_
DIS
VSENSEH
CS1
Current
Sense
Fault
LOGIC
OUT1
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
GND
Table 1. Pin function
Name
VCC
OUTPUT
GND
INPUT
Function
Battery connection.
Power output.
Ground connection. Must be reverse battery protected by an external diode /
resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.
CURRENT SENSE Analog current sense pin, delivers a current proportional to the load current.
CS_DIS
Active high CMOS compatible pin, to disable the current sense pin.
DocID16373 Rev 2
5/35
33
Block diagram and pin description
VN5E025MJ-E
Figure 2. Configuration diagram (top view)
TAB = Vcc
Vcc
GND
INPUT
CURRENT_SENSE
CS_DIS
Vcc
12
11
10
9
8
7
1
2
3
4
5
6
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
Table 2. Suggested connections for unused and not connected pins
6/35
Connection / pin
Current sense
N.C.
Output
Input
CS_DIS
Floating
Not allowed
X
X
X
X
To ground
Through 1kΩ
resistor
X
Through 22kΩ
resistor
Through 10kΩ
resistor
Through 10kΩ
resistor
DocID16373 Rev 2
VN5E025MJ-E
2
Electrical specifications
Electrical specifications
Figure 3. Current and voltage conventions
,6
9&&
9)
9&&
,287
,&6'
287387
&6B',6
9287
9&6'
,,1
,1387
,6(16(
&855(176(16(
9,1
*1'
96(16(
,*1'
Note:
VF = VOUT - VCC during reverse battery condition.
2.1
Absolue maximum ratings
Stressing the device above the rating listed in Table 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not
implied. Exposure to the conditions in table below for extended periods may affect device
reliability.
Table 3. Absolute maximum ratings
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
41
V
-VCC
Reverse DC supply voltage
0.3
V
-IGND
DC reverse ground pin current
200
mA
IOUT
DC output current
Internally limited
A
-IOUT
Reverse DC output current
20
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
200
mA
VCC-41
+VCC
V
V
140
mJ
IIN
ICSD
-ICSENSE DC reverse CS pin current
VCSENSE Current sense maximum voltage
EMAX
Maximum switching energy (single pulse)
(L = 0.8mH; RL = 0Ω; Vbat = 13.5V; Tjstart = 150ºC;
IOUT = IlimL(Typ.))
DocID16373 Rev 2
7/35
33
Electrical specifications
VN5E025MJ-E
Table 3. Absolute maximum ratings (continued)
Symbol
Value
Unit
VESD
Electrostatic discharge
(Human Body Model: R = 1.5KΩ; C = 100pF)
– INPUT
– CURRENT SENSE
– CS_DIS
– OUTPUT
– VCC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tj
Tstg
2.2
Parameter
Thermal data
Table 4. Thermal data
Symbol
Parameter
Max. value
Unit
1.4
°C/W
See Figure 33
°C/W
Rthj-case Thermal resistance junction-case
Rthj-amb Thermal resistance junction-ambient
2.3
Electrical characteristics
Values specified in this section are for 8V < VCC < 28V; -40°C < Tj < 150°C, unless
otherwise stated.
Table 5. Power section
Symbol
Parameter
VCC
Operating supply voltage
VUSD
VUSDhyst
RON
Vclamp
IS
8/35
Min.
Typ.
4.5
13
28
V
Undervoltage shutdown
3.5
4.5
V
Undervoltage shutdown
hysteresis
0.5
On-state resistance
Clamp voltage
Supply current
Test conditions
Max. Unit
V
IOUT = 3A; Tj = 25°C
25
mΩ
IOUT = 3A; Tj = 150°C
50
mΩ
IOUT = 3A; VCC = 5V; Tj = 25°C
35
mΩ
46
52
V
Off-state; VCC = 13V; Tj = 25°C;
VIN = VOUT = VSENSE = VCSD = 0V
2(1)
5(1)
µA
On-state; VCC = 13V; VIN = 5V;
IOUT = 0A
1.5
3
mA
IS = 20 mA
DocID16373 Rev 2
41
VN5E025MJ-E
Electrical specifications
Table 5. Power section (continued)
Symbol
IL(off1)
VF
Parameter
Test conditions
Off-state output current
Output - VCC diode
voltage
Min.
Typ.
VIN = VOUT = 0V; VCC = 13V;
Tj = 25°C
0
0.01
VIN = VOUT = 0V; VCC = 13V;
Tj = 125°C
0
-IOUT = 2A; Tj = 150°C
Max. Unit
3
µA
5
µA
0.7
V
1. PowerMOS leakage included.
Table 6. Switching characteristics (VCC=13V, Tj=25°C)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on delay time
RL = 4.3Ω (see Figure 5)
—
15
—
µs
td(off)
Turn-off delay time
RL = 4.3Ω (see Figure 5)
—
40
—
µs
(dVOUT/dt)on Turn-on voltage slope
RL = 4.3Ω
—
See
Figure 23
—
V/µs
(dVOUT/dt)off Turn-off voltage slope
RL = 4.3Ω
—
See
Figure 25
—
V/µs
WON
Switching energy losses
during twon
RL = 4.3Ω (see Figure 5)
—
0.4
—
mJ
WOFF
Switching energy losses
during twoff
RL = 4.3Ω (see Figure 5)
—
0.5
—
mJ
Max.
Unit
0.9
V
Table 7. Logic inputs
Symbol
Parameter
Test conditions
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
VIN = 0.9V
CS_DIS low level voltage
ICSDL
Low level CS_DIS current
VCSDH
CS_DIS high level voltage
ICSDH
High level CS_DIS current
µA
2.1
V
10
0.25
VCSD = 0.9V
CS_DIS clamp voltage
5.5
7
-0.7
V
DocID16373 Rev 2
V
µA
2.1
V
10
0.25
ICSD = -1mA
V
1
VCSD = 2.1V
ICSD = 1mA
µA
V
0.9
VCSD(hyst) CS_DIS hysteresis voltage
VCSCL
1
IIN = -1mA
VCSDL
Typ.
VIN = 2.1V
IIN = 1mA
Input clamp voltage
Min.
µA
V
5.5
7
-0.7
V
V
9/35
33
Electrical specifications
VN5E025MJ-E
Table 8. Protection and diagnostics (1)
Symbol
Parameter
Test conditions
IlimH
DC short circuit current
IlimL
Short circuit current
during thermal cycling
TTSD
Shutdown temperature
TRS
Thermal reset of status
VON
Max.
Unit
43
60
85
A
85
A
VCC = 13V; TR < Tj < TTSD
Reset temperature
VDEMAG
Typ.
5V < VCC < 28V
TR
THYST
VCC = 13V
Min.
15
150
175
A
200
TRS + 1 TRS + 5
°C
°C
135
°C
Thermal hysteresis
(TTSD-TR)
7
°C
Turn-off output voltage
clamp
IOUT = 2A; VIN = 0;
L = 6mH
VCC-41 VCC-46 VCC-52
V
Output voltage drop
limitation
IOUT = 0.1A
Tj = -40°C...150°C
(see Figure 6)
25
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device operates under
abnormal conditions this software must limit the duration and number of activation cycles.
Table 9. Current sense (8 V < VCC < 18 V)
Symbol
Test conditions
Min. Typ. Max. Unit
KLED
IOUT/ISENSE
IOUT = 0.05A, VSENSE = 0.5V,
VCSD = 0V; Tj = -40°C...150°C
1370 3180 4930
K0
IOUT/ISENSE
IOUT = 0.5A; VSENSE = 0.5V;
VCSD = 0V; Tj = -40°C...150°C
1990 3050 4120
IOUT/ISENSE
IOUT = 2A; VSENSE = 4V; VCSD = 0V;
Tj = -40°C...150°C
Tj = 25°C...150°C
2100 2860 3840
2220 2860 3500
Current sense ratio
drift
IOUT = 2A; VSENSE = 4V; VCSD = 0V;
Tj = -40 °C to 150 °C
IOUT/ISENSE
IOUT = 3A; VSENSE = 4V; VCSD = 0V;
Tj = -40°C...150°C
Tj = 25°C...150°C
Current sense ratio
drift
IOUT = 3 A; VSENSE = 4 V;
VCSD = 0V; Tj = -40 °C to 150 °C
IOUT/ISENSE
IOUT = 10A; VSENSE = 4V;
VCSD = 0V;
Tj = -40°C...150°C
Tj = 25°C...150°C
Current sense ratio
drift
IOUT = 10 A; VSENSE = 4 V;
VCSD = 0V; Tj = -40 °C to 150 °C
K1
dK1/K1(1)
K2
dK2/K2(1)
K3
dK3/K3(1)
10/35
Parameter
DocID16373 Rev 2
-10
10
%
2300 2850 3520
2420 2850 3300
-7
7
%
2690 2830 3060
2700 2830 3020
-4
4
%
VN5E025MJ-E
Electrical specifications
Table 9. Current sense (8 V < VCC < 18 V) (continued)
Symbol
ISENSE0
Parameter
Test conditions
Analog sense
leakage current
Min. Typ. Max. Unit
IOUT = 0A; VSENSE = 0V; VCSD = 5V;
VIN = 0V; Tj = -40°C...150°C
0
1
µA
IOUT = 0A; VSENSE = 0V; VCSD = 0V;
VIN = 5V; Tj = -40°C...150°C
0
2
µA
IOUT = 2A; VSENSE = 0V; VCSD = 5V;
VIN = 5V; Tj = -40°C...150°C
0
1
µA
30
mA
IOL
Open load on-state
current detection
threshold
VIN = 5V, 8V < VCC < 18V;
ISENSE = 5 µA
5
VSENSE
Max analog sense
output voltage
IOUT = 3A; VCSD = 0V
5
V
VSENSEH(2)
Analog sense
output voltage in
fault condition
VCC = 13V; RSENSE = 3.9KΩ
8
ISENSEH(2)
Analog sense
output current in
fault condition
VCC = 13V; VSENSE = 5V
9
tDSENSE1H
Delay response
time from falling
edge of CS_DIS pin
VSENSE < 4V; 0.5 < IOUT < 10A;
ISENSE = 90% of ISENSE max
(see Figure 4)
40
100
tDSENSE1L
Delay response
VSENSE < 4V; 0.5 < IOUT < 10A;
time from rising
ISENSE = 10% of ISENSE max
edge of CS_DIS pin (see Figure 4)
5
20
tDSENSE2H
Delay response
time from rising
edge of INPUT pin
VSENSE < 4V, 0.5 < IOUT < 10A;
ISENSE = 90% of ISENSE max
(see Figure 4)
80
300
ΔtDSENSE2H
Delay response
time between rising
edge of output
current and rising
edge of current
sense
VSENSE < 4V;
ISENSE = 90% of ISENSEMAX;
IOUT = 90% of IOUTMAX;
IOUTMAX = 3A (see Figure 7)
tDSENSE2L
Delay response
time from falling
edge of INPUT pin
VSENSE < 4V, 0.5 < IOUT < 10A;
ISENSE = 10% of ISENSE max
(see Figure 4)
mA
µs
110
80
250
1. Parameter guaranteed by design, it is not tested.
2. Fault condition includes: power limitation and overtemperature.
DocID16373 Rev 2
11/35
33
Electrical specifications
VN5E025MJ-E
Figure 4. Current sense delay characteristics
,1387
&6B',6
/2$'&855(17
6(16(&855(17
W'6(16(+
W'6(16(/
W'6(16(+
W'6(16(/
$*9
Figure 5. Switching characteristics
9287
W:RQ
W:RII
G9287GW RII
G9287GW RQ
WU
WI
W
,1387
WG RQ
WG RII
W
*$3*&)7
Figure 6. Output voltage drop limitation
9&&9287
7M &
7M &
7M &
921
,287
921521 7
$*9
12/35
DocID16373 Rev 2
VN5E025MJ-E
Electrical specifications
Figure 7. Delay response time between rising edge of ouput current and rising edge
of current sense (CS enabled)
9,1
ǻW'6(16(+
W
,287
,2870$;
,2870$;
W
,6(16(
,6(16(0$;
,6(16(0$;
W
$*9
DocID16373 Rev 2
13/35
33
Electrical specifications
VN5E025MJ-E
Figure 8. IOUT / ISENSE vs IOUT
*065*4&/4&
NBY5 K $UP$
NBY5 K $UP$
UZQJDBMWBMVF
NJO5 K $UP$
NJO5 K $UP$
*065 "
("1($'5
Figure 9. Maximum current sense ratio drift vs load current
ELL
*065 "
("1($'5
Note:
14/35
Parameter guaranteed by design; it is not tested.
DocID16373 Rev 2
VN5E025MJ-E
Electrical specifications
Table 10. Truth table
Input
Output
Sense (VCSD = 0 V)(1)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
Conditions
Overload
H
VSENSEH
Short circuit to GND
(power limitation)
L
H
L
L
0
VSENSEH
Negative output voltage
clamp
L
L
0
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
DocID16373 Rev 2
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33
Electrical specifications
VN5E025MJ-E
Table 11. Electrical transient requirements (part 1/3)
ISO 7637-2:
2004(E)
Test pulse
Test levels(1)
III
IV
1
-75V
-100V
2a
+37V
3a
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
Impedance
Min.
Max.
5000 pulses
0.5s
5s
2 ms, 10Ω
+50V
5000 pulses
0.2s
5s
50µs, 2Ω
-100V
-150V
1h
90ms
100ms
0.1µs, 50Ω
3b
+75V
+100V
1h
90ms
100ms
0.1µs, 50Ω
4
-6V
-7V
1 pulse
100ms, 0.01Ω
5b(2)
+65V
+87V
1 pulse
400ms, 2Ω
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 12. Electrical transient requirements (part 2/3)
ISO 7637-2:
2004E
Test pulse
Test level results
III
VI
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
5b(1)
C
C
1. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 13. Electrical transient requirements (part 3/3)
Class
16/35
Contents
C
All functions of the device performed as designed after exposure to disturbance.
E
One or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
DocID16373 Rev 2
VN5E025MJ-E
2.4
Electrical specifications
Waveforms
Figure 10. Normal operation
Normal operation
INPUT
Nominal load
Nominal load
IOUT
VSENSE
VCS_DIS
Figure 11. Overload or short to GND
Overload or Short to GND
INPUT
ILimH >
Power Limitation
Thermal cycling
ILimL >
IOUT
VSENSE
VCS_DIS
DocID16373 Rev 2
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33
Electrical specifications
VN5E025MJ-E
Figure 12. Intermittent overload
Intermittent Overload
INPUT
Overload
ILimH >
ILimL >
Nominal load
IOUT
VSENSEH >
VSENSE
VCS_DIS
Figure 13. Tj evolution in overload or short to GND
TJ evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients
TTSD
THYST
TR
TJ_START
TJ
ILimH >
Power Limitation
< ILimL
IOUT
18/35
DocID16373 Rev 2
VN5E025MJ-E
2.5
Electrical specifications
Electrical characteristics curves
Figure 14. Off-state output current
,ORII Q$
Figure 15. High level input current
,LK $
2II6WDWH
9FF 9
9LQ 9RXW 9
9LQ 9
7F &
7F &
("1($'5
Figure 16. Input clamp level
("1($'5
Figure 17. Input low level
9LFO 9
9LO 9
OLQ P$
7F &
Figure 18. Input high level
7F &
("1($'5
("1($'5
Figure 19. Input hysteresis voltage
9LK\VW 9
9LK 9
7F &
7F &
("1($'5
DocID16373 Rev 2
("1($'5
19/35
33
Electrical specifications
VN5E025MJ-E
Figure 20. On-state resistance vs. Tcase
Figure 21. On-state resistance vs. VCC
5RQ P2KP
5RQ P2KP
,RXW $
9FF 9
7F &
7F &
7F &
7F &
7F &
9FF 9
("1($'5
("1($'5
Figure 22. Undervoltage shutdown
Figure 23. Turn-on voltage slope
9XVG 9
G9RXWGW 2Q 9PV
9FF 9
5, 2KP
7F &
7F &
("1($'5
("1($'5
Figure 24. ILIMH vs Tcase
Figure 25. Turn-off voltage slope
,OLPK $
G9RXWGW 2II 9PV
9FF 9
9FF 9
5, 2KP
("1($'5
20/35
7F &
7F &
DocID16373 Rev 2
("1($'5
VN5E025MJ-E
Electrical specifications
Figure 26. CS_DIS high level voltage
9FVGK 9
Figure 27. CS_DIS clamp voltage
9FVGFO 9
,LQ P$
7F &
("1($'5
7F &
("1($'5
Figure 28. CS_DIS low level voltage
9FVGO 9
7F &
("1($'5
DocID16373 Rev 2
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33
Application information
3
VN5E025MJ-E
Application information
Figure 29. Application schematic
9
9&&
5SURW
&6B',6
'OG
0&8
5SURW
,,1387
287387
5SURW
&855(176(16(
*1'
56(16(
&H[W
5*1'
9*1'
'*1'
("1($'5
3.1
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1
Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following show how to dimension the RGND resistor:
1.
RGND ≤ 600mV / (IS(on)max)
2.
RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0 during reverse battery situations) is:
PD = (-VCC)2/RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not shared by the device ground, then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
22/35
DocID16373 Rev 2
VN5E025MJ-E
Application information
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same RGND.
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
3.1.2
Solution 2: diode (DGND) in the ground line
Note that a resistor (RGND = 1kΩ) should be inserted in parallel to DGND if the device drives
an inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈ 600 mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
3.2
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3
MCU I/O protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the MCU I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of MCU and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of MCU
I/Os:
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHμC - VIH - VGND) / IIHmax
Calculation example:
For VCCpeak = - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 180kΩ
Recommended values: Rprot = 10kΩ, CEXT=10nF.
3.4
Current sense and diagnostic
The current sense pin performs a double function (see Figure 30: Current sense and
diagnostic):
•
Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a know ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5 V
minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The
DocID16373 Rev 2
23/35
33
Application information
VN5E025MJ-E
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < VCC < 18 V)).
•
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to
Table 10: Truth table):
–
Power limitation activation
–
Overtemperature
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 30. Current sense and diagnostic
VBAT
VCC
Main MOSn
41V
Overtemperature
IOUT/KX
ISENSEH
Pwr_Lim
VSENSEH
CS_DIS
CURRENT
SENSEn
RPROT
To uC ADC
24/35
OUTn
RSENSE
VSENSE
DocID16373 Rev 2
GND
Load
VN5E025MJ-E
3.5
Application information
Maximum demagnetization energy (VCC = 13.5V)
Figure 31. Maximum turn-off current versus inductance
100
A
B
C
I (A)
10
1
0,1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0 Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
DocID16373 Rev 2
25/35
33
Package and PC board thermal data
VN5E025MJ-E
4
Package and PC board thermal data
4.1
PowerSSO-12 thermal data
Figure 32. PowerSSO-12 PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias,
FR4 area = 77 mm x 86 mm, PCB thickness = 1.6 mm, Cu thickness = 70 µm (front and
back side), Copper areas: from minimum pad lay-out to 8cm2).
Figure 33. Rthj-amb vs PCB copper area in open box free air condition
RTHj_amb( °C/ W)
65
60
55
50
45
40
35
30
0
2
4
6
PCB Cu heat sink area ( cm^ 2)
26/35
DocID16373 Rev 2
8
10
VN5E025MJ-E
Package and PC board thermal data
Figure 34. PowerSSO-12 thermal impedance junction ambient single pulse
ZTH (° C/ W)
100
Footprint
2 cm2
8 cm2
10
1
0,1
0,0001
0,001
0,01
0,1
1
Time ( s)
10
100
1000
Equation 1: pulse calculation formula:
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
δ = tp ⁄ T
Figure 35. Thermal fitting model of a single channel HSD in PowerSSO-12
1. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
DocID16373 Rev 2
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33
Package and PC board thermal data
VN5E025MJ-E
Table 14. Thermal parameter
2
28/35
Area/island (cm )
Footprint
2
8
R1 (°C/W)
0.3
R2 (°C/W)
1.3
R3 (°C/W)
4
R4 (°C/W)
8
8
7
R5 (°C/W)
22
15
10
R6 (°C/W)
26
20
15
C1 (W.s/°C)
0.001
C2 (W.s/°C)
0.003
C3 (W.s/°C)
0.05
C4 (W.s/°C)
0.2
0.1
0.1
C5 (W.s/°C)
0.27
0.8
1
C6 (W.s/°C)
3
6
9
DocID16373 Rev 2
VN5E025MJ-E
Package and packing information
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
PowerSSO-12 mechanical data
Figure 36. PowerSSO-12 package dimensions
DocID16373 Rev 2
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33
Package and packing information
VN5E025MJ-E
Table 15. PowerSSO-12 mechanical data
Millimeters
Dimension
Min.
Max.
A
1.250
1.620
A1
0.000
0.100
A2
1.100
1.650
B
0.230
0.410
C
0.190
0.250
D
4.800
5.000
E
3.800
4.000
e
0.800
H
5.800
6.200
h
0.250
0.500
L
0.400
1.270
k
0º
8º
X
1.900
2.500
Y
3.600
4.200
ddd
30/35
Typ.
0.100
DocID16373 Rev 2
VN5E025MJ-E
5.3
Package and packing information
Packing information
Figure 37. PowerSSO-12 tube shipment (no suffix)
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
B
C
A
100
2000
532
1.85
6.75
0.6
All dimensions are in mm.
Figure 38. PowerSSO-12 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.05)
D1 (min)
F (± 0.1)
K (max)
P1 (± 0.1)
12
4
8
1.5
1.5
5.5
4.5
2
End
All dimensions are in mm.
Start
Top
cover
tape
No components
Components
No components
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
DocID16373 Rev 2
31/35
33
Order codes
6
VN5E025MJ-E
Order codes
Table 16. Device summary
Order codes
Package
PowerSSO-12
32/35
Tube
Tape and reel
VN5E025MJ-E
VN5E025MJTR-E
DocID16373 Rev 2
VN5E025MJ-E
7
Revision history
Revision history
Table 17. Document revision history
Date
Revision
Changes
07-Oct-2009
1
Initial release.
30-Oct-2013
2
Updated disclaimer.
DocID16373 Rev 2
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33
VN5E025MJ-E
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Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
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