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VND5E160MJTR-E

VND5E160MJTR-E

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    LSOP

  • 描述:

    IC PWR SWTCH N-CHAN 1:1 PWRSSO12

  • 数据手册
  • 价格&库存
VND5E160MJTR-E 数据手册
VND5E160MJ-E Double-channel high-side driver with analog current sense for automotive applications Features Max transient supply voltage VCC Operating voltage range VCC 4.5 V to 28 V Max on-state resistance (per ch.) RON 41 V Current limitation (typ.) ILIMH 10 A Off-state supply current IS 2 µA(1) 1. Typical value with all loads connected. • • • General – Inrush current active management by power limitation – Very low standby current – 3 V CMOS compatible inputs – Optimized electromagnetic emissions – Very low electromagnetic susceptibility – In compliance with the 2002/95/EC european directive – Very low current sense leakage Diagnostic functions – Proportional load current sense – High-precision current sense for wide currents range – Current sense disable – Overload and short to ground (power limitation) indication – Thermal shutdown indication Protections – Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss of VCC – Overtemperature shutdown with auto restart (thermal shutdown) – Reverse battery protected (see Figure 29) September 2013 PowerSSO-12 160 m – Electrostatic discharge protection Application • All types of resistive, inductive and capacitive loads • Suitable as LED driver Description The VND5E160MJ-E is a double-channel high-side driver manufactured in the ST proprietary VIPower™ M0-5 technology and housed in the tiny PowerSSO-12 package. The VND5E160MJ-E is designed to drive 12 V automotive grounded loads delivering protection, diagnostics and easy 3 V and 5 V CMOS compatible interface with any microcontroller. The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with auto-restart and overvoltage active clamp. A dedicated analog current sense pin is associated with every output channel in order to provide enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication and overtemperature indication. The current sensing and diagnostic feedback of the whole device can be disabled by pulling the CS_DIS pin high to allow sharing of the external sense resistor with other similar devices. Doc ID 15616 Rev 2 1/34 www.st.com 1 Contents VND5E160MJ-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.1 4 3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.5 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 25 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.1 5 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 2/34 Doc ID 15616 Rev 2 VND5E160MJ-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 13 V, Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Current sense (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Doc ID 15616 Rev 2 3/34 List of figures VND5E160MJ-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. 4/34 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Delay response time between rising edge of output current and rising edge of current sense (CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Iout/ Isense vs Iout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Maximum current sense ratio drift vs load current(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 OFF-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Low-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 High-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Hysteresis input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 ON-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ON-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 High-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Low-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Application schematic(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Maximum turn-off current versus inductance (for each channel)(1) . . . . . . . . . . . . . . . . . . 25 PowerSSO-12 PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Rthj-amb vs PCB copper area in open box free air condition (one channel on) . . . . . . . . . 26 PowerSSO-12 thermal impedance junction ambient single pulse (one channel on) . . . . . 27 Thermal fitting model of a double-channel HSD in PowerSSO-12(1) . . . . . . . . . . . . . . . . . 27 PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 PowerSSO-12 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Doc ID 15616 Rev 2 VND5E160MJ-E Block diagram and pin description Figure 1. Block diagram VCC Signal Clamp Undervoltage IN1 Control & Diagnostic 1 Power Clamp DRIVER IN2 VON Limitation Over temp. CH 1 Current Limitation CS_ DIS VSENSEH CS1 CONTROL & DIAGNOSTIC Channels 2 1 Block diagram and pin description CH 2 Current Sense OUT2 CS2 OUT1 OVERLOAD PROTECTION (ACTIVE POWER LIMITATION) LOGIC GND Table 1. Pin function Name VCC Function Battery connection. OUTn Power output. GND Ground connection. Must be reverse battery protected by an external diode/resistor network. INn Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state. CSn Analog current sense pin, delivers a current proportional to the load current. CS_DIS Active high CMOS compatible pin, to disable the current sense pin. Doc ID 15616 Rev 2 5/34 Block diagram and pin description Figure 2. VND5E160MJ-E Configuration diagram (top view) TAB = Vcc GND IN2 IN1 CS1 CS2 CS_DIS 12 11 10 9 8 7 1 2 3 4 5 6 N.C. OUT2 OUT2 OUT1 OUT1 N.C. PowerSSO-12 Table 2. 6/34 Suggested connections for unused and not connected pins Connection / pin Current sense N.C. Output Input CS_DIS Floating Not allowed X X X X To ground Through 1 k resistor X Not allowed Doc ID 15616 Rev 2 Through 10 k Through 10 k resistor resistor VND5E160MJ-E 2 Electrical specifications Electrical specifications Figure 3. Current and voltage conventions(1) IS VCC ICSD OUT1 CS_DIS VCSD IIN1 CS1 IN1 VIN1 IIN2 VIN2 OUT2 IN2 CS2 GND IOUT1 VOUT1 ISENSE1 VSENSE1 IOUT2 ISENSE2 VCC VFn VOUT2 VSENSE2 IGND 1. VFn = VOUTn - VCC during reverse battery condition. 2.1 Absolute maximum ratings Stressing the device above the rating listed in the “absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality document. Table 3. Absolute maximum ratings Symbol Parameter Value Unit VCC DC supply voltage 41 V -VCC Reverse DC supply voltage 0.3 V - IGND DC reverse ground pin current 200 mA Internally limited A 6 A DC input current -1 to 10 mA DC current sense disable input current -1 to 10 mA 200 mA VCC-41 +VCC V V IOUT - IOUT IIN ICSD DC output current Reverse DC output current -ICSENSE DC reverse CS pin current VCSENSE Current sense maximum voltage Doc ID 15616 Rev 2 7/34 Electrical specifications Table 3. Absolute maximum ratings (continued) Symbol Parameter Unit 34 mJ Maximum switching energy (single pulse) (L = 12 mH, RL = 0 , Vbat = 13.5 V, Tjstart = 150 °C, IOUT = IlimL(Typ.)) VESD Electrostatic discharge (human body model: R = 1.5 K C = 100 pF) - IN - CS - CS_DIS - OUT - VCC 4000 2000 4000 5000 5000 V V V V V VESD Charge device model (CDM-AEC-Q100-011) 750 V Junction operating temperature -40 to 150 °C Storage temperature -55 to 150 °C Tstg Thermal data Table 4. Symbol Thermal data Parameter Rthj-case Thermal resistance junction-case (with one channel on) Rthj-amb 8/34 Value EMAX Tj 2.2 VND5E160MJ-E Thermal resistance junction-ambient Doc ID 15616 Rev 2 Max. value Unit 8 °C/W See Figure 33 °C/W VND5E160MJ-E 2.3 Electrical specifications Electrical characteristics Values specified in this section are for 8 V < VCC < 28 V, -40 °C < Tj < 150 °C, unless otherwise stated. Table 5. Power section Symbol Parameter VCC Operating supply voltage VUSD VUSDhyst RON Vclamp IS IL(off1) VF Test conditions Min. Typ. Max. Unit 4.5 13 28 V Undervoltage shutdown 3.5 4.5 V Undervoltage shutdown hysteresis 0.5 ON-state resistance (1) Clamp voltage IOUT = 1 A, Tj = 25 °C 160 IOUT = 1 A, Tj = 150 °C 320 IOUT = 1 A, VCC = 5 V, Tj = 25 °C 210 IS = 20 mA 41 OFF-state: VCC = 13 V, Tj = 25 °C, VIN = VOUT = VSENSE = VCSD = 0 V Supply current Output - VCC diode voltage (1) VIN = VOUT = 0 V, VCC = 13 V, Tj = 25 °C 0 VIN = VOUT = 0 V, VCC = 13 V, Tj = 125 °C 0 m 46 52 V 2(2) 5(2) µA 3 6 mA 0.01 3 ON-state: VCC = 13 V, VIN = 5 V, IOUT = 0 A OFF-state output current (1) V µA -IOUT = 0.6 A, Tj = 150 °C 5 0.7 V 1. For each channel. 2. PowerMOS leakage included. Table 6. Symbol Switching (VCC = 13 V, Tj = 25 °C) Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 13 (see Figure 5.) 10 µs td(off) Turn-off delay time RL = 13  (see Figure 5.) 15 µs (dVOUT/dt)on Turn-on voltage slope RL = 13  See Figure 23. V/µs (dVOUT/dt)off Turn-off voltage slope RL = 13  See Figure 25. V/µs WON Switching energy losses during twon RL = 13  (see Figure 5.) 0.03 mJ WOFF Switching energy losses during twoff RL = 13  (see Figure 5.) 0.02 mJ Doc ID 15616 Rev 2 9/34 Electrical specifications Table 7. Symbol VND5E160MJ-E Logic inputs Parameter Test conditions VIL Low-level input voltage IIL Low-level input current VIH High-level input voltage IIH High-level input current VI(hyst) Input voltage hysteresis VICL Min. VIN = 0.9 V Low-level CS_DIS current VCSDH High-level CS_DIS voltage ICSDH High-level CS_DIS current Parameter DC short-circuit current IlimL Short-circuit current during thermal cycling TTSD Shutdown temperature TR Reset temperature TRS Thermal reset of STATUS VON V V 7 -0.7 0.9 VCSD = 0.9 V V µA 2.1 V 10 0.25 µA V 5.5 7 ICSD = -1mA -0.7 Test conditions VCC0 = 13 V Min. Typ. Max. 7 10 14 5 V < VCC < 28 V 14 VCC = 13 V, TR < Tj < TTSD 2.5 V 150 175 TRS + 1 TRS + 5 200 135 Thermal hysteresis (TTSD - TR) Unit A A °C °C °C 7 °C Turn-off output voltage clamp IOUT = 1 A, VIN = 0 V, L = 20 mH VCC - 41 VCC - 46 VCC - 52 V Output voltage drop limitation IOUT = 0.03 A, Tj = -40 °C to 150 °C (see Figure 7.) 25 mV 1. To ensure long term reliability under heavy overload or short-circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. 10/34 V 1 VCSD = 2.1 V ICSD = 1mA µA Protections and diagnostics (1) IlimH VDEMAG 2.1 5.5 VCSD(hyst) hysteresis CS_DIS voltage THYST V µA IIN = -1 mA ICSDL Symbol 0.9 10 IIN = 1 mA Low-level CS_DIS voltage Table 8. Unit 0.25 Input voltage clamp CS_DIS voltage clamp Max. 1 VIN = 2.1 V VCSDL VCSCL Typ. Doc ID 15616 Rev 2 VND5E160MJ-E Electrical specifications Table 9. Symbol Parameter IOUT/ISENSE K0 IOUT/ISENSE K1 dK1/K1(1) K2 dK2/K2 Current sense (8 V < VCC < 18 V) Current sense ratio drift IOUT/ISENSE (1) K3 dK3/K3(1) ISENSE0 IOL VSENSE Current sense ratio drift IOUT/ISENSE Test conditions IOUT = 0.025 A, VSENSE = 0.5 V, VCSD = 0 V, Tj = -40 °C to 150 °C 270 520 730 IOUT = 0.35 A, VSENSE = 0.5 V, VCSD = 0 V, Tj = -40 °C to 150 °C 345 470 610 IOUT = 0.35 A, VSENSE = 0.5 V, VCSD = 0 V, Tj = 25 °C to 150 °C 370 470 540 IOUT = 0.35 A; VSENSE = 0.5 V, VCSD = 0 V, Tj = -40 °C to 150 °C -13 IOUT = 0.5 A, VSENSE = 4 V, VCSD = 0 V, Tj = -40 °C to 150 °C 370 460 550 IOUT = 0.5 A, VSENSE = 4 V, VCSD = 0 V, Tj = 25 °C to 150 °C 390 460 510 IOUT = 0.5 A, VSENSE = 4 V, VCSD = 0 V, Tj = -40 °C to 150 °C IOUT = 1.5 A, VSENSE = 4 V, VCSD = 0 V, Tj = -40 °C to 150 °C 13 -8 8 400 430 470 IOUT = 1.5 A, VSENSE = 4 V, VCSD = 0 V, 410 Tj = 25 °C to 150 °C 430 460 IOUT = 1.5 A, VSENSE= 4 V, VCSD = 0 V, Tj = -40 °C to 150 °C -4 4 IOUT = 0 A, VSENSE = 0 V, VCSD = 5 V, VIN = 0 V, Tj = -40 °C to 150 °C 0 1 IOUT = 0 A, VSENSE = 0 V;, VCSD = 0 V, VIN = 5 V, Tj = -40 °C to 150 °C 0 2 IOUT = 0.6 A, VSENSE = 0 V; VCSD = 5 V, VIN = 5 V, Tj = -40 °C to 150 °C 0 1 Open-load ON-state V = 5 V, 8 V < V < 18 V IN CC current detection ISENSE = 5 µA threshold 1 5 Max analog sense output voltage 5 Current sense ratio drift Analog sense leakage current IOUT = 1.5 A, VCSD = 0 V Analog sense output VSENSEH(2) voltage in fault VCC = 13 V, RSENSE = 3.9 K condition ISENSEH(2) Min. Typ. Max. Unit Analog sense output current in fault VCC = 13 V, VSENSE = 5 V condition Doc ID 15616 Rev 2 % % % µA mA V 8 V 9 mA 11/34 Electrical specifications Table 9. Symbol VND5E160MJ-E Current sense (8 V < VCC < 18 V) (continued) Parameter Test conditions Min. Typ. Max. Unit tDSENSE1H VSENSE < 4 V, Delay response time 0.08 A < IOUT < 1.5 A from falling edge of ISENSE = 90% of ISENSE max CS_DIS pin (see Figure 4.) 40 100 µs tDSENSE1L VSENSE < 4 V, Delay response time 0.08 A < IOUT < 1.5 A from rising edge of ISENSE = 10% of ISENSE max CS_DIS pin (see Figure 4.) 5 20 µs tDSENSE2H VSENSE < 4 V, Delay response time 0.08 A < IOUT < 1.5 A from rising edge of ISENSE=90% of ISENSE max IN pin (see Figure 4.) 30 150 µs 110 µs 250 µs Delay response time between rising edge tDSENSE2H of output current and rising edge of current sense tDSENSE2L VSENSE < 4V, ISENSE = 90% of ISENSEMAX, IOUT = 90% of IOUTMAX IOUTMAX = 1.5 A (see Figure 6) VSENSE < 4 V, Delay response time 0.08 A < IOUT < 1.5 A from falling edge of ISENSE = 10% of ISENSE max IN pin (see Figure 4.) 80 1. Parameter guaranteed by design; it is not tested. 2. Fault condition includes: power limitation and overtemperature. Figure 4. Current sense delay characteristics INPUT CS_DIS LOAD CURRENT CURRENT SENSE tDSENSE2H 12/34 tDSENSE1L Doc ID 15616 Rev 2 tDSENSE1H tDSENSE2L VND5E160MJ-E Electrical specifications Figure 5. Switching characteristics VOUT tWoff tWon 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% tr tf t INPUT td(on) td(off) t Figure 6. Delay response time between rising edge of output current and rising edge of current sense (CS enabled) VIN tDSENSE2H t IOUT IOUTMAX 90% IOUTMAX t ISENSE ISENSEMAX 90% ISENSEMAX t Doc ID 15616 Rev 2 13/34 Electrical specifications Figure 7. VND5E160MJ-E Output voltage drop limitation Vcc-Vout Tj=150oC Tj=25oC Tj=-40oC Von Iout Von/Ron(T) Figure 8. Iout/ Isense vs Iout Iout / Isense 700 650 600 550 500 A B C 450 D 400 E 350 300 250 200 0,35 0,58 0,81 1,04 1,27 IOUT (A) A: Max, Tj = -40 °C to 150 °C B: Max, Tj = 25 °C to 150 °C C: Typical, Tj = -40 °C to 150 °C 14/34 Doc ID 15616 Rev 2 D: Min, Tj = 25 °C to 150 °C E: Min, Tj = -40 °C to 150 °C 1,5 VND5E160MJ-E Electrical specifications Figure 9. Maximum current sense ratio drift vs load current(1) dk/k(%) 15 10 A 5 0 -5 B -10 -15 0,35 0,58 0,81 1,04 1,27 1,5 IOUT (A) A: Max, Tj = -40 °C to 150 °C B: Min, Tj = 25 °C to 150 °C 1. Parameter guaranteed by design; it is not tested. Table 10. Truth table Input Output Sense (VCSD = 0 V)(1) Normal operation L H L H 0 Nominal Overtemperature L H L L 0 VSENSEH Undervoltage L H L L 0 0 H X (no power limitation) Cycling (power limitation) Nominal Conditions Overload H VSENSEH Short-circuit to GND (power limitation) L H L L 0 VSENSEH Negative output voltage clamp L L 0 1. If the VCSD is high, the SENSE output is at a high-impedance, its potential depends on leakage currents and external circuit. Doc ID 15616 Rev 2 15/34 Electrical specifications Table 11. ISO 7637-2: 2004(E) Test pulse VND5E160MJ-E Electrical transient requirements (part 1) Test levels(1) III IV 1 -75 V -100 V 2a +37 V 3a Number of pulses or test times Burst cycle/pulse repetition time Delays and Impedance Min. Max. 5000 pulses 0.5 s 5s 2 ms, 10  +50 V 5000 pulses 0.2 s 5s 50 µs, 2  -100 V -150 V 1h 90 ms 100 ms 0.1 µs, 50  3b +75 V +100 V 1h 90 ms 100 ms 0.1 µs, 50  4 -6 V -7 V 1 pulse 100 ms, 0.01  +65 V +87 V 1 pulse 400 ms, 2  5b (2) 1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b. 2. Valid in case of external load dump clamp: 40 V maximum referred to ground. Table 12. Electrical transient requirements (part 2) ISO 7637-2: 2004(E) Test level results Test pulse III IV 1 C C 2a C C 3a C C 3b C C 4 C C 5b(1) C C 1. Valid in case of external load dump clamp: 40 V maximum referred to ground. Table 13. 16/34 Electrical transient requirements (part 3) Class Contents C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. Doc ID 15616 Rev 2 VND5E160MJ-E 2.4 Electrical specifications Waveforms Figure 10. Normal operation Normal operation INPUT Nominal load Nominal load IOUT VSENSE VCS_DIS Figure 11. Overload or short to GND Overload or Short to GND INPUT ILimH > Power Limitation Thermal cycling ILimL > IOUT VSENSE VCS_DIS Doc ID 15616 Rev 2 17/34 Electrical specifications VND5E160MJ-E Figure 12. Intermittent overload Intermittent Overload INPUT Overload ILimH > ILimL > Nominal load IOUT VSENSEH> VSENSE VCS_DIS Figure 13. TJ evolution in overload or short to GND TJ evolution in Overload or Short to GND INPUT Self-limitation of fast thermal transients TTSD THYST TR TJ_START TJ ILimH > Power Limitation < ILimL IOUT 18/34 Doc ID 15616 Rev 2 VND5E160MJ-E 2.5 Electrical specifications Electrical characteristics curves Figure 14. OFF-state output current Figure 15. High-level input current Iloff (nA) Iih (µA) 300 5 4,5 250 Vin=2.1V Off State Vcc=13V Vin=Vout=0V 200 4 3,5 3 150 2,5 2 100 1,5 1 50 0,5 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) 50 75 100 125 150 175 150 175 150 175 Tc (°C) Figure 16. Input clamp voltage Figure 17. Low-level input voltage Vicl (V) Vil (V) 7 2 6,8 1,8 lin=1mA 6,6 1,6 6,4 1,4 6,2 1,2 6 1 5,8 0,8 5,6 0,6 5,4 0,4 5,2 0,2 5 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) 50 75 100 125 Tc (°C) Figure 18. High-level input voltage Figure 19. Hysteresis input voltage Vih (V) Vihyst (V) 1 4 0,9 3,5 0,8 3 0,7 2,5 0,6 0,5 2 0,4 1,5 0,3 1 0,2 0,5 0,1 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 Tc (°C) -25 0 25 50 75 100 125 Tc (°C) Doc ID 15616 Rev 2 19/34 Electrical specifications VND5E160MJ-E Figure 20. ON-state resistance vs Tcase Figure 21. ON-state resistance vs VCC Ron (mOhm) Ron (mOhm) 300 300 Iout= 1A Vcc=13V 250 Tc=150°C 250 Tc=125°C 200 200 150 150 Tc=25°C 100 100 50 Tc=-40°C 50 -50 -25 0 25 50 75 100 125 150 175 0 5 10 15 Tc (°C) 20 25 30 35 40 150 175 150 175 Vcc (V) Figure 22. Undervoltage shutdown Figure 23. Turn-on voltage slope Vusd (V) (dVout/dt )On (V/ms) 16 1000 900 14 Vcc=13V RI=13 Ohm 800 12 700 10 600 500 8 400 6 300 4 200 2 100 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) 50 75 100 125 Tc (°C) Figure 24. ILIMH vs Tcase Figure 25. Turn-off voltage slope Ilimh (A) (dVout/dt )Off (V/ms) 20 1400 1300 Vcc=13V Vcc=13V RI= 13 Ohm 1200 15 1100 1000 10 900 800 5 700 600 0 500 -50 -25 0 25 50 75 100 125 150 -50 Tc (°C) 20/34 -25 0 25 50 75 Tc (°C) Doc ID 15616 Rev 2 100 125 VND5E160MJ-E Electrical specifications Figure 26. High-level CS_DIS voltage Figure 27. CS_DIS clamp voltage Vcsdh (V) Vcsdcl(V) 10 4 9 3,5 8 Iin = 1 mA 3 7 2,5 6 5 2 4 1,5 3 1 2 0,5 1 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 Tc (°C) -25 0 25 50 75 100 125 150 175 Tc (°C) Figure 28. Low-level CS_DIS voltage Vcsdl (V) 3 2,5 2 1,5 1 0,5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Doc ID 15616 Rev 2 21/34 Application information 3 VND5E160MJ-E Application information Figure 29. Application schematic(1) +5V VCC Rprot CS_DIS Dld CU Rprot INPUT OUTPUT Rprot CURRENT SENSE GND RSENSE VGND CEXT RGND DGND 1. Channel 2 has the same internal circuit as channel 1. 3.1 GND protection network against reverse battery This section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 Solution 1: resistor in the ground line (RGND only) This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1. RGND  600 mV / (IS(on)max) 2. RGND VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power dissipation in RGND (when VCC < 0: during reverse battery situations) is: Equation 1 PD = (-VCC)2 / RGND 22/34 Doc ID 15616 Rev 2 VND5E160MJ-E Application information This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum ON-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are on in the case of several high-side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below). 3.1.2 Solution 2: diode (DGND) in the ground line A resistor (RGND = 1 kshould be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (600 mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. 3.2 Load dump protection Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table. 3.3 MCU I/Os protection If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of microcontroller I/Os: Equation 2 -VCCpeak / Ilatchup  Rprot  (VOHC - VIH - VGND) / IIHmax Calculation example: For VCCpeak = - 100 V, Ilatchup  20 mA; VOHµC  4.5 V 5 k  Rprot  180 k Recommended values: Rprot =10 k, CEXT =10 nF. Doc ID 15616 Rev 2 23/34 Application information 3.4 VND5E160MJ-E Current sense and diagnostic The current sense pin performs a double function (see Figure 30: Current sense and diagnostic): ? Current mirror of the load current in normal operation, delivering a current proportional to the load one according to a know ratio KX. The current ISENSE can be easily converted to a voltage VSENSE by means of an external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5 V minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The current sense accuracy depends on the output current (refer to current sense electrical characteristics Table 9: Current sense (8 V < VCC < 18 V)). ? Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a maximum current ISENSEH in case of the following fault conditions (refer to Table 10: Truth table): – Power limitation activation – Overtemperature A logic level high on CS_DIS pin sets at the same time all the current sense pins of the device in a high-impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and ADC line among different devices. Figure 30. Current sense and diagnostic VBAT VCC Main MOSn 41V Overtemperature IOUT/KX ISENSEH Pwr_Lim VSENSEH CS_DIS CURRENT SENSEn RPROT To uC ADC 24/34 OUTn RSENSE VSENSE Doc ID 15616 Rev 2 GND Load VND5E160MJ-E Maximum demagnetization energy (VCC = 13.5 V) Figure 31. Maximum turn-off current versus inductance (for each channel)(1) 100 10 A C B 1 I (A) 3.5 Application information 0,1 0,1 1 L (mH) 10 100 A: Tjstart = 150 °C single pulse B: Tjstart = 100 °C repetitive pulse C: Tjstart = 125 °C repetitive pulse VIN, IL Demagnetization Demagnetization Demagnetization t 1. Values are generated with RL = 0  In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. Doc ID 15616 Rev 2 25/34 Package and PC board thermal data VND5E160MJ-E 4 Package and PC board thermal data 4.1 PowerSSO-12 thermal data Figure 32. PowerSSO-12 PC board(1) 1. Layout condition of Rth and Zth measurements (PCB: double layer, thermal vias, FR4 area = 77 mm x 86 mm, PCB thickness =1.6 mm, Cu thickness =70 µm (front and back side), Copper areas: from minimum pad lay-out to 8 cm2). Figure 33. Rthj-amb vs PCB copper area in open box free air condition (one channel on) RTHj_amb( ° C/ W) 70 65 60 55 50 45 40 0 2 4 6 PCB Cu heat sink area ( cm^ 2) 26/34 Doc ID 15616 Rev 2 8 10 VND5E160MJ-E Package and PC board thermal data Figure 34. PowerSSO-12 thermal impedance junction ambient single pulse (one channel on) ZTH ( ° C/ W) 100 Footprint 2 cm2 8 cm2 10 1 0,001 0,01 0,1 1 Time ( s) 10 100 1000 Equation 3: pulse calculation formula Z TH = R TH +Z THtp 1 –  where  = tP/T Figure 35. Thermal fitting model of a double-channel HSD in PowerSSO-12(1) 1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. Doc ID 15616 Rev 2 27/34 Package and PC board thermal data Table 14. 28/34 VND5E160MJ-E Thermal parameters Area/island (cm2) Footprint R1= R7 (°C/W) 1.2 R2= R8 (°C/W) 6 R3 (°C/W) 3 R4 (°C/W) 2 8 8 8 7 R5 (°C/W) 22 15 10 R6 (°C/W) 26 20 15 C1= C7 (W.s/°C) 0.0008 C2= C8 (W.s/°C) 0.0016 C3 (W.s/°C) 0.0166 C4 (W.s/°C) 0.2 0.1 0.1 C5 (W.s/°C) 0.27 0.8 1 C6 (W.s/°C) 3 6 9 Doc ID 15616 Rev 2 VND5E160MJ-E Package and packing information 5 Package and packing information 5.1 ECOPACK® In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.2 Package mechanical data Figure 36. PowerSSO-12 package dimensions Doc ID 15616 Rev 2 29/34 Package and packing information Table 15. VND5E160MJ-E PowerSSO-12 mechanical data Symbol Millimeters Min. Max. A 1.250 1.620 A1 0.000 0.100 A2 1.100 1.650 B 0.230 0.410 C 0.190 0.250 D 4.800 5.000 E 3.800 4.000 e 0.800 H 5.800 6.200 h 0.250 0.500 L 0.400 1.270 k 0° 8° X 2.200 2.800 Y 2.900 3.500 ddd 30/34 Typ. 0.100 Doc ID 15616 Rev 2 VND5E160MJ-E 5.3 Package and packing information Packing information Figure 37. PowerSSO-12 tube shipment (no suffix) B C A Base q.ty 100 Bulk q.ty 2000 Tube length (± 0.5) 532 A 1.85 B 6.75 C (± 0.1) 0.6 Figure 38. PowerSSO-12 tape and reel shipment (suffix “TR”) Reel dimensions Base q.ty Bulk q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape hole spacing Component spacing Hole diameter Hole diameter Hole position Compartment depth Hole spacing All dimensions are in mm. W P0 (± 0.1) P D (± 0.05) D1 (min) F (± 0.1) K (max) P1 (± 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 End Start Top cover tape No components Components 500mm min No components 500mm min Empty components pockets saled with cover tape. User direction of feed Doc ID 15616 Rev 2 31/34 Order codes 6 VND5E160MJ-E Order codes Table 16. Device summary Package PowerSSO-12 32/34 Order codes Tube Tape and reel VND5E160MJ-E VND5E160MJTR-E Doc ID 15616 Rev 2 VND5E160MJ-E 7 Revision history Revision history Table 17. Document revision history Date Revision Changes 08-Oct-2009 1 Initial release. 20-Sep-2013 2 Updated Disclaimer. Doc ID 15616 Rev 2 33/34 VND5E160MJ-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. 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WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 34/34 Doc ID 15616 Rev 2
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VND5E160MJTR-E
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