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VNP20N07

VNP20N07

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    TO-220-3

  • 描述:

    IC PWR DRIVER N-CHAN 1:1 TO220AB

  • 数据手册
  • 价格&库存
VNP20N07 数据手册
VNP20N07 "OMNIFET": FULLY AUTOPROTECTED POWER MOSFET TYPE VNP20N07 ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ V clamp R DS(on) I lim 70 V 0.05 Ω 20 A LINEAR CURRENT LIMITATION THERMAL SHUT DOWN SHORT CIRCUIT PROTECTION INTEGRATED CLAMP LOW CURRENT DRAWN FROM INPUT PIN DIAGNOSTIC FEEDBACK THROUGH INPUT PIN ESD PROTECTION DIRECT ACCESS TO THE GATE OF THE POWER MOSFET (ANALOG DRIVING) COMPATIBLE WITH STANDARD POWER MOSFET STANDARD TO-220 PACKAGE DESCRIPTION The VNP20N07 is a monolithic device made using STMicroelectronics VIPower Technology, intended for replacement of standard power MOSFETS in DC to 50 KHz applications. Built-in thermal shut-down, linear current limi- 3 1 2 TO-220 tation and overvoltage clamp protect the chip in harsh enviroments. Fault feedback can be detected by monitoring the voltage at the input pin. BLOCK DIAGRAM September 2013 1/11 VNP20N07 ABSOLUTE MAXIMUM RATING Symbol Parameter Value Unit Internally Clamped V Input Voltage 18 V ID Drain Current Internally Limited A IR Reverse DC Output Current -28 A 2000 V V DS Drain-source Voltage (V in = 0) V in V esd Ptot Tj Tc T stg Electrostatic Discharge (C= 100 pF, R=1.5 KΩ) o Total Dissipation at T c = 25 C 83 Operating Junction Temperature Case Operating Temperature W Internally Limited o C Internally Limited o C -55 to 150 o C Storage Temperature THERMAL DATA R thj-case R thj-amb Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max Max o 1.5 62.5 o C/W C/W ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbol Parameter Test Conditions V CLAMP Drain-source Clamp Voltage I D = 200 mA V in = 0 V CLTH Drain-source Clamp Threshold Voltage I D = 2 mA V INCL Input-Source Reverse Clamp Voltage I in = -1 mA I DSS Zero Input Voltage Drain Current (V in = 0) V DS = 13 V V DS = 25 V V in = 0 V in = 0 II SS Supply Current from Input Pin V DS = 0 V V in = 10 V V in = 0 Min. Typ. Max. Unit 60 70 80 V 55 V -1 -0.3 V 50 200 µA µA 250 500 µA Typ. Max. Unit 3 V 0.05 0.07 Ω Ω Max. Unit ON (∗) Symbol Parameter Test Conditions Min. ID + I in = 1 mA 0.8 V IN(th) Input Threshold Voltage V DS = Vin R DS(on) Static Drain-source On Resistance V in = 10 V I D = 10 A V in = 5 V I D = 10 A DYNAMIC Symbol g fs (∗) C oss 2/11 Parameter Test Conditions Forward Transconductance V DS = 13 V I D = 10 A Output Capacitance V DS = 13 V f = 1 MHz V in = 0 Min. Typ. 13 17 500 S 800 pF VNP20N07 ELECTRICAL CHARACTERISTICS (continued) SWITCHING (∗∗) Symbol Parameter Test Conditions Min. Typ. Max. Unit t d(on) tr t d(off) tf Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time V DD = 15 V V gen = 10 V (see figure 3) I d = 10 A R gen = 10 Ω 90 240 430 150 180 400 800 300 ns ns ns ns t d(on) tr t d(off) tf Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time V DD = 15 V V gen = 10 V (see figure 3) I d = 10 A R gen = 1000 Ω 800 1.5 6 3.5 1200 2.2 10 5.5 ns µs µs µs Turn-on Current Slope V DD = 15 V V in = 10 V Total Input Charge V DD = 12 V (di/dt) on Qi I D = 10 A R gen = 10 Ω I D = 10 A V in = 10 V 60 A/µs 60 nC SOURCE DRAIN DIODE Symbol V SD (∗) t rr (∗∗) Q rr (∗∗) I RRM (∗∗) Parameter Test Conditions Forward On Voltage I SD = 10 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 10 A di/dt = 100 A/µs V DD = 30 V T j = 25 o C (see test circuit, figure 5) Min. Typ. V in = 0 Max. Unit 1.6 V 165 ns 0.55 µC 6.5 A PROTECTION Symbol Parameter Test Conditions Min. Typ. Max. Unit V DS = 13 V V DS = 13 V 14 14 20 20 28 28 A A 29 70 60 140 µs µs Drain Current Limit V in = 10 V V in = 5 V t dlim (∗∗) Step Response Current Limit V in = 10 V V in = 5 V T jsh (∗∗) Overtemperature Shutdown 150 o C T jrs (∗∗) Overtemperature Reset 135 o C I gf (∗∗) Fault Sink Current V in = 10 V V in = 5 V E as (∗∗) Single Pulse Avalanche Energy starting T j = 25 o C V DD = 20 V V in = 10 V R gen = 1 KΩ L = 10 mH I lim 50 20 0.95 mA mA J (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (∗∗) Parameters guaranteed by design/characterization 3/11 VNP20N07 PROTECTION FEATURES During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 KHz. The only difference from the user’s standpoint is that a small DC current (Iiss) flows into the Input pin in order to supply the internal circuitry. The device integrates: - OVERVOLTAGE CLAMP PROTECTION: internally set at 70V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. - LINEAR CURRENT LIMITER CIRCUIT: limits the drain current Id to Ilim whatever the Input pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. 4/11 - OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs at minimum 150oC. The device is automatically restarted when the chip temperature falls below 135oC. - STATUS FEEDBACK: In the case of an overtemperature fault condition, a Status Feedback is provided through the Input pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 Ω. The failure can be detected by monitoring the voltage at the Input pin, which will be close to ground potential. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit (with a small increase in RDS(on)). VNP20N07 Thermal Impedance Derating Curve Output Characteristics Transconductance Static Drain-Source On Resistance vs Input Voltage Static Drain-Source On Resistance 5/11 VNP20N07 Static Drain-Source On Resistance Input Charge vs Input Voltage Capacitance Variations Normalized Input Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Normalized On Resistance vs Temperature 6/11 VNP20N07 Turn-on Current Slope Turn-on Current Slope Turn-off Drain-Source Voltage Slope Turn-off Drain-Source Voltage Slope Switching Time Resistive Load Switching Time Resistive Load 7/11 VNP20N07 Switching Time Resistive Load Current Limit vs Junction Temperature Step Response Current Limit Source Drain Diode Forward Characteristics 8/11 VNP20N07 Fig. 1: Unclamped Inductive Load Test Circuits Fig. 2: Unclamped Inductive Waveforms Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Input Charge Test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 6: Waveforms 9/11 VNP20N07 TO-220 MECHANICAL DATA mm. DIM. MIN. MAX. A 4.40 4.60 b 0.61 0.88 b1 1.15 1.70 c 0.49 0.70 D 15.25 15.75 E 10 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13 14 L1 3.50 3.93 L20 16.40 L30 28.90 ∅P 3.75 3.85 Q 2.65 2.95 Package Weight 10/11 TYP 1.9Gr. (Typ.) VNP20N07 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com DocID1607 Rev 3 11/11 11
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