VN1504

VN1504/ VN1506/ VN1509 N-Channel Enhancement-Mode Vertical DMOS FET Ordering Information BVDSS / BVDGS 40V 60V 90V † RDS(ON) (max) 3.0Ω 3.0Ω 3.0Ω ID(ON) (min) 2.0A 2.0A 2.0A Order Number / Package Die† VN1504NW VN1506NW VN1509NW MIL visual screening available. Features ❏ Free from secondary breakdown ❏ Low power drive requirement ❏ Ease of paralleling ❏ Low CISS and fast switching speeds ❏ Excellent thermal stability ❏ Integral Source-Drain diode ❏ High input impedance and high gain ❏ Complementary N- and P-channel devices Advanced DMOS Technology Thisi enhancement-mode (normally-off) transistori utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Applications ❏ Motor controls ❏ Converters ❏ Amplifiers ❏ Switches ❏ Power supply circuits ❏ Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) Absolute Maximum Ratings Drain-to-Source Voltage Drain-to-Gate Voltage Gate-to-Source Voltage Operating and Storage Temperature Soldering Temperature* * Distance of 1.6 mm from case for 10 seconds. BVDSS BVDGS ± 20V -55°C to +150°C 300°C 1 VN1509 Electrical Characteristics (@25°C unless otherwise specified) Symbol BVDSS VGS(th) ∆VGS(th) IGSS IDSS Parameter Drain-to-Source Breakdown Voltage Gate Threshold Voltage Change in VGS(th) with Temperature Gate Body Leakage Zero Gate Voltage Drain Current VN1504 VN1506 VN1509 Min 40 60 90 0.8 -3.8 2.4 -5.5 100 1 100 ID(ON) RDS(ON) ∆RDS(ON) GFS CISS COSS CRSS td(ON) tr td(OFF) tf VSD trr ON-State Drain Current Static Drain-to-Source ON-State Resistance Change in RDS(ON) with Temperature Forward Transconductance Input Capacitance Common Source Output Capacitance Reverse Transfer Capacitance Turn-ON Delay Time Rise Time Turn-OFF Delay Time Fall Time Diode Forward Voltage Drop Reverse Recovery Time 300 0.5 2.0 1.0 2.5 3.0 2.5 0.70 450 55 20 5 3 5 6 5 1.2 400 65 25 8 5 8 9 8 1.8 V ns ns VDD = 25V ID = 1A RGEN = 25Ω VGS = 0V, ISD =1.0A VGS = 0V, ISD =1.0A pF 5.0 3.0 1 µA Typ Max Unit V Conditions VGS = 0V, ID = 1mA VGS = VDS, ID = 1mA VGS = VDS, ID = 1mA VGS = ± 20V, VDS = 0V VGS = 0V, VDS = Max Rating VGS = 0V, VDS = 0.8 Max Rating TA = 125°C VGS = 5V, VDS = 25V VGS = 10V, VDS = 25V VGS = 5V, ID = 250mA VGS = 10V, ID = 1A VGS = 10V, ID = 1A VDS = 25V, ID = 0.5A VGS = 0V, VDS = 25V f = 1 MHz V mV/°C nA A Ω %/°C m Notes: 1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit Doc.# DSFP - VN0109 A062306 2