SPP4925B
P-Channel Enhancement Mode MOSFET
DESCRIPTION The SPP4925B is the Dual P-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application , notebook computer power management and other battery powered circuits where high-side switching . FEATURES -30V/-7.2A,RDS(ON)= 24mΩ@VGS=- 10V -30V/-5.6A,RDS(ON)= 30mΩ@VGS=-4.5V Super high density cell design for extremely low RDS (ON) Exceptional on-resistance and maximum DC current capability SOP – 8P package design APPLICATIONS Power Management in Note book Portable Equipment Battery Powered System DC/DC Converter Load Switch DSC LCD Display inverter
PIN CONFIGURATION(SOP – 8P)
PART MARKING
2009/03/20 Ver.1
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SPP4925B
P-Channel Enhancement Mode MOSFET
PIN DESCRIPTION
Pin 1 2 3 4 5 6 7 8
Symbol S1 G1 S2 G2 D2 D2 D1 D1
Description Source 1 Gate 1 Source 2 Gate 2 Drain 2 Drain 2 Drain 1 Drain 1
ORDERING INFORMATION Part Number SPP4925BS8RGB Package SOP- 8P Part Marking SPP4925B
※ SPP4925BS8RGB : 13” Tape Reel ; Halogen – Free ; Pb – Free
ABSOULTE MAXIMUM RATINGS (TA=25℃ Unless otherwise noted) Parameter Drain-Source Voltage Gate –Source Voltage Continuous Drain Current(TJ=150℃) Pulsed Drain Current Continuous Source Current(Diode Conduction) Power Dissipation Operating Junction Temperature Storage Temperature Range Thermal Resistance-Junction to Ambient TA=25℃ TA=70℃ TA=25℃ TA=70℃ Symbol VDSS VGSS ID IDM IS PD TJ TSTG RθJA Typical -30 ±20 Unit
V V A A A W ℃ ℃ ℃/W
-7.2 -5.6 -20 -2.3 2.8 1.8 -55/150 -55/150 70
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SPP4925B
P-Channel Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS (TA=25℃ Unless otherwise noted)
Parameter Static Drain-Source Breakdown Voltage Gate Threshold Voltage Gate Leakage Current Zero Gate Voltage Drain Current On-State Drain Current Drain-Source On-Resistance Forward Transconductance Diode Forward Voltage Dynamic Total Gate Charge Gate-Source Charge Gate-Drain Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Time Turn-Off Time
Symbol
Conditions
Min.
Typ
Max.
Unit
V(BR)DSS VGS=0V,ID=-250uA VGS(th) VDS=VGS,ID=-250uA IGSS IDSS ID(on) RDS(on) gfs VSD Qg Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf VDD=-15V,RL=15Ω ID≡-1.0A,VGEN=-10V RG=6Ω VDS=-15V,VGS=0V f=1MHz VDS=0V,VGS=±20V VDS=-24V,VGS=0V VDS=-24V,VGS=0V TJ=85℃ VDS= -5V,VGS =-4.5V VGS=-10V,ID=-9.2A VGS=-4.5V,ID=-7.0A VDS=-10V,ID=-9.0A IS=-2.3A,VGS =0V
-30 -0.7 -1.6 ±100 -1 -5 -40 0.020 0.024 24 -0.8 20 3.5 4.8 1850 450 335 20 20 75 40 30 30 110 80 0.024 0.030 -1.2 30
V nA uA A Ω S V
VDS=-15V,VGS=-10V ID= -9.0A
nC
pF
nS
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SPP4925B
P-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
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SPP4925B
P-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
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SPP4925B
P-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
2009/03/20 Ver.1
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SPP4925B
P-Channel Enhancement Mode MOSFET
SOP- 8 PACKAGE OUTLINE
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SPP4925B
P-Channel Enhancement Mode MOSFET
Information provided is alleged to be exact and consistent. SYNC Power Corporation presumes no responsibility for the penalties of use of such information or for any violation of patents or other rights of third parties which may result from its use. No license is granted by allegation or otherwise under any patent or patent rights of SYNC Power Corporation. Conditions mentioned in this publication are subject to change without notice. This publication surpasses and replaces all information previously supplied. SYNC Power Corporation products are not authorized for use as critical components in life support devices or systems without express written approval of SYNC Power Corporation. ©The SYNC Power logo is a registered trademark of SYNC Power Corporation ©2004 SYNC Power Corporation – Printed in Taiwan – All Rights Reserved SYNC Power Corporation 9F-5, No.3-2, Park Street NanKang District (NKSP), Taipei, Taiwan 115 Phone: 886-2-2655-8178 Fax: 886-2-2655-8468 ©http://www.syncpower.com
2009/03/20 Ver.1
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