U6084B

U6084B PWM Power Control with Automatic Duty Cycle Reduction Description The U6084B is a bipolar technology PWM-IC designed for the control of an N-channel power MOSFET used as a high-side switch. The IC is ideal for use in the brightness control (dimming) of lamps such as, in dashboard applications. For a constant brightness the preselected duty cycle can be reduced automatically as a function of the supply voltage. Features D Pulse width modulation up to 2 kHz clock frequency D Protection against short circuit, load-dump overvoltage and reverse VS D Interference and damage protection according to VDE 0839 and ISO/TR 7637/1. D Duty cycle 0 to 100 % continuously D Output stage for power MOSFET D Charge pump noise suppressed D Ground wire breakage protection Ordering Information Extended Type Number U6084B–FP Package SO16 Remarks Block Diagram C5 VS 16 9 Short circuit latch monitoring 5 6 C1 47 kW 3 C2 Control input RC oscillator PWM Logic Output 14 Charge pump 13 C3 47 nF 11 Current monitoring + short circuit detection 12 Rsh VBatt Duty cycle range 0–100% Duty cycle reduction 4 C6 Voltage monitoring 1 Enable/ disable 2 95 9751 150W R3 Ground Figure 1. Block diagram with external circuit TELEFUNKEN Semiconductors Rev. A1, 14-Feb-97 1 (8) U6084B Pin Description GND En / Dis VI Reduct 1 2 3 4 16 15 14 13 12 11 10 9 95 9754 VS NC Output 2 VS Sense Delay NC Latch Attenuation 5 Osc NC NC 6 7 8 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol GND En / Dis VI Reduct NC Osc NC NC Latch NC Delay Sense 2VS Output NC VS Function IC ground Enable/disable Control input (duty cycle) Duty cycle reduction Attenuation Oscillator Not connected Not connected Status short circuit latch Not connected Short circuit protection delay Current sensing Voltage doubler Output Not connected Supply voltage VS Functional Description Pin1, GND Ground-Wire Breakage To protect the FET in the case of ground-wire breakage, a 820 kW resistor between gate and source it is recommended to provide proper switch-off conditions. Pin 4, Duty Cycle Reduction With Pin 4 connected according to figure 2, the set duty 12.5 V. This causes a cycle is reduced as from VBatt power reduction in the FET and in the lamps. In addition, the brightness of the lamps is largely independent of the supply voltage range, VBatt = 12.5 to 16 V.  Output Slope Control The rise and fall time (tr, tf) of the lamp voltage can be limited to reduce radio interference. This is done with an integrator which controls a power MOSFET as source follower. The slope time is controlled by an external capacitor C4 and the oscillator current (see figure 2). Calculation: tf r Pin 2, Enable/Disable The dimmer can be switched on or off with pin 2 independently of the set duty cycle. V2 Approx. >0.7 V or open < 0.7 V or connected to Pin 1 Function Disable Enable C4 I osc With VBatt = 12 V, C4 = 470 pF and Iosc = 40 m A,we thus obtain a controlled slope of Batt + t +V r Pin 3, Control Input The pulse width is controlled by means of an external potentiometer (47 kW). The characteristic (angle of rotation/duty cycle) is linear. The duty cycle can be varied from 0 to 100%. It is possible to further restrict the duty cycle with the resistors R1 and R2 (see figure 2). Pin 3 is protected against short-circuit to VBatt and ground GND (VBatt 16.5 V). tf + t + 12 V 470 pF 40 mA + 141 m s Pin 5, Attenuation Capacitor C4 connected to Pin 5 damps oscillation tendencies. Pin 6, Oscillator The oscillator determines the frequency of the output voltage. This is defined by an external capacitor, C2. It is TELEFUNKEN Semiconductors Rev. A1, 14-Feb-97 x 2 (8) U6084B charged with a constant current, I, until the upper switching threshold is reached. A second current source is then activated which taps a double current, 2 I, from the charging current. The capacitor, C2, is thus discharged by the current, I, until the lower switching threshold is reached. The second source is then switched off again and the procedure starts once more. Example for Oscillator Frequency Calculation V T100 A selection of different values of C2 and C4, provides a range of oscillator frequency, f, from 10 to 2000 Hz. Pins 7, 8, 10 and 15 Not connected. +V V¦ +V V +V S T 100 TL S S + (V * I a + (V * I a + (V * I a 3 1 Batt S 2 Batt Batt S R 3) S a a 3 1 Pin 9, Status Short Circuit Latch 2 R 3) R 3) a The status of the short-circuit latch can be monitored via Pin 9 (open collector output). Pin 9 L H Function Short-circuit detected No short-circuit detected where V T100 + High switching threshold (100% duty cycle) V Tt100 V TL a1, a2 and a3 are fixed constant. + Low switching threshold + High switching threshold (t 100% duty cycle) Pins 11 and 12, Short-Circuit Protection and Current Sensing 1. Short-Circuit Detection and Time Delay, td The lamp current is monitored by means of an external shunt resistor. If the lamp current exceeds the threshold for the short-circuit detection circuit (VT2 90 mV), the duty cycle is switched over to 100% and the capacitor C5 is charged by a current source of 20 m A (Ich – Idis). The external FET is switched off after the cut-off threshold (VT11) is reached. Renewed switching on the FET is possible only after a power-on reset. The current source, Idis, ensures that the capacitor C5 is not charged by parasitic currents. The capacitor C5 is discharged by Idis to typ. 0.7 V. VBatt = 12 V, IS = 4 mA, R3 = 150 W , a1 = 0.7, a2 = 0.67 and a3 = 0.28. V T100 The above mentioned threshold voltages are calculated for the following values given in the data sheet. + * 4 mA 150 W V t + 11.4 V 0.67 + 7.6 V V + 11.4 V 0.28 + 3.2 V (12 V T 100 TL ) 0.7 [8 V  For a duty cycle of 100%, an oscillator frequency, f, is as follows: f +2 +2 +2 I osc (V T100 *V TL ) C2 , where C 2 22 nF 40 mA and I osc + + Therefore: f (8 V * 3.2 V) *V TL) 40 mA Time delay, td, is as follows: 22 nF + 189 Hz td + C @ (V * 0.7 V) (I * I 5 T11 ch dis ) For a duty cycle of less than 100%, the oscillator frequency, f, is as follows: f (V Tt100 I osc C2 )4 )4 With C5 = 330 nF and VBatt = 12 V, we have V Batt C4 td 12 V 470 pF whereas C4 = 470 pF 7.6 V +2 + 185 Hz * 3.2 V 40 A 22 nF m + 330 nF @ (9.8 V * 0.7 V) 20 mA + 150 ms. TELEFUNKEN Semiconductors Rev. A1, 14-Feb-97 3 (8) U6084B 2. Current Limitation The lamp current is limited by a control amplifier that protects the external power transistor. The voltage drop across an external shunt resistor acts as the measured variable. Current limitation takes place for a voltage drop of Owing to the difference VT1 100 mV. VT1–VT2 10 mV, current limitation occurs only when the short-circuit detection circuit has responded. After a power-on reset, the output is inactive for half an oscillator cycle. During this time , the supply voltage capacitor can be charged so that current limitation is guaranteed in the event of a short circuit when the IC is switched on for the first time. Pin 16, Supply Voltage, Vs or VBatt Undervoltage Detection: In the event of voltages of approx. VBatt < 5.0 V, the external FET is switched off and the latch for short-circuit detection is reset. A hysteresis ensures that the FET is switched on again at approximately VBatt 5.4 V. Overvoltage Detection Stage 1 If overvoltages VBatt > 20 V (typ.) occur, the external transistor is switched off and switched on again at VBatt < 18.5 V (hysteresis). Stage 2 If VBatt > 28.5 V (typ.), the voltage limitation of the IC is reduced from 26 V to 20 V. The gate of the external transistor remains at the potential of the IC ground, thus producing voltage sharing between FET and lamps in the event of overvoltage pulses occuring (e.g., load-dump). The short-circuit protection is not in operation. At VBatt < 23 V, the overvoltage detection stage 2 is switched off.    Pins 13 and 14, Charge Pump and Output Output, Pin 14, is suitable for controlling a power MOSFET. During the active integration phase, the supply current of the operational amplifier is mainly supplied by the capacitor C3 (bootstrapping). Additionally, a trickle charge is generated by an integrated oscillator (f13 400 kHz) and a voltage doubler circuit. This permits a gate voltage supply at a duty cycle of 100%.  Absolute Maximum Ratings Parameters Junction temperature Ambient temperature range Storage temperature range Symbol Tj Tamb Tstg Value 150 –40 to +110 –55 to +125 Unit °C °C °C Thermal Resistance Parameters Junction ambient Symbol RthJA Value 120 Unit K/W Electrical Characteristics Tamb = –40 to +110°C, VBatt = 9 to 16.5 V, (basic function is guaranteed between 6.0 V to 9.0 V) reference point ground, unless otherwise specified (see figure 1). All other values refer to Pin GND (Pin 1). Parameters Current consumption Supply voltage Stabilized voltage Battery undervoltage detection 4 (8) Test Conditions / Pins Pin 16 Overvoltage detection, stage 1 IS = 10 mA Pin 16 – on – off Symbol IS VBatt VS VBatt Min. Typ. Max. 6.8 25 27.0 5.6 6.0 Unit mA V V V 24.5 4.4 4.8 5.0 5.4 TELEFUNKEN Semiconductors Rev. A1, 14-Feb-97 U6084B Parameters Test Conditions / Pins Battery overvoltage detection Pin 2 Stage 1: – on – off Stage 2: – on – off Stabilized voltage IS = 30 mA Pin 16 Short-circuit protection Pin 12 Short-circuit current limita- VT1 = VS – V12 tion Short-circuit detection VT2 = VS – V12 Delay timer short circuit detection Pin 11 Switched off threshold VT11 = VS – V11 Charge current Dicharge current Capacitance current I5 = Ich – Idis Output short-circuit latch Pin 9 Saturation voltage I9 = 100 mA Voltage doubler Pin 13 Voltage Duty cycle 100% Oscillator frequency Internal voltage limitation I13 = 5 mA g (whichever is lower) Gate output Pin 14 Voltage g Low level VBatt = 16.5 V, Tamb = 110 °C, R3 = 150 W High level, duty cycle 100% Current V14 = Low level V14 = High level, I13 > | I14 | Symbol VBatt VBatt VZ VT1 VT2 VT1 – VT2 Min. 18.3 16.7 25.5 19.5 18.5 85 75 3 9.5 Typ. 20.0 18.5 28.5 23.0 20.0 100 90 10 9.8 23 3 20 150 Max. 21.7 20.3 32.5 26.5 21.5 120 105 30 10.1 Unit V V V mV mV mV VT11 Ich Idis I5 Vsat V13 f13 V13 V13 V14 mA mA mA mV V 13 27 350 2 VS 280 26 (VS+14) 0.35 400 27.5 (VS+15) 0.70 520 30.0 (VS+16) 0.95 1.5 *) kHz V V V14 I14 1.0 –1.0 –20 6.9 10 0.68 0.65 0.26 26 6.0 V13 mA Enable/ Disable Current Duty cycle reduction Z-voltage Oscillator Frequency Threshold cycle Upper Pin 2 V2 = 0 V I4 = 500 mA Pin 4 V4 Pin6 V T100 VS V Tt100 VS 7.4 8.0 2000 0.72 0.69 0.3 54 13.5 I2 –40 –60 mA V Hz V 14 V 14 Lower Oscillator current Frequency tolerance *) a 3 + High, a + + Low, a + +V V 1 2 TL S a1 a2 a3 f 0.7 0.67 0.28 40 9.9 VBatt = 12 V C4 open, C2 = 470 nF, duty cycle = 50% Iosc f mA Hz Reference point is battery ground. TELEFUNKEN Semiconductors Rev. A1, 14-Feb-97 5 (8) Application U6084B 6 (8) C5 330 nF 11 VS VS + + – I + Oscillator Idis – + Reset 2I Switch – on delay 13 C3 47 nF Overvoltage monitoring stage 2 VS Reset Low voltage monitoring 2 150 W 1 7 NC R3 Ground 8 NC 10 NC 15 NC Load RL 14 820 kW Reset VS Voltage doubler – 12 10 mV Ich – Current limiting 90 mV C4 47 pF VS VS Rsh VS VS 16 9 VBatt Overvoltage monitoring stage 1 5 100 W 6 C1 47 m F R1 C2 Figure 2. 22 nF 47 kW 3 30 k W 4 R2 VS C6 VS TELEFUNKEN Semiconductors Rev. A1, 14-Feb-97 95 9757 U6084B Dimensions in mm Package SO16 Dimensions in mm 10.0 9.85 5.2 4.8 3.7 1.4 0.4 1.27 8.89 16 9 0.25 0.10 0.2 3.8 6.15 5.85 technical drawings according to DIN specifications 13036 1 8 TELEFUNKEN Semiconductors Rev. A1, 14-Feb-97 7 (8) U6084B Ozone Depleting Substances Policy Statement It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423 8 (8) TELEFUNKEN Semiconductors Rev. A1, 14-Feb-97