IRF730A
www.vishay.com
Vishay Siliconix
Power MOSFET
FEATURES
D
• Low gate charge Qg results in simple drive
Available
requirement
• Improved gate, avalanche and dynamic dV/dt
Available
ruggedness
• Fully characterized capacitance and avalanche voltage
and current
• Effective Coss specified
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
TO-220AB
G
G
D
S
S
N-Channel MOSFET
Note
* This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
PRODUCT SUMMARY
VDS (V)
400
RDS(on) (Ω)
VGS = 10 V
1.0
Qg max. (nC)
22
Qgs (nC)
5.8
Qgd (nC)
APPLICATIONS
• Switch mode power supply (SMPS)
• Uninterruptible power supply
• High speed power switching
9.3
Configuration
Single
TYPICAL SMPS TOPOLOGIES
• Single transistor flyback Xfmr. reset
• Single transistor forward Xfmr. reset (both US line input
only)
ORDERING INFORMATION
Package
Lead (Pb)-free
TO-220AB
IRF730APbF
Lead (Pb)-free and halogen-free
IRF730APbF-BE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-source voltage
VDS
400
Gate-source voltage
VGS
± 30
VGS at 10 V
Continuous drain current
TC = 25 °C
TC = 100 °C
Pulsed drain current a
ID
UNIT
V
5.5
3.5
A
IDM
22
0.6
W/°C
Single pulse avalanche energy b
EAS
290
mJ
Repetitive avalanche current a
IAR
5.5
A
EAR
7.4
mJ
PD
74
W
dV/dt
4.6
V/ns
TJ, Tstg
-55 to +150
Linear derating factor
Repetitive avalanche energy
a
Maximum power dissipation
TC = 25 °C
Peak diode recovery dV/dt c
Operating junction and storage temperature range
Soldering recommendations (peak temperature) d
Mounting torque
For 10 s
6-32 or M3 screw
300
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Starting TJ = 25 °C, L = 19 mH, Rg = 25 Ω, IAS = 5.5 A (see fig. 12)
c. ISD ≤ 5.5 A, dI/dt ≤ 90 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
d. 1.6 mm from case
S21-0853-Rev. C, 16-Aug-2021
Document Number: 91045
1
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IRF730A
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Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum junction-to-ambient
RthJC
-
1.70
Case-to-sink, flat, greased surface
RthCS
0.50
-
Maximum junction-to-case (drain)
RthJA
-
62
UNIT
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-source breakdown voltage
VDS temperature coefficient
Gate-source threshold voltage
VDS
VGS = 0 V, ID = 250 μA
400
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.5
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.5
V
Gate-source leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero gate voltage drain current
IDSS
VDS = 400 V, VGS = 0 V
-
-
25
VDS = 320 V, VGS = 0 V, TJ = 125 °C
-
-
250
-
-
1.0
Ω
S
Drain-source on-state resistance
Forward transconductance
RDS(on)
ID = 3.3 A b
VGS = 10 V
gfs
VDS = 50 V, ID = 3.3 A
3.1
-
-
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-
600
-
-
103
-
-
4.0
-
-
890
-
μA
Dynamic
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
Output capacitance
Coss
Effective output capacitance
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
Turn-on delay time
td(on)
Turn-off delay time
VGS = 0 V
Coss eff.
Total gate charge
Rise time
VDS = 1.0 V, f = 1.0 MHz
tr
td(off)
Fall time
tf
Gate input resistance
Rg
VGS = 10 V
VDS = 320 V, f = 1.0 MHz
-
30
-
VDS = 0 V to 320 V c
-
45
-
-
-
22
-
-
5.8
-
-
9.3
-
10
-
ID = 3.5 A, VDS = 320 V
see fig. 6 and 13 b
VDD = 200 V, ID = 3.5 A
Rg = 12 Ω, RD = 57 Ω,
see fig. 10 b
-
22
-
-
20
-
-
16
-
f = 1 MHz, open drain
2.7
-
10.9
-
-
5.5
-
-
22
pF
nC
ns
Ω
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Pulsed diode forward current a
ISM
Body diode voltage
VSD
Body diode reverse recovery time
trr
Body diode reverse recovery charge
Qrr
Forward turn-on time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 5.5 A, VGS = 0 V b
TJ = 25 °C, IF = 3.5 A, dI/dt = 100 A/μs b
-
-
1.6
V
-
370
550
ns
-
1.6
2.4
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS
S21-0853-Rev. C, 16-Aug-2021
Document Number: 91045
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF730A
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Vishay Siliconix
102
ID, Drain-to-Source Current (A)
VGS
Top
15 V
10 V
8.0 V
10
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
1
0.1
4.5 V
20 µs Pulse Width
TC = 25 °C
10-2
0.1
1
102
10
VDS, Drain-to-Source Voltage (V)
91045_01
RDS(on), Drain-to-Source On Resistance
(Normalized)
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
2.5
ID = 5.5 A
VGS = 10 V
2.0
1.5
1.0
0.5
0.0
- 60 - 40 - 20 0
20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
91045_04
Fig. 4 - Normalized On-Resistance vs. Temperature
Fig. 1 - Typical Output Characteristics
102
105
VGS
15 V
10 V
8.0 V
10
7.0 V
6.0 V
5.5 V
5.0 V
1
Bottom 4.5 V
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
4.5 V
0.1
104
C, Capacitance (pF)
ID, Drain-to-Source Current (A)
Top
102
Coss
Crss
20 µs Pulse Width
TC = 150 °C
1
102
10
1
VDS, Drain-to-Source Voltage (V)
91045_02
1
VDS, Drain-to-Source Voltage (V)
20
TJ = 25 °C
1
20 µs Pulse Width
VDS = 50 V
0.1
4.0
5.0
6.0
7.0
8.0
9.0
Fig. 3 - Typical Transfer Characteristics
ID = 5.5 A
VDS = 320 V
16
VDS = 200 V
VDS = 80 V
12
8
4
For test circuit
see figure 13
0
0
10.0
VGS, Gate-to-Source Voltage (V)
S21-0853-Rev. C, 16-Aug-2021
VGS, Gate-to-Source Voltage (V)
TJ = 150 °C
103
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
102
10
102
10
91045_05
Fig. 2 - Typical Output Characteristics
ID, Drain-to-Source Current (A)
Ciss
10
10-2
0.1
91045_03
103
91045_06
5
10
15
20
25
QG, Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Document Number: 91045
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF730A
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Vishay Siliconix
6.0
ISD, Reverse Drain Current (A)
102
ID, Drain Current (A)
5.0
TJ = 150 °C
10
TJ = 25 °C
1
4.0
3.0
2.0
1.0
VGS = 0 V
0.1
0.4
0.6
0.8
0.0
25
1.2
1.0
VSD, Source-to-Drain Voltage (V)
91045_07
ID, Drain Current (A)
75
100
125
150
TC, Case Temperature (°C)
91045_09
Fig. 7 - Typical Source-Drain Diode Forward Voltage
102
50
Fig. 9 - Maximum Drain Current vs. Case Temperature
RD
VDS
Operation in this area limited
by RDS(on)
VGS
10 µs
D.U.T.
Rg
10
+
- VDD
100 µs
10 V
Pulse width ≤ 1 μs
Duty factor ≤ 0.1 %
1 ms
1
10 ms
Fig. 10 - Switching Time Test Circuit
TC = 25 °C
TJ = 150 °C
Single Pulse
0.1
VDS
102
10
103
90 %
VDS, Drain-to-Source Voltage (V)
91045_08
Fig. 8 - Maximum Safe Operating Area
10 %
VGS
td(on)
td(off)
tr
tf
Fig. 11 - Switching Time Waveforms
Thermal Response (ZthJC)
10
1
D = 0.5
0.2
0.1
PDM
0.1
0.05
0.02
0.01
t1
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
Single Pulse
(Thermal Response)
10-2
10-5
91045_11
S21-0853-Rev. C, 16-Aug-2021
10-4
10-3
10-2
0.1
1
t1, Rectangular Pulse Duration (s)
Document Number: 91045
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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IRF730A
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Vishay Siliconix
Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
610
VDS
Vary tp to obtain
required IAS
D.U.T.
Rg
+
- VDD
IAS
10 V
tp
0.01 Ω
VDSav, Avalanche Voltage (V)
L
600
590
580
570
560
550
540
Fig. 13 - Unclamped Inductive Test Circuit
0.0
2.0
1.0
3.0
4.0
5.0
6.0
IAV, Avalanche Current (A)
91045_12d
Fig. 16 - Typical Drain Source Voltage
vs. Avalanche Current
VDS
tp
VDD
VDS
Qg
VGS
Qgs
IAS
Qgd
VG
Fig. 14 - Unclamped Inductive Waveforms
EAS, Single Pulse Avalanche Energy (mJ)
Charge
700
ID
2.5 A
3.5 A
Bottom 5.5 A
Top
600
500
Fig. 17 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
400
300
50 kΩ
200
12 V
0.2 μF
0.3 μF
100
+
D.U.T.
-
VDS
0
25
91045_12c
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
VGS
3 mA
Fig. 15 - Maximum Avalanche Energy vs. Drain Current
IG
ID
Current sampling resistors
Fig. 18 - Gate Charge Test Circuit
S21-0853-Rev. C, 16-Aug-2021
Document Number: 91045
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF730A
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Vishay Siliconix
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
3
+
2
-
-
4
+
1
Rg
•
•
•
•
1 Driver gate drive
Period
P.W.
+
V
- DD
dv/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
D=
P.W.
Period
V GS = 10 V a
2
D.U.T. ISD waveform
Reverse
recovery
current
3 D.U.T. VDS
Body diode forward
current
di/dt
waveform
Diode recovery
dv/dt
Re-applied
voltage
V DD
Body diode forward drop
4 Inductor current
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 19 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91045.
S21-0853-Rev. C, 16-Aug-2021
Document Number: 91045
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Revision: 01-Jan-2023
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Document Number: 91000