IRF820ALPBF

IRF820AS, SiHF820AS, IRF820AL, SiHF820AL www.vishay.com Vishay Siliconix Power MOSFET FEATURES D G G • Low Gate Charge Qg Results in Simple Drive Requirement • Improved Gate, Avalanche and Dynamic dV/dt Available Ruggedness • Fully Characterized Capacitance and Avalanche Available Voltage and Current • Effective Coss specified • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 D2PAK (TO-263) I2PAK (TO-262) D S G D S S N-Channel MOSFET APPLICATIONS • Switch Mode Power Supply (SMPS) • Uninterruptible Power Supply • High Speed Power Switching PRODUCT SUMMARY VDS (V) RDS(on) (Max.) (Ω) 500 VGS = 10 V 3.0 Qg (Max.) (nC) 17 Qgs (nC) 4.3 Qgd (nC) Configuration TYPICAL SMPS TOPOLOGIES • Two Transistor Forward • Half Bridge and Full Bridge 8.5 Single ORDERING INFORMATION D2PAK (TO-263) Package Lead (Pb)-free and Halogen-free SiHF820AS-GE3 Lead (Pb)-free IRF820ASPbF I2PAK (TO-262) SiHF820AL-GE3 IRF820ALPbF ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT VDS VGS 500 ± 30 2.5 1.6 10 0.4 140 2.5 5.0 50 3.4 - 55 to + 150 300d 10 1.1 Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta, e Linear Derating Factor Single Pulse Avalanche Energyb, e Avalanche Currenta Repetiitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc, e Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque VGS at 10 V TC = 25 °C TC = 100 °C ID IDM TC = 25 °C for 10 s 6-32 or M3 screw EAS IAR EAR PD dV/dt TJ, Tstg UNIT V A W/°C mJ A mJ W V/ns °C lbf · in N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 45 mH, Rg = 25 Ω, IAS = 2.5 A (see fig. 12). c. ISD ≤ 2.5 A, dI/dt ≤ 270 A/μs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. e. Uses IRF820A, SiHF820A data and test conditions. Note * This datasheet provides information about parts that are RoHS-compliant and / or parts that are non RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details S21-0901-Rev. D, 30-Aug-2021 Document Number: 91058 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF820AS, SiHF820AS, IRF820AL, SiHF820AL www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient (PCB Mounted, steady-state)a RthJA - 62 Maximum Junction-to-Case (Drain) RthJC - 2.5 UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS VDS VGS = 0, ID = 250 μA MIN. TYP. MAX. UNIT 500 - - V Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance ΔVDS/TJ VGS(th) Reference to 25 °C, ID = 1 - 0.60 - V/°C VDS = VGS, ID = 250 μA 2.0 - 4.5 V nA IGSS IDSS RDS(on) gfs mAd VGS = ± 30 V - - ± 100 VDS = 500 V, VGS = 0 V - - 25 VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 250 - - 3.0 Ω 1.4 - - S - 340 - - 53 - - 2.7 - VDS = 1.0 V, f = 1.0 MHz - 490 - VDS = 400 V, f = 1.0 MHz - 15 - - 28 - - - 17 ID = 1.5 Ab VGS = 10 V VDS = 50 V, ID = 1.5 Ad μA Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Output Capacitance Coss Effective Output Capacitance VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5d VGS = 0 V Coss eff. VDS = 0 V to 400 Vc, d Total Gate Charge Qg Gate-Source Charge Qgs - - 4.3 Gate-Drain Charge Qgd - - 8.5 Turn-On Delay Time td(on) - 8.1 - tr - 12 - - 16 - - 13 - - - 2.5 - - 10 Rise Time Turn-Off Delay Time Fall Time td(off) VGS = 10 V ID = 2.5 A, VDS = 400 V, see fig. 6 and 13b, d VDD = 250 V, ID = 2.5 A, Rg = 21 Ω, RD = 97 Ω, see fig. 10b, d tf pF nC ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage IS ISM VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G TJ = 25 °C, IS = 2.5 A, VGS = 0 S Vb TJ = 25 °C, IF = 2.5 A, dI/dt = 100 A/μsb, d - - 1.6 V - 330 500 ns - 760 1140 nC Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS. d. Uses IRF820A/SiHF820A data and test conditions. S21-0901-Rev. D, 30-Aug-2021 Document Number: 91058 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF820AS, SiHF820AS, IRF820AL, SiHF820AL www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 10 VGS Top 15 V 10 V 8.0 V 7.0 V 6.0 V 1 5.5 V 5.0 V Bottom 4.5 V 4.5 V 0.1 20 µs Pulse Width TJ = 25 °C 10-2 0.1 VDS, Drain-to-Source Voltage (V) 91058_01 TJ = 150 °C 1 TJ = 25 °C 0.1 4.0 4.5 V 20 µs Pulse Width TJ = 150 °C 1 91058_02 10 VDS, Drain-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics S21-0901-Rev. D, 30-Aug-2021 RDS(on), Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V 0.1 6.0 7.0 8.0 9.0 Fig. 2 - Typical Transfer Characteristics Top 1 5.0 VGS, Gate-to-Source Voltage (V) 91058_03 Fig. 1 - Typical Output Characteristics 10 20 µs Pulse Width VDS = 50 V 10-2 102 10 1 ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 10 102 91058_04 3.0 2.5 ID = 2.5 A VGS = 10 V 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 3 - Normalized On-Resistance vs. Temperature Document Number: 91058 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF820AS, SiHF820AS, IRF820AL, SiHF820AL www.vishay.com VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd 103 Ciss 102 Coss 10 Crss 10 ISD, Reverse Drain Current (A) C, Capacitance (pF) 104 Vishay Siliconix TJ = 150 °C 1 TJ = 25 °C 1 102 10 103 VDS, Drain-to-Source Voltage (V) 91058_05 VGS, Gate-to-Source Voltage (V) 0.4 0.6 0.8 1.0 1.2 VSD, Source-to-Drain Voltage (V) 91058_07 Fig. 4 - Typical Capacitance vs. Drain-to-Source Voltage 20 VGS = 0 V 0.1 1 Fig. 6 - Typical Source-Drain Diode Forward Voltage 102 ID = 2.5 A Operation in this area limited by RDS(on) ID, Drain Current (A) VDS = 400 V 15 VDS = 250 V VDS = 100 V 10 5 For test circuit see figure 13 0 0 91058_06 4 8 12 Fig. 5 - Typical Gate Charge vs. Gate-to-Source Voltage S21-0901-Rev. D, 30-Aug-2021 10 µs 100 µs 1 1 ms 0.1 TC = 25 °C TJ = 150 °C Single Pulse 10 16 QG, Total Gate Charge (nC) 10 91058_08 10 ms 102 103 104 VDS, Drain-to-Source Voltage (V) Fig. 7 - Maximum Safe Operating Area Document Number: 91058 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF820AS, SiHF820AS, IRF820AL, SiHF820AL www.vishay.com Vishay Siliconix RD VDS VGS 2.5 ID, Drain Current (A) D.U.T. Rg 3.0 + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 2.0 Fig. 10a - Switching Time Test Circuit 1.5 VDS 1.0 90 % 0.5 0.0 25 50 75 100 125 150 10 % VGS TC, Case Temperature (°C) 91058_09 td(on) Fig. 8 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 10 D = 0.50 1 0.20 PDM 0.10 0.05 0.1 t1 0.02 0.01 t2 Single Pulse (Thermal Response) 10-2 10-5 10-4 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC 10-3 10-2 0.1 1 t1, Rectangular Pulse Duration (s) 91058_11 Fig. 9 - Maximum Effective Transient Thermal Impedance, Junction-to-Case VDS 15 V tp L VDS D.U.T Rg IAS 20 V tp Driver + A - VDD IAS 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit S21-0901-Rev. D, 30-Aug-2021 Fig. 12b - Unclamped Inductive Waveforms Document Number: 91058 5 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF820AS, SiHF820AS, IRF820AL, SiHF820AL Vishay Siliconix 300 ID 1.1 A 1.6 A Bottom 2.5 A Top 250 200 150 100 50 0 700 VDSav, Avalanche Voltage (V) EAS, Single Pulse Avalanche Energy (mJ) www.vishay.com 650 600 550 25 75 50 100 125 150 Starting TJ, Junction Temperature (°C) 91058_12c Fig. 12c - Maximum Avalanche Energy vs. Drain Current 0.0 1.0 0.5 2.0 1.5 2.5 IAV, Avalanche Current (A) 91058_12d Fig. 12d - Basic Gate Charge Waveform Current regulator Same type as D.U.T. 50 kΩ QG 10 V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Maximum Avalanche Energy vs. Drain Current S21-0901-Rev. D, 30-Aug-2021 Fig. 13b - Gate Charge Test Circuit Document Number: 91058 6 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF820AS, SiHF820AS, IRF820AL, SiHF820AL www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + + - - Rg • • • • dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 10 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91058. S21-0901-Rev. D, 30-Aug-2021 Document Number: 91058 7 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix TO-263AB (HIGH VOLTAGE) A (Datum A) 3 A 4 4 L1 B A E c2 H Gauge plane 4 0° to 8° 5 D B Detail A Seating plane H 1 2 C 3 C L L3 L4 Detail “A” Rotated 90° CW scale 8:1 L2 B A1 B A 2 x b2 c 2xb E 0.010 M A M B ± 0.004 M B 2xe Plating 5 b1, b3 Base metal c1 (c) D1 4 5 (b, b2) Lead tip MILLIMETERS DIM. MIN. MAX. View A - A INCHES MIN. 4 E1 Section B - B and C - C Scale: none MILLIMETERS MAX. DIM. MIN. INCHES MAX. MIN. MAX. A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 - A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420 6.22 - 0.245 - b 0.51 0.99 0.020 0.039 E1 b1 0.51 0.89 0.020 0.035 e b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110 2.54 BSC 0.100 BSC c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066 c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070 c2 1.14 1.65 0.045 0.065 L3 D 8.38 9.65 0.330 0.380 L4 0.25 BSC 4.78 5.28 0.010 BSC 0.188 0.208 ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body at datum A. 4. Thermal PAD contour optional within dimension E, L1, D1 and E1. 5. Dimension b1 and c1 apply to base metal only. 6. Datum A and B to be determined at datum plane H. 7. Outline conforms to JEDEC outline to TO-263AB. Document Number: 91364 Revision: 15-Sep-08 www.vishay.com 1 Package Information Vishay Siliconix I2PAK (TO-262) (HIGH VOLTAGE) A (Datum A) E B c2 A E A L1 Seating plane D1 D C L2 C B B L A c 3 x b2 E1 A1 3xb Section A - A Base metal 2xe b1, b3 Plating 0.010 M A M B c1 c (b, b2) Lead tip Section B - B and C - C Scale: None MILLIMETERS INCHES MILLIMETERS INCHES DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX. A 4.06 4.83 0.160 0.190 D 8.38 9.65 0.330 0.380 A1 2.03 3.02 0.080 0.119 D1 6.86 - 0.270 - b 0.51 0.99 0.020 0.039 E 9.65 10.67 0.380 0.420 b1 0.51 0.89 0.020 0.035 E1 6.22 - 0.245 - b2 1.14 1.78 0.045 0.070 e b3 1.14 1.73 0.045 0.068 L 13.46 14.10 0.530 0.555 c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.065 c1 0.38 0.58 0.015 0.023 L2 3.56 3.71 0.140 0.146 c2 1.14 1.65 0.045 0.065 2.54 BSC 0.100 BSC ECN: S-82442-Rev. A, 27-Oct-08 DWG: 5977 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost extremes of the plastic body. 3. Thermal pad contour optional within dimension E, L1, D1, and E1. 4. Dimension b1 and c1 apply to base metal only. Document Number: 91367 Revision: 27-Oct-08 www.vishay.com 1 AN826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead 0.420 0.355 0.635 (16.129) (9.017) (10.668) 0.145 (3.683) 0.135 (3.429) 0.200 0.050 (5.080) (1.257) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Document Number: 73397 11-Apr-05 www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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