IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L
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Vishay Siliconix
Power MOSFET
FEATURES
D
I2PAK
D2PAK
(TO-262)
G
G
D
S
•
•
•
•
•
•
•
•
(TO-263)
G
D
S
S
Note
* This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
N-Channel MOSFET
DESCRIPTION
PRODUCT SUMMARY
VDS (V)
RDS(on) ()
Surface-mount (IRFBF20S, SiHFBF20S)
Low-profile through-hole (IRFBF20L, SiHFBF20L)
Available in tape and reel (IRFBF20S, SiHFBF20S)
Available
Dynamic dV/dt rating
150 °C operating temperature
Fast switching
Available
Fully avalanche rated
Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
Third generation power MOSFETs form Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The D2PAK is a surface-mount power package capable of
the accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible
on-resistance in any existing surface-mount package. The
D2PAK is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0 W in a typical surface-mount application. The
through-hole version (IRFBF20L, SiHFBF20L) is available for
low-profile applications.
900
VGS = 10 V
8.0
Qg max. (nC)
38
Qgs (nC)
4.7
Qgd (nC)
Configuration
21
Single
ORDERING INFORMATION
Package
D2PAK (TO-263)
D2PAK (TO-263)
Lead (Pb)-free and Halogen-free
SiHFBF20S-GE3
SiHFBF20STRL-GE3
Lead (Pb)-free
IRFBF20SPbF
IRFBF20STRLPbF a
D2PAK (TO-263)
a
I2PAK (TO-262)
SiHFBF20STRR-GE3 a
SiHFBF20L-GE3
IRFBF20STRRPbF a
IRFBF20LPbF
Note
a. See device orientation
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
Drain-source voltage e
Gate-source voltage e
Continuous drain current
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed drain current a, e
Linear derating factor
Single pulse avalanche energy b, e
Repetitive avalanche current a
Repetitive avalanche energy a
Maximum power dissipation
SYMBOL
LIMIT
VDS
VGS
900
± 20
1.7
1.1
6.8
0.43
180
1.7
5.4
54
3.1
1.5
-55 to +150
300
10
ID
IDM
EAS
IAR
EAR
TC = 25 °C
TA = 25 °C
PD
Peak diode recovery dV/dt c, e
dV/dt
Operating junction and storage temperature range
TJ, Tstg
for 10 s
Soldering recommendations (peak temperature) d
Mounting torque
6-32 or M3 screw
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. VDD = 50 V; starting TJ = 25 °C, L = 117 mH, Rg = 25 , IAS = 1.7 A (see fig. 12)
c. ISD 1.7 A, dI/dt 70 A/μs, VDD VDS, TJ 150 °C
d. 1.6 mm from case
e. Uses IRFBF20, SiHFBF20 data and test conditions
S20-0238-Rev. C, 13-Apr-2020
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
N
Document Number: 91121
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L
www.vishay.com
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum junction-to-ambient (PCB
mounted, steady-state) a
RthJA
-
40
Maximum junction-to-case
RthJC
-
2.3
UNIT
°C/W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material)
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-source breakdown voltage
VDS temperature coefficient
Gate-source threshold voltage
VDS
VGS = 0, ID = 250 μA
900
-
-
V
VDS/TJ
Reference to 25 °C, ID = 1 mA
-
1.1
-
mV/°C
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
Gate-source leakage
IGSS
VGS = ± 20 V
-
-
± 100
nA
Zero gate voltage drain current
IDSS
VDS = 900 V, VGS = 0 V
-
-
100
VDS = 720 V, VGS = 0 V, TJ = 125 °C
-
-
500
Drain-source on-state resistance
Forward transconductance
μA
-
-
8.0
gfs
VDS = 50 V, ID = 1.0 A b
0.6
-
-
S
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-
490
-
-
55
-
-
18
-
-
-
38
RDS(on)
ID = 1.0 A b
VGS = 10 V
Dynamic
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
Total gate charge
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
Turn-on delay time
td(on)
Rise time
Turn-off delay time
tr
td(off)
Fall time
tf
Gate input resistance
Rg
VGS = 10 V
ID = 1.7 A, VDS = 360 V,
see fig. 6 and 13 b
-
-
4.7
-
-
21
-
8.0
-
VDD = 450 V, ID = 1.7 A,
Rg = 18 , VGS = 10 V, see fig. 10 b
-
21
-
-
56
-
-
32
-
f = 1 MHz, open drain
0.6
-
3.4
-
-
1.7
-
-
6.8
pF
nC
ns
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Pulsed diode forward current a
ISM
Body diode voltage
VSD
Body diode reverse recovery time
trr
Body diode reverse recovery charge
Qrr
Forward turn-on time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 1.7 A, VGS = 0 V b
TJ = 25 °C, IF = 1.7 A, dI/dt = 100 A/μs b
-
-
1.5
V
-
350
530
ns
-
0.85
1.3
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width 300 μs; duty cycle 2 %
c. Uses IRFBF20/SiHFBF20 data and test conditions
S20-0238-Rev. C, 13-Apr-2020
Document Number: 91121
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Fig. 2 - Typical Output Characteristics
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 3 - Typical Transfer Characteristics
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
S20-0238-Rev. C, 13-Apr-2020
Document Number: 91121
3
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
RD
VDS
VGS
D.U.T.
Rg
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
Fig. 7 - Typical Source-Drain Diode Forward Voltage
10 %
VGS
td(on)
tr
td(off) tf
Fig. 11 - Switching Time Waveforms
Fig. 8 - Maximum Safe Operating Area
Fig. 9 - Maximum Drain Current vs. Case Temperature
S20-0238-Rev. C, 13-Apr-2020
Document Number: 91121
4
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
Vary tp to obtain
required IAS
VDS
VDS
tp
VDD
Rg
D.U.T.
+
-
IAS
V DD
VDS
10 V
tp
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
IAS
Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
S20-0238-Rev. C, 13-Apr-2020
Document Number: 91121
5
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L
www.vishay.com
Vishay Siliconix
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
S20-0238-Rev. C, 13-Apr-2020
Fig. 13b - Gate Charge Test Circuit
Document Number: 91121
6
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L
www.vishay.com
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91121.
S20-0238-Rev. C, 13-Apr-2020
Document Number: 91121
7
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
TO-263AB (HIGH VOLTAGE)
A
(Datum A)
3
A
4
4
L1
B
A
E
c2
H
Gauge
plane
4
0° to 8°
5
D
B
Detail A
Seating plane
H
1
2
C
3
C
L
L3
L4
Detail “A”
Rotated 90° CW
scale 8:1
L2
B
A1
B
A
2 x b2
c
2xb
E
0.010 M A M B
± 0.004 M B
2xe
Plating
5
b1, b3
Base
metal
c1
(c)
D1
4
5
(b, b2)
Lead tip
MILLIMETERS
DIM.
MIN.
MAX.
View A - A
INCHES
MIN.
4
E1
Section B - B and C - C
Scale: none
MILLIMETERS
MAX.
DIM.
MIN.
INCHES
MAX.
MIN.
MAX.
A
4.06
4.83
0.160
0.190
D1
6.86
-
0.270
-
A1
0.00
0.25
0.000
0.010
E
9.65
10.67
0.380
0.420
6.22
-
0.245
-
b
0.51
0.99
0.020
0.039
E1
b1
0.51
0.89
0.020
0.035
e
b2
1.14
1.78
0.045
0.070
H
14.61
15.88
0.575
0.625
b3
1.14
1.73
0.045
0.068
L
1.78
2.79
0.070
0.110
2.54 BSC
0.100 BSC
c
0.38
0.74
0.015
0.029
L1
-
1.65
-
0.066
c1
0.38
0.58
0.015
0.023
L2
-
1.78
-
0.070
c2
1.14
1.65
0.045
0.065
L3
D
8.38
9.65
0.330
0.380
L4
0.25 BSC
4.78
5.28
0.010 BSC
0.188
0.208
ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.
4. Thermal PAD contour optional within dimension E, L1, D1 and E1.
5. Dimension b1 and c1 apply to base metal only.
6. Datum A and B to be determined at datum plane H.
7. Outline conforms to JEDEC outline to TO-263AB.
Document Number: 91364
Revision: 15-Sep-08
www.vishay.com
1
Package Information
Vishay Siliconix
I2PAK (TO-262) (HIGH VOLTAGE)
A
(Datum A)
E
B
c2
A
E
A
L1
Seating
plane
D1
D
C
L2
C
B
B
L
A
c
3 x b2
E1
A1
3xb
Section A - A
Base
metal
2xe
b1, b3
Plating
0.010 M A M B
c1
c
(b, b2)
Lead tip
Section B - B and C - C
Scale: None
MILLIMETERS
INCHES
MILLIMETERS
INCHES
DIM.
MIN.
MAX.
MIN.
MAX.
DIM.
MIN.
MAX.
MIN.
MAX.
A
4.06
4.83
0.160
0.190
D
8.38
9.65
0.330
0.380
A1
2.03
3.02
0.080
0.119
D1
6.86
-
0.270
-
b
0.51
0.99
0.020
0.039
E
9.65
10.67
0.380
0.420
b1
0.51
0.89
0.020
0.035
E1
6.22
-
0.245
-
b2
1.14
1.78
0.045
0.070
e
b3
1.14
1.73
0.045
0.068
L
13.46
14.10
0.530
0.555
c
0.38
0.74
0.015
0.029
L1
-
1.65
-
0.065
c1
0.38
0.58
0.015
0.023
L2
3.56
3.71
0.140
0.146
c2
1.14
1.65
0.045
0.065
2.54 BSC
0.100 BSC
ECN: S-82442-Rev. A, 27-Oct-08
DWG: 5977
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost
extremes of the plastic body.
3. Thermal pad contour optional within dimension E, L1, D1, and E1.
4. Dimension b1 and c1 apply to base metal only.
Document Number: 91367
Revision: 27-Oct-08
www.vishay.com
1
AN826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead
0.420
0.355
0.635
(16.129)
(9.017)
(10.668)
0.145
(3.683)
0.135
(3.429)
0.200
0.050
(5.080)
(1.257)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
Document Number: 73397
11-Apr-05
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1
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particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
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including but not limited to the warranty expressed therein.
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Revision: 01-Jan-2019
1
Document Number: 91000