IRFR9014, IRFU9014, SiHFR9014, SiHFU9014
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Vishay Siliconix
Power MOSFET
FEATURES
S
DPAK
(TO-252)
•
•
•
•
•
•
•
•
IPAK
(TO-251)
G
D
D
G
S
G
D S
D
P-Channel MOSFET
DESCRIPTION
PRODUCT SUMMARY
VDS (V)
RDS(on) (Ω)
Dynamic dV/dt rating
Repetitive avalanche rated
Surface mount (IRFR9014, SiHFR9014)
Straight lead (IRFU9014, SiHFU9014)
Available in tape and reel
Available
P-channel
Fast switching
Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The DPAK is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU, SiHFU series) is for through-hole
mounting applications. Power dissipation levels up to 1.5 W
are possible in typical surface-mount applications.
-60
VGS = -10 V
0.50
Qg max. (nC)
12
Qgs (nC)
3.8
Qgd (nC)
5.1
Configuration
Single
ORDERING INFORMATION
Package
Lead (Pb)-free and halogen-free
Lead (Pb)-free
DPAK (TO-252)
DPAK (TO-252)
DPAK (TO-252)
IPAK (TO-251)
SiHFR9014-GE3
SiHFR9014TRL-GE3 a
SiHFR9014TR-GE3 a
SiHFU9014-GE3
IRFR9014PbF-BE3
IRFR9014TRLPbF-BE3
IRFR9014TRPbF-BE3
-
IRFR9014PbF
IRFR9014TRLPbF a
IRFR9014TRPbF a
IRFU9014PbF
Note
a. See device orientation
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-source voltage
VDS
-60
Gate-source voltage
VGS
± 20
Continuous drain current
VGS at 5 V
TC = 25 °C
TC = 100 °C
Pulsed drain current a
ID
IDM
UNIT
V
-5.1
-3.2
A
-20
Linear derating factor
0.20
Linear derating factor (PCB mount) e
0.020
W/°C
Single pulse avalanche energy b
EAS
140
Repetitive avalanche current a
IAR
-5.1
A
Repetitive avalanche energy a
EAR
2.5
mJ
Maximum power dissipation
TC = 25 °C
Maximum power dissipation (PCB mount) e
TA = 25 °C
Peak diode recovery dV/dt c
Operating junction and storage temperature range
Soldering recommendations (peak temperature) d
For 10 s
PD
25
2.5
dV/dt
-4.5
TJ, Tstg
-55 to +150
260
mJ
W
V/ns
°C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. VDD = - 25 V, starting TJ = 25 °C, L = 6.3 mH, Rg = 25 Ω, IAS = - 5.1 A (see fig. 12)
c. ISD ≤ - 6.7 A, dI/dt ≤ 90 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
d. 1.6 mm from case
e. When mounted on 1" square PCB (FR-4 or G-10 material)
S21-0771-Rev. F, 19-Jul-2021
Document Number: 91277
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For technical questions, contact: hvm@vishay.com
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THERMAL RESISTANCE RATINGS
SYMBOL
MIN.
TYP.
MAX.
Maximum junction-to-ambient
PARAMETER
RthJA
-
-
110
Maximum junction-to-ambient
(PCB mount) a
RthJA
-
-
50
Maximum junction-to-case (drain)
RthJC
-
-
5.0
UNIT
°C/W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material)
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-source breakdown voltage
VDS temperature coefficient
Gate-source threshold voltage
Gate-source leakage
Zero gate voltage drain current
Drain-source on-state resistance
Forward transconductance
VDS
ΔVDS/TJ
VGS(th)
IGSS
IDSS
RDS(on)
VGS = 0 V, ID = - 250 μA
Reference to 25 °C, ID = -1 mA
VDS = VGS, ID = -250 μA
-60
-
-
V
-
-0.059
-
V/°C
-2.0
-
-4.0
V
nA
VGS = ± 20 V
-
-
± 100
VDS = -60 V, VGS = 0 V
-
-
-100
VDS = -48 V, VGS = 0 V, TJ = 125 °C
-
-
-500
-
-
0.50
Ω
1.4
-
-
S
VGS = -10 V
ID = -3.1 A b
gfs
VDS = -25 V, ID = -3.1 A b
VGS = 0 V,
VDS = -25 V,
f = 1.0 MHz, see fig. 5
μA
Dynamic
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
Total gate charge
Qg
Gate-source charge
Qgs
-
-
3.8
Gate-drain charge
Qgd
-
-
5.1
Turn-on delay time
td(on)
-
11
-
tr
-
63
-
-
9.6
-
-
31
-
-
4.5
-
-
7.5
-
-
-
-5.1
-
-
-20
-
-
-5.5
V
-
80
160
ns
-
0.096
0.19
μC
Rise time
Turn-off delay time
td(off)
Fall time
tf
Internal drain inductance
LD
Internal source inductance
LS
VGS = - 10 V
ID = -6.7 A, VDS = -48 V,
see fig. 6 and 13 b
VDD = -30 V, ID = -6.7 A,
Rg = 24 Ω, RD = 4.0 Ω, see fig. 10 b
Between lead,
6 mm (0.25") from
package and center of
die contact c
D
G
-
270
-
-
170
-
-
31
-
-
-
12
pF
nC
ns
nH
S
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
Pulsed diode forward current a
Body diode voltage
IS
ISM
VSD
Body diode reverse recovery time
trr
Body diode reverse recovery charge
Qrr
Forward turn-on time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
G
A
S
TJ = 25 °C, IS = -5.1 A, VGS = 0 V b
TJ = 25 °C, IF = -6.7 A, dI/dt = 100 A/μs b
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
S21-0771-Rev. F, 19-Jul-2021
Document Number: 91277
2
For technical questions, contact: hvm@vishay.com
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
S21-0771-Rev. F, 19-Jul-2021
Document Number: 91277
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www.vishay.com
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Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
S21-0771-Rev. F, 19-Jul-2021
Document Number: 91277
4
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IRFR9014, IRFU9014, SiHFR9014, SiHFU9014
www.vishay.com
Vishay Siliconix
RD
VDS
VGS
D.U.T.
Rg
+VDD
- 10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
td(on)
tr
td(off) tf
VGS
10 %
90 %
VDS
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
S21-0771-Rev. F, 19-Jul-2021
Document Number: 91277
5
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR9014, IRFU9014, SiHFR9014, SiHFU9014
www.vishay.com
Vishay Siliconix
L
Vary tp to obtain
required IAS
IAS
VDS
D.U.T.
Rg
VDS
+ V DD
VDD
IAS
tp
- 10 V
0.01 Ω
tp
Fig. 12a - Unclamped Inductive Test Circuit
VDS
Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
- 10 V
12 V
0.2 µF
0.3 µF
QGS
-
QGD
D.U.T.
VG
+ VDS
VGS
- 3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
S21-0771-Rev. F, 19-Jul-2021
Fig. 13b - Gate Charge Test Circuit
Document Number: 91277
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IRFR9014, IRFU9014, SiHFR9014, SiHFU9014
www.vishay.com
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
D.U.T.
+
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
+
-
-
Rg
• dV/dt controlled by Rg
• ISD controlled by duty factor “D”
• D.U.T. - device under test
+
-
VDD
Note
• Compliment N-Channel of D.U.T. for driver
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = - 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = - 5 V for logic level and - 3 V drive devices
Fig. 14 - For P-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91277.
S21-0771-Rev. F, 19-Jul-2021
Document Number: 91277
7
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
TO-252AA Case Outline
VERSION 1: FACILITY CODE = Y
E
A
C2
H
D
D1
L3
b3
e
b2
e1
L
gage plane height (0.5 mm)
L4
b
L5
E1
C
A1
MILLIMETERS
DIM.
MIN.
A
2.18
MAX.
2.38
A1
-
0.127
b
0.64
0.88
b2
0.76
1.14
b3
4.95
5.46
C
0.46
0.61
C2
0.46
0.89
D
5.97
6.22
D1
4.10
-
E
6.35
6.73
E1
4.32
-
H
9.40
10.41
e
2.28 BSC
e1
4.56 BSC
L
1.40
1.78
L3
0.89
1.27
L4
-
1.02
L5
1.01
1.52
Note
• Dimension L3 is for reference only
Revision: 03-Oct-2022
Document Number: 71197
1
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
VERSION 2: FACILITY CODE = N
E
e
A
b3
E1
E1/2
c2
θ
e
L4
L5
L6
H
D
L3
D1
θ
0.25
(3°)
DETAIL "B"
C A B
(3°)
DETAIL "B"
A1
C
L
(L1)
b1
SEATING
C
PLANE
θ
L2
GAUGE
PLANE
H
C
(b)
c1
3x b
2x e
c
2x b2
MILLIMETERS
MILLIMETERS
DIM.
A
MIN.
2.18
MAX.
DIM.
MIN.
2.39
L
1.50
A1
-
0.13
L1
b
0.65
0.89
L2
MAX.
1.78
2.74 ref.
0.51 BSC
b1
0.64
0.79
L3
b2
0.76
1.13
L4
-
1.02
b3
4.95
5.46
L5
1.14
1.49
c
0.46
0.61
L6
0.65
0.85
c1
0.41
0.56
0°
10°
1
0°
15°
2
25°
35°
c2
0.46
0.60
D
5.97
6.22
D1
5.21
-
E
6.35
6.73
E1
4.32
e
H
2.29 BSC
9.94
0.89
1.27
Notes
• Dimensioning and tolerance confirm to ASME Y14.5M-1994
• All dimensions are in millimeters. Angles are in degrees
• Heat sink side flash is max. 0.8 mm
• Radius on terminal is optional
10.34
ECN: E22-0399-Rev. R, 03-Oct-2022
DWG: 5347
Revision: 03-Oct-2022
Document Number: 71197
2
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
Case Outline for TO-251AA (High Voltage)
OPTION 1:
4
E1
3
E
Thermal PAD
4
b4
θ2
4
A
0.010 0.25 M C A B
L2 4
c2
A
θ1
B
D
D1
A
C
3
Seating
plane
5
C
L1 L3
(Datum A)
C
L
B
B
A
A1
3 x b2
View A - A
2xe
c
3xb
0.010 0.25 M C A B
Plating
5
b1, b3
Base
metal
Lead tip
5
c1
(c)
(b, b2)
Section B - B and C - C
MILLIMETERS
INCHES
MILLIMETERS
INCHES
DIM.
MIN.
MAX.
MIN.
MAX.
DIM.
MIN.
MAX.
MIN.
A
2.18
2.39
0.086
0.094
D1
5.21
-
0.205
MAX.
-
A1
0.89
1.14
0.035
0.045
E
6.35
6.73
0.250
0.265
4.32
-
0.170
-
b
0.64
0.89
0.025
0.035
E1
b1
0.65
0.79
0.026
0.031
e
b2
0.76
1.14
0.030
0.045
L
8.89
9.65
0.350
0.380
b3
0.76
1.04
0.030
0.041
L1
1.91
2.29
0.075
0.090
b4
4.95
5.46
0.195
0.215
L2
0.89
1.27
0.035
0.050
c
0.46
0.61
0.018
0.024
L3
1.14
1.52
0.045
0.060
c1
0.41
0.56
0.016
0.022
1
0'
15'
0'
15'
c2
0.46
0.86
0.018
0.034
2
25'
35'
25'
35'
D
5.97
6.22
0.235
0.245
2.29 BSC
2.29 BSC
ECN: E21-0682-Rev. C, 27-Dec-2021
DWG: 5968
Notes
• Dimensioning and tolerancing per ASME Y14.5M-1994
• Dimension are shown in inches and millimeters
• Dimension D and E do not include mold flash. Mold flash shall not exceed 0.13 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
• Thermal pad contour optional with dimensions b4, L2, E1 and D1
• Lead dimension uncontrolled in L3
• Dimension b1, b3 and c1 apply to base metal only
• Outline conforms to JEDEC® outline TO-251AA
Revision: 27-Dec-2021
Document Number: 91362
1
For technical questions, contact: hvmos.techsupport@vishay.com
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
OPTION 2: FACILITY CODE = N
E
A
L2
b4
c2
E1
D2
θ1
CL
L4
θ1
D
D1
Ø 1.00
x 0.10 deep
C
B
B
L
L3
L1
C
b2
A1
b
b1, b3
c
c
e
c1
θ2
Third angle
projection
b, b2
Section “B-B” and “C-C”
DIM.
MIN.
NOM.
MAX.
DIM.
MIN.
NOM.
A
2.180
2.285
2.390
D2
5.380
-
MAX.
-
A1
0.890
1.015
1.140
E
6.350
6.540
6.730
4.32
-
-
b
0.640
0.765
0.890
E1
b1
0.640
0.715
0.790
e
b2
0.760
0.950
1.140
L
8.890
9.270
9.650
b3
0.760
0.900
1.040
L1
1.910
2.100
2.290
b4
4.950
5.205
5.460
L2
0.890
1.080
1.270
c
0.460
-
0.610
L3
1.140
1.330
1.520
c1
0.410
-
0.560
L4
1.300
1.400
1.500
c2
0.460
-
0.610
1
0°
7.5°
15°
D
5.970
6.095
6.220
2
4°
-
-
D1
4.300
-
-
2.29 BSC
ECN: E21-0682-Rev. C, 27-Dec-2021
DWG: 5968
Notes
• Dimensioning and tolerancing per ASME Y14.5M-1994
• All dimension are in millimeters, angles are in degrees
• Heat sink side flash is max. 0.8 mm
Revision: 27-Dec-2021
Document Number: 91362
2
For technical questions, contact: hvmos.techsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR DPAK (TO-252)
0.224
0.243
0.087
(2.202)
0.090
(2.286)
(10.668)
0.420
(6.180)
(5.690)
0.180
0.055
(4.572)
(1.397)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
Return to Index
APPLICATION NOTE
Document Number: 72594
Revision: 21-Jan-08
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Product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited
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