IRLL014

IRLL014, SiHLL014 www.vishay.com Vishay Siliconix Power MOSFET D FEATURES S • • • • • • • • SOT-223 G D G D S Surface-mount Available in tape and reel Dynamic dV/dt rating Logic-level gate drive RDS(on) specified at VGS = 4 V and 5 V Available Fast switching Ease of paralleling Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 N-Channel MOSFET DESCRIPTION Marking code: LA Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SOT-223 package is designed for surface-mounting using vapor phase, infrared, or wave soldering techniques. Its unique package design allows for easy automatic pick-and-place as with other SOT or SOIC packages but has the added advantage of improved thermal performance due to an enlarged tab for heatsinking. Power dissipation of greater than 1.25 W is possible in a typical surface mount application. PRODUCT SUMMARY VDS (V) 60 RDS(on) () VGS = 5.0 V Qg max. (nC) 0.20 8.4 Qgs (nC) 3.5 Qgd (nC) 6.0 Configuration Single ORDERING INFORMATION Package SOT-223 SiHLL014TR-GE3 Lead (Pb)-free and halogen-free IRLL014TRPbF-BE3 a, b IRLL014TRPbF a Lead (Pb)-free Notes a. See device orientation b. “-BE3” denotes alternate manufacturing location ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER Drain-source voltage SYMBOL VDS LIMIT 60 Gate-source voltage VGS ± 10 Continuous drain current VGS at 10 V TC = 25 °C TC = 100 °C Pulsed drain current a ID IDM UNIT V 2.7 1.7 A 22 Linear derating factor 0.025 Linear derating factor (PCB mount) e 0.017 W/°C Single pulse avalanche energy b EAS 100 mJ Avalanche current a IAR 2.7 A EAR 0.31 mJ Repetitive avalanche energy a Maximum power dissipation TC = 25 °C Maximum power dissipation (PCB mount) e TA = 25 °C Peak diode recovery dv/dt c Operating junction and storage temperature range Soldering recommendations (peak temperature) d For 10 s PD 3.1 2.0 dV/dt 4.5 TJ, Tstg -55 to +150 300 W V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. VDD = 25 V, starting TJ = 25 °C, L = 16 mH, Rg = 25 , IAS = 2.7 A (see fig. 12) c. ISD  10 A, dI/dt  90 A/μs, VDD  VDS, TJ  150 °C d. 1.6 mm from case e. When mounted on 1" square PCB (FR-4 or G-10 material) S21-0322-Rev. G, 05-Apr-2021 Document Number: 91319 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRLL014, SiHLL014 www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL MIN. TYP. MAX. Maximum junction-to-ambient  (PCB mount) a RthJA - - 60 Maximum junction-to-case (drain) RthJC - - 40 UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material) SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-source breakdown voltage VDS temperature coefficient Gate-source threshold voltage VDS VGS = 0 V, ID = 250 μA 60 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.073 - V/°C VGS(th) VDS = VGS, ID = 250 μA 1.0 - 2.0 V Gate-source leakage IGSS VGS = ± 10 V - - ± 100 nA Zero gate voltage drain current IDSS VDS = 60 V, VGS = 0 V - - 25 VDS = 48 V, VGS = 0 V, TJ = 125 °C - - 250 Drain-source on-state resistance Forward transconductance RDS(on) VGS = 5.0 V ID = 1.6 A b - - 0.20 VGS = 4.0 V ID = 1.4 A b - - 0.28 gfs VDS = 25 V, ID = 1.6 A 3.2 - - VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 400 - - 170 - - 42 - - - 8.4 μA  S Dynamic Input capacitance Ciss Output capacitance Coss Reverse transfer capacitance Crss Total gate charge Qg Gate-source charge Qgs Gate-drain charge Qgd Turn-on delay time td(on) Rise time Turn-off delay time Fall time Internal drain inductance Internal source inductance tr td(off) VGS = 5.0 V ID = 10 A, VDS = 48 V, see fig. 6 and 13 b VDD = 30 V, ID = 10 A, Rg = 12 , RD = 2.8 , see fig. 10 b tf LD LS Between lead, 6 mm (0.25") from package and center of die contact - - 3.5 - - 6.0 - 9.3 - - 110 - - 17 - - 26 - - 4.0 - - 6.0 - - - 2.7 - - 22 pF nC ns D nH G S Drain-Source Body Diode Characteristics Continuous source-drain diode current IS Pulsed diode forward current a ISM Body diode voltage VSD Body diode reverse recovery time trr Body diode reverse recovery charge Qrr Forward turn-on time ton MOSFET symbol showing the  integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 2.7 A, VGS = 0 V b TJ = 25 °C, IF = 10 A, dI/dt = 100 A/μs b - - 1.6 V - 65 130 ns - 0.33 0.65 μC Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. Pulse width  300 μs; duty cycle  2 % S21-0322-Rev. G, 05-Apr-2021 Document Number: 91319 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRLL014, SiHLL014 www.vishay.com Vishay Siliconix VGS Top 7.5 V 5.0 V 4.0 V 3.5 V 3.0 V 2.75 V Bottom 2.5 V 100 ID, Drain Current (A) 101 10-1 2.25 V 10-2 20 µs Pulse Width TC = 25 °C 100 10-1 RDS(on), Drain-to-Source On Resistance (Normalized) TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 101 3.0 ID = 10 A VGS = 10 V 2.5 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 TJ, Junction Temperature (°C) VDS, Drain-to-Source Voltage (V) Fig. 4 - Normalized On-Resistance vs. Temperature 700 V GS Top 7.5 V 5.0 V 4.0 V 101 3.5 V 3.0 V 2.75 V Bottom 2.5 V VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd 600 Capacitance (pF) ID, Drain Current (A) Fig. 1 - Typical Output Characteristics, TC = 25 °C 100 2.25 V 10-1 10-2 100 10-1 500 400 Ciss 300 Coss 200 Crss 100 20 µs Pulse Width TC = 150 °C 0 100 101 Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 10 ID, Drain Current (A) 150 °C 100 25 °C 10-2 20 µs Pulse Width VDS = 25 V 2 2.5 3 3.5 4 4.5 VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics S21-0322-Rev. G, 05-Apr-2021 5 VGS, Gate-to-Source Voltage (V) 101 10-3 101 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) 10-1 20 40 60 80 100 120 140 160 ID = 10 A 6 VDS = 48 V VDS = 30 V 6 4 2 For test circuit see figure 13 0 0 2 4 6 8 10 QG, Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Document Number: 91319 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRLL014, SiHLL014 ISD, Reverse Drain Current (A) www.vishay.com Vishay Siliconix VDS TJ = 150 °C VGS 101 RD D.U.T. Rg 10 V TJ = 25 °C 100 + - VDD Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VGS = 0 V 10-1 0.4 0.8 1.2 1.6 2.4 2.0 VDS 90 % VSD, Source-to-Drain Voltage (V) Fig. 7 - Typical Source-Drain Diode Forward Voltage 10 % VGS 103 td(on) 5 td(off) tf Fig. 10b - Switching Time Waveforms 2 ID, Drain Current (A) tr Operation in this area limited by RDS(on) 102 5 2 10 100 µs 5 1 ms 2 1 10 ms TC = 25 °C TJ = 150 °C Single Pulse 5 2 0.1 0.1 2 5 1 2 5 10 2 5 102 2 5 103 VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area 3.0 ID, Drain Current (A) 2.5 2.0 1.5 1.0 0.5 0.0 25 50 75 100 125 150 TC, Case Temperature (°C) Fig. 9 - Maximum Drain Current vs. Case Temperature S21-0322-Rev. G, 05-Apr-2021 Document Number: 91319 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRLL014, SiHLL014 www.vishay.com Vishay Siliconix Thermal Response (ZthJC) 102 D = 0.50 10 0.20 0.10 0.05 1 PDM 0.02 0.01 t1 Single Pulse (Thermal Response) 10-1 t2 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC 10-2 10-5 10-4 10-3 10-2 0.1 1 102 101 103 t1, Rectangular Pulse Duration (s) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T Rg + - I AS V DD VDS 10 V tp 0.01 Ω IAS Fig. 12b - Unclamped Inductive Waveforms EAS, Single Pulse Avalanche Energy (mJ) Fig. 12a - Unclamped Inductive Test Circuit 250 ID 1.2 A 1.7 A Bottom 2.7 A Top 200 150 100 50 VDD = 25 V 0 25 50 75 100 125 150 Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current S21-0322-Rev. G, 05-Apr-2021 Document Number: 91319 5 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRLL014, SiHLL014 www.vishay.com Vishay Siliconix Current regulator Same type as D.U.T. 50 kΩ QG VGS 0.2 µF 12 V 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive Period P.W. D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91319. S21-0322-Rev. G, 05-Apr-2021 Document Number: 91319 6 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix SOT-223 (HIGH VOLTAGE) B D A 3 0.08 (0.003) B1 C 0.10 (0.004) M C B M A 4 3 H E 0.20 (0.008) M C A M L1 1 2 3 4xL 3xB e θ 0.10 (0.004) M C B M e1 4xC MILLIMETERS INCHES DIM. MIN. MAX. MIN. MAX. A 1.55 1.80 0.061 0.071 0.033 B 0.65 0.85 0.026 B1 2.95 3.15 0.116 0.124 C 0.25 0.35 0.010 0.014 D 6.30 6.70 0.248 0.264 E 3.30 3.70 0.130 e 2.30 BSC e1 4.60 BSC 0.181 BSC H 6.71 7.29 0.264 L 0.91 - 0.036 L1 θ 0.061 BSC - 0.146 0.0905 BSC 0.287 0.0024 BSC 10' - 10' ECN: S-82109-Rev. A, 15-Sep-08 DWG: 5969 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension do not include mold flash. 4. Outline conforms to JEDEC outline TO-261AA. Document Number: 91363 Revision: 15-Sep-08 www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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