LH1262CAC, LH1262CACTR, LH1262CB
www.vishay.com
Vishay Semiconductors
Dual Photovoltaic MOSFET Driver Solid-State Relay
FEATURES
DIP
8
7
6
5
1
2
3
4
•
•
•
•
•
•
SMD
DESIGN SUPPORT TOOLS
High open circuit voltage
High short circuit current
Isolation test voltage 5300 VRMS
Logic compatible input
High reliability
Material categorization: for definitions of
compliance please see www.vishay.com/doc?99912
APPLICATIONS
•
•
•
•
•
•
•
click logo to get started
Models
Available
High-side driver
Solid-state relays
Floating power supply
Power control
Data acquisition
ATE
Isolated switching
AGENCY APPROVALS
DESCRIPTION
• UL1577
The LH1262CB, LH1262CAC photovoltaic MOSFET driver
consists of two LEDs optically coupled to two photodiode
arrays. The photodiode array provides a floating source with
adequate voltage and current to drive high-power MOSFET
transistors. Optical coupling provides a high I/O isolation
voltage. In order to turn the MOSFET off, an external
resistance (gate-to-source) is required for gate discharge.
• DIN EN
• BSI
• CQC
• FIMKO
ORDERING INFORMATION
L
H
1
2
6
PART NUMBER
2
#
ELECTR.
VARIATION
#
#
PACKAGE
CONFIG.
PACKAGE
T
DIP
R
TAPE AND
REEL
7.62 mm
SMD
> 0.1 mm
UL, VDE, BSI, CQC, FIMKO
SMD-8
LH1262CAC
SMD-8, tape and reel
LH1262CACTR
DIP-8
LH1262CB
ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
SYMBOL
VALUE
UNIT
IR ≤ 10 μA
IF
50
mA
VR
5.0
V
Tamb
-40 to +85
°C
Tstg
-40 to +150
°C
TS
270
°C
SSR
LED input ratings continuous forward current
LED input ratings reverse voltage
Ambient operating temperature range
Storage temperature range
Pin soldering time
t = 7.0 s max.
Note
• Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. Functional operation of the device is not
implied at these or any other conditions in excess of those given in the operational sections of this document. Exposure to absolute
maximum ratings for extended periods of the time can adversely affect reliability
Rev. 1.5, 31-Jan-2019
Document Number: 83802
1
For technical questions, contact: optocoupleranswers@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
LH1262CAC, LH1262CACTR, LH1262CB
www.vishay.com
Vishay Semiconductors
ELECTRICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
SYMBOL
MIN.
TYP.
MAX.
UNIT
IF = 10 mA
VF
1.15
1.26
1.45
V
LED forward voltage
Detector forward voltage
IF = 10 μA
VF(PDA)
-
14
-
V
Detector reverse voltage
IR = 2.0 μA
VR(PDA)
-
200
-
V
IF = 5.0 mA
VOC
10
12.95
15
V
IF = 10 mA
VOC
-
13.45
-
V
IF = 20 mA
VOC
-
13.92
-
V
IF = 5.0 mA
ISC
1.0
1.6
6.5
μA
IF = 10 mA
ISC
2.6
3.4
14
μA
IF = 20 mA
ISC
-
6.9
-
μA
Open circuit voltage (pins 5, 6 or 7, 8)
Short circuit current (pins 5, 6 or 7, 8)
Note
• Minimum and maximum values are testing requirements. Typical values are characteristics of the device and are the result of engineering
evaluations. Typical values are for information only and are not part of the testing requirements
SWITCHING CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
SYMBOL
MIN.
TYP.
MAX.
UNIT
Turn-on time
IF = 20 mA (1)
ton
-
35
-
μs
Turn-off time
IF = 20 mA (1)
toff
-
90
-
μs
Note
(1) f = 1.0 kHz, pulse width = 100 μs, load (R ) = 1.0 MΩ, 15 pF; measured at 90 % rated voltage (t ), 10 % rated voltage (t ). Actuation speed
L
on
off
depends upon the external ton and toff circuitry and the capacitance of the MOSFET
SAFETY AND INSULATION RATINGS
PARAMETER
TEST CONDITION
Climatic classification
According to IEC 68 part 1
Pollution degree
According to DIN VDE 0109
Comparative tracking index
Maximum rated withstanding isolation voltage
SYMBOL
VALUE
UNIT
40 / 85 / 21
2
Insulation group IIIa
CTI
175
According to UL1577, t = 1 min
VISO
5300
VRMS
Tested withstanding isolation voltage
According to UL1577, t = 1 s
VISO
4420
VRMS
Maximum transient isolation voltage
According to DIN EN 60747-5-5
VIOTM
8000
Vpeak
Maximum repetitive peak isolation voltage
According to DIN EN 60747-5-5
VIORM
890
Vpeak
VIO = 500 V, Tamb = 25 °C
RIO
≥
VIO = 500 V, Tamb = 100 °C
RIO
≥ 1011
VIO = 500 V, Tamb = TS
RIO
≥ 109
Ω
PSO
700
mW
Input safety current
ISI
300
mA
Safety temperature
TS
175
°C
≥7
mm
≥7
mm
≥8
mm
≥8
mm
≥ 0.4
mm
Isolation resistance
Output safety power
Creepage distance (DIP)
Clearance distance (DIP)
Creepage distance (SMD)
Clearance distance (SMD)
Insulation thickness
DIP-8
SMD-8
DTI
1012
Ω
Ω
Note
• As per IEC 60747-5-5, § 7.4.3.8.2, this optocoupler is suitable for “safe electrical insulation” only within the safety ratings. Compliance with
the safety ratings shall be ensured by means of protective circuits
Rev. 1.5, 31-Jan-2019
Document Number: 83802
2
For technical questions, contact: optocoupleranswers@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
LH1262CAC, LH1262CACTR, LH1262CB
www.vishay.com
Vishay Semiconductors
FUNCTIONAL DESCRIPTION
Figure 1 outlines the IV characteristics of the illuminated photodiode array (PDA). For operation at voltages below VOC, the PDA
acts as a nearly constant current source. The actual region of operation depends upon the load.
The amount of current applied to the LED (pins 1 and 2 or 3 and 4) determines the amount of light produced for the PDA. For
high temperature operation, more LED current may be required.
8
1
–
Channel 1
control
Switch 1
N-channel
MOSFETs
P-channel
JFET
+
2
7
2.0 MΩ
6
3
–
Switch 2
N-channel
MOSFETs
P-channel
JFET
Channel 2
control
+
4
5
2.0 MΩ
ilh1262cb_08
Fig. 1 - Typical Dual Form A Solid-State Relay Application
PACKAGE DIMENSIONS (in millimeters)
10.20 max.
7.62 typ.
9.75 ± 0.15
6.60 ± 0.25
0.50 min.
1.27 ± 0.10
0.50 ± 0.10
3° to 9°
2.54 typ.
PIN ONE I.D.
3.10 ± 0.50
3.55 ± 0.25
0.70 min.
8
7
6
5
1
2
3
4
.10
0.25 ± 0
Fig. 2 - DIP-8 Package Drawing
Rev. 1.5, 31-Jan-2019
Document Number: 83802
3
For technical questions, contact: optocoupleranswers@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
LH1262CAC, LH1262CACTR, LH1262CB
www.vishay.com
Vishay Semiconductors
10.30 max.
10.20 max.
7.62 typ.
9.75 ± 0.15
6.60 ± 0.25
0.25 ± 0.10
1.27 ± 0.10
0.50 min.
Leads coplanarity
0.1 max.
8.00 min.
2.54 typ.
7
6
5
.25
R0
1.78
2.54
0.76
8
4.30 ± 0.30
0.50 min.
3.55 ± 0.25
0.70 min.
PIN ONE I.D.
1
2
3
4
1.52
8.00 min.
11.05
Fig. 3 - SMD-8 Package Drawing
PACKAGE MARKING (example)
LH1262
V YWW 68
Fig. 4 - LH1262
Notes
• VDE logo is only marked on option 1 parts
• Tape and reel suffix (T) is not part of the package marking
Rev. 1.5, 31-Jan-2019
Document Number: 83802
4
For technical questions, contact: optocoupleranswers@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
LH1262CAC, LH1262CACTR, LH1262CB
www.vishay.com
Vishay Semiconductors
SOLDER PROFILES
Axis Title
Axis Title
10000
300
10000
5s
Lead temperature
Max. 260 °C
255 °C
240 °C
217 °C
250
1000
200
Max. 30 s
150
Max. 120 s
100
Max. 100 s
Max. ramp down 6 °C/s
100
2nd line
Temperature (°C)
245 °C
1st line
2nd line
2nd line
Temperature (°C)
250
200
235 °C to
260 °C
First wave
100 °C to
130 °C
100
100
2 K/s
Max. ramp up 3 °C/s
50
50
10
0
0
50
100
150
200
250
Time (s)
19841
Fig. 5 - Lead (Pb)-free Reflow Solder Profile
According to J-STD-020 for SMD Devices
Rev. 1.5, 31-Jan-2019
ca. 5 K/s
Forced cooling
10
0
0
300
948626
1000
ca. 2 K/s
ca. 200 K/s
150
Full line: typical
Dotted lines:
process limits
Second
wave
1st line
2nd line
300
50
100
150
200
250
Time (s)
Fig. 6 - Wave Soldering Double Wave Profile
According to J-STD-020 for DIP Devices
Document Number: 83802
5
For technical questions, contact: optocoupleranswers@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
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Revision: 01-Jan-2022
1
Document Number: 91000