Product is End of Life 12/2014
Si9961A
Vishay Siliconix
12-V Voice Coil Motor Driver
DESCRIPTION
FEATURES
The Si9961A is a linear actuator (voice coil motor) driver suitable for use in disk drive head positioning systems. The
Si9961A contains all of the power and control circuitry necessary to drive the VCM that is typically found in 31/2 inch
hard disk drives and optical disk drives. The driver is capable
of delivering 1.8 A at a nominal supply of 12 V.
•
•
•
•
•
•
•
•
•
The Si9961A provides all necessary functions including a
motor current sense amplifier, a loop compensation amplifier
and a power amplifier featuring four complementary MOSFETs in a H-bridge configuration. The output crossover protection ensures no cross-conducting current and true Class
B operation during linear tracking. Externally programmable
gain switch at the input summing junction increases the resolution and dynamic range for a given DAC. The head retract
circuitry can be activated by either an undervoltage condition
or an external command. An external resistor is required to
set the VCM current during retract.
1.8 A H-Bridge Output
Class B Linear Operation
Externally Programmable Gain and Bandwidth
Undervoltage Head Retract
Programmable Retract Current
Low Standby Current
Rail-to-Rail Output Swing
Single 12 V Supply
System Voltage Monitor with Fault Output
The Si9961A is constructed on a self-isolated BiC/DMOS
power IC process. The IC is available in both standard and
lead (Pb)-free, 24-pin SO packages for operation over the
commercial, C suffix (0 to 70 °C) temperature range.
FUNCTIONAL BLOCK DIAGRAM
FAULT
VCC
V+
EXT
VREF
VREF_
8
7
12
VDD
18
Q1
4
5
Q3
VR
Voltage
Monitor
8R
IA2-
23
-
A2
R
A4
+
+
-
Q2
17
OUTPUT
A
19
OUTPUT
B
Q4
VR
RETRACT
IRET
Enable
OA2
VR
9
Retract
Control
6
11
22
A5
Acceleration Error
+
R
VR
7R
GAIN
SELECT
A3
-
10
+
1
RINH
Document Number: 70014
S-40845-Rev. H, 03-May-04
2
RINL
24
RFB
3
ISENSE
OUT
13
ISENSE
IN+
21
ISENSE
IN-
15 14
SA
GND
16
20
SB
www.vishay.com
1
Si9961A
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
Limit
Unit
Voltages Referenced to Common Pin
V+ Supply Range
- 0.3 V to 16 V
Pin (FAULT)
-0.3 V to VCC + 0.3 V
Pin (Output A & B, Source A & B)
- 0.3 V to VDD + 0.3 V
Pin (All Others)
- 0.3 V to V+ + 0.3 V
Maximum Clamp Current
Output A, Output B (Pulsed 10 ms at 10 % duty cycle)
Pin (All Others)
Storage Temperature
V
± 1.8
A
± 20
mA
- 65 to 150
Operating Temperature
0 to 70
Junction Temperature (TJ)
°C
150
Power Dissipation (Package)a
24-Pin SOICb
3.125
W
Thermal Impedance (ΘJA)a
24-Pin SOIC
40
°C/W
Notes:
a. Device Mounted with all leads soldered or welded to PC board.
b. Derate 25 mW/°C above 25 °C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
SPECIFICATIONS
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 12 V ± 10 %, VDD = 11.6 V ± 10 %
VCC = 5 V ± 10 %, VREF- = GND = 0 V
VREF = 5 V ± 5 %
Limits
C Suffix 0 to 70 °C
Minb
Typa
8.0
9.1
Unit
Maxb
Bridge Outputs (A4, A5)
High Level Output Voltage
VOH
IOH = 1.0 A, VDD = 10.2 V, OA2 = VREF ± 1 V
Low Level Output Voltage
VOL
IOL = - 1.0 A, OA2 = VREF ± 1 V
Clamp Diode Voltage
VCL
IF = 1.0 A, ENABLE = High
Output VRANGE = VREF ± 2 V
Amplifier Gain
SR
1.1
12
16
18
10
V/V
mA
1
V/µS
Small Signal Bandwidth (- 3 dB)
0.2
Input Deadband
V
2.5
Measured at VDD
Dynamic Crossover Current
Slew Rate
0.6
- 60
MHz
60
mV
-8
8
mV
- 50
50
nA
A2, Loop Compensation Amplifier
Input Offset Voltage
Input Bias Current
VOS
IB
RLOAD = 10 kΩ, CLOAD = 100 pF to VREF
Unity Gain Bandwidth
Slew Rate
Power Supply Rejection Ratio
Open Loop Voltage Gain
Output Voltage Swing
Gain Select = High, IA2- = 5 V
SR
PSRR
1
V/µs
at 10 kHz
50
AVOL
VO
MHz
1
dB
80
RLOAD = 10 kΩ to VREF
VREF - 2
VREF + 2
V
5
mW
A3, Current Sense Amplifier
Input Offset Voltage
VOS
Input Impedance
RIN
Small Signal Bandwidth (- 3 dB)
Common Mode Rejection Ratio
Slew Rate
CMRR
-5
ISENSEIN+ to ISENSEIN-
5
kΩ
RLOAD = 10 kΩ, CLOAD = 100 pF to VREF
1
MHz
at 5 kHz
SR
Gain
Input Common-Mode Voltage Range
Output Voltage Swing
www.vishay.com
2
50
dB
2
V/µs
3.9
4
4.1
VCM
To GND
- 0.3
2
VO
RLOAD = 10 kΩ, CLOAD = 100 pF to VREF
VREF - 2
VREF + 2
V/V
V
Document Number: 70014
S-40845-Rev. H, 03-May-04
Si9961A
Vishay Siliconix
SPECIFICATIONS
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 12 V ± 10 %, VDD = 11.6 V ± 10 %
VCC = 5 V ± 10 %, VREF- = GND = 0 V
VREF = 5 V ± 5 %
Limits
C Suffix 0 to 70 °C
Minb
Typa
Unit
Maxb
Supply
ICC
Supply Current (Normal)
IV+
IDD
ICC
Supply Current (Standby)
IV+
IDD
0.01
Static, No Load
RETRACT = High
ENABLE = Low
2
5
5
13
0.01
Static, No Load
RETRACT = High
ENABLE = High
0.2
Normal Mode
10.2
Retract Mode
2.0
mA
0.4
0.8
1.6
11.6
13.2
VDD Range
VDD
VCC Range
VCC
4.5
5
5.5
V+ Range
V+
10.8
12
13.2
14
V
Gain Select Switch
RFB Switch Resistance
RINH Switch Resistance
108
240
135
300
810
1800
0.15
0.40
0.65
mA
4.75
5
5.25
V
3.82
4.12
4.42
IA2 - = 5 V
RINL Switch Resistance
Ω
VREF (EXT)
Input Current
IREF
External Voltage Range
VREF
OA2 = VREF
Power Supply Monitor
VCC Undervoltage Threshold
VREF = 5.0 V
Hysteresis
40
VREF = 5.0 V
V+ Undervoltage Threshold
9.1
Hysteresis
9.8
V
mV
10.6
100
V
mV
Gain Select, RETRACT, ENABLE Input
Input High Voltage
VIH
Input Low Voltage
VIL
Input High Current
IIH
VIN = 5 V
-1
1
Input Low Current
IIL
VIN = 0 V
-1
1
Output High Voltage
VOH
IOH = - 100 µA
VCC
- 0.8
Output Low Voltage
VOL
IOL = 1.6 mA
0.25
0.50
Output High Sourcing Current
IOHS
VOUT = 0 V
400
1100
3.5
1.5
V
µA
FAULT Output
VCC
- 0.33
V
µA
RETRACT Current Control (RETRACT = Low, Output Current from A to B)
IRET Bias Voltage
V(IRET)
VDD = 10 V, RRET = 3.74 kΩ
Retract Output Pull-Up Voltage
VOUT A
VDD = 2.5 V to 14 V, IOUTA = 30 mA
VDD - 1
Retract Output Pull-Down Current
IOUTB
VDD = 10 V, VOUTB = 5 V RRET = 3.74 kΩ
RSB = 0.5 Ω, TA = 25 °C
22
IOUTB (Max)
VDD = 2 V, VOUTB = 0.7 V RRET = < 10 Ω
RSB = 0.5 Ω
40
Maximum Emergency Retract Current
Retract Current VDD Supply Rejection Ratio
Retract Current Temperature Coefficient
0.66
30
V
38
mA
VDD = 2 V to 14 V, RRET = 3.74 kΩ
3.0
%/V
VDD = 10 V, RRET = 3.74 kΩ
- 0.3
%/°C
Notes:
a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
Document Number: 70014
S-40845-Rev. H, 03-May-04
www.vishay.com
3
Si9961A
Vishay Siliconix
PIN CONFIGURATION AND ORDERING INFORMATION
24-Pin SOIC
(Wide Body)
ORDERING INFORMATION
RINH
1
24
RFB
RINL
2
23
IA2-
ISENSE OUT
3
22
OA2
FAULT
4
21
ISENSE (IN)-
VCC
5
20
SOURCE B
IRET
6
19
OUTPUT B
EXT VREF
7
18
VDD (Spindle Supply)
V+
8
17
OUTPUT A
RETRACT
9
16
GND
GAIN SELECT 10
15
SOURCE A
ENABLE 11
14
GND
VREF- 12
13
ISENSE (IN)+
Part Number
Lead (Pb)-free
Part Number
Temperature
Range
Package
0 to 70 °C
SOIC-24
(Wide Body)
Si9961ACY
Si9961ACY-T1 Si9961ACY-T1-E3
Top View
APPLICATIONS
Introduction
User-Programmable Gains
The Si9961A Voice Coil Motor (VCM) driver integrates the
active feedback and drive components of a head-positioning
servo loop for high-performance hard-disk applications. The
Si9961A operates from a 12 V (± 10 %) power supply and
delivers 1 A of steady-state output current. This device is
made possible by a power IC process which combines bipolar, CMOS and complimentary DMOS technologies. CMOS
logic and linear components minimize power consumption,
bipolar front-ends on critical amplifiers provide necessary
accuracy, and complimentary (P- and N-Channel) DMOS
devices allow the transconductance output amplifier to operate from ground to VDD. Two user-programmable, current
feedback/input voltage ratios may be digitally selected to
optimize gain for both seek and track following modes, to
maximize system accuracy for a given DAC resolution. An
undervoltage lockout circuit monitors the V+ supply and generates a fault signal to trigger an orderly head-retract
sequence at a voltage level sufficient to allow the spindle
motor’s back EMF-generated voltage to supply the necessary head parking energy. Head retract can also be commanded via a separate RETRACT input. VCM current during
retract can be user programmed with a single external resistor. External components are limited to R/C filter components
for loop compensation and the resistors that are required to
program gain, retract current, and the load current sense.
During linear operation, the transconductance amplifiers’
gains (input voltage at VIN vs. VCM current, in Figure 1) are
set by external resistors R3 -> R5, RSA, and RSB and selected
by gain input. After selecting a value for RSA and RSB that will
yield the desired VCM current level, the High and Low feedback gain ratios may be determined by the following:
www.vishay.com
4
High Gain =
( )
1
4 RS
(GAIN SELECT Input = High)
Low Gain =
( )
1
4 RS
(GAIN SELECT Input = Low)
R5
R3
R5
R4
Where RS = RSA = RSB
Input offset current may then be calculated as:
1
IOS = 4 R
S
(
(
)
(RS + RIN )
V
+ 5 VIAS3 )
RIN OSA2
Where RIN = R3 or R4
Document Number: 70014
S-40845-Rev. H, 03-May-04
Si9961A
Vishay Siliconix
Back EMF Supply
12 V
System
Supply
5 V Ref
V+
4
mP
EXT
VREF
8
7
VREF_
12
VDD
18
FAULT
Voltage
Monitor
5
5V
VCC
VR
Q1
VCM
8R
23
IA2-
A2
-
17
R
OUTPUT
C2 R2
A
19
A4
+
CL
+
-
RL
VR
9
6
IOUT
Q3
Q2
Q4
OUTPUT
B
VR
RETRACT
IRET
Retract
Control
ENABLE
11
OA2
A5
Acceleration Error
22
+
RRET
R
VR
7R
A3
GAIN
SELECT
-
10
+
mP
RINH RINL
RFB
ISENSE ISENSE ISENSE
OUT
IN+
IN-
1
24
3
2
R3
R4
13
GND
A
21
B
15 14
16 20
R5
VIN
RSA
RSB
Figure 1. Si9961A Typical Application
Head Retract
A low on the RETRACT input pin turns output devices Q1
and Q4 on, and output devices Q2 and Q3 off. Maximum
VCM current can be set during head retract by adding an
external resistor between the IRET pin and ground. Maximum retract current may be calculated as:
0.66 V
IOUT = 175 × Iret = 175 × R
ret
Head retract can be initiated automatically by an undervoltage condition (either the 12 V or 5 V supplies on the
Si9961A) by connecting the FAULT output to the RETRACT
input.
Document Number: 70014
S-40845-Rev. H, 03-May-04
A high ENABLE input puts both driver outputs in a highimpedance state. The ENABLE function can be used to eliminate quiescent output current when power is applied but the
head has been parked, such as a sleep mode. A sleep-mode
power down sequence should be preceded by a retract signal since a power failure during this state may not provide
adequate spindle-motor back EMF to permit head retraction.
Transconductance Amplifier Compensation
The Si9961A features an integrated transconductance
amplifier to drive the voice coil motor (VCM). To ensure
proper operation, this amplifier must be compensated specifically for the VCM being driven. As a first approximation, the
torque constant and inertia of the VCM may be ignored,
although they will have some influence on the final results,
especially if large values are involved. (See Figure 1.)
www.vishay.com
5
Si9961A
Vishay Siliconix
Frequency Compensation:
Gain Optimization:
The VCM transconductance (in siemens) of this simplified
case may be expressed in the s (Laplace) plane as:)
There are three things to consider when optimizing the gain
(A) above. The first is servo bandwidth. The main criterion
here is to avoid having the transconductance amplifier cause
an undue loss of phase margin in the overall servo (mechanical + electrical + firmware) loop. The second is to avoid confirguing a bandwidth that is more than required in view of
noise and stability considerations. The third is to keep the
voltage output waveform overshoot to a level that will not
cause cross-conduction of the output FETs.
The first two problems can be considered together. Let us
assume a disk drive with a spindle RPM of 4400 and with 50
servo sectors per track. The sample rate is therefore:
gv =
1
Lv
s +
Where
Rv
Lv
Rv = VCM resistance in ohms
LV = VCM inductance in henrys
s is the Laplace operator
In this case, the transconductance pole is at - Rv/Lv. It is
desirable to cancel this pole in the interest of stability. To do
this, a compensation amplifier is cascaded with the VCM and
its driver. The transfer function of this amplifier is:
Hc = A ×
Where
(
s +
1
RL × CL
)
s
RL = Compensation amplifier feedback
resistor in ohms
CL = Compensation amplifier feedback
capacitor in farads
A = Compensation amplifier and driver
voltage gain at high frequency
If RL x CL is set equal to Lv/Rv, then the combined open loop
transconductance in siemens becomes:
gto =
A
s × Lv
In this case, the transconductance has a single pole at the
origin. If this open loop transfer is closed with a transimpedance amplifier having a gain of B ohms, the resultant closed
loop transconductance stage has the transfer function (in
siemens) of:
gtc =
s +
A
Lv
A × B
Lv
Where B = Current feedback transimpedance amplifier gain
in ohms.
The entire transconductance now contains only a single pole
at - A*B/Lv. A and B are chosen to be considerably higher
than the servo bandwidth, to avoid undue phase margin
reduction.
As a typical example, in the referenced schematic, assume
that Rsa and Rsb = 0.5 Ω, R5 = R3 = 10 kΩ, VCM inductance
(Lv) = 1.5 mH, VCM resistance (Rv) = 15 Ω. Hence:
Rv = 15 Ω
Lv = 1.5 mH
B=2Ω
A = 16 x RL/10000
CL = Lv/(Rv x RL) = 100 x 10- 6/RL farads
www.vishay.com
6
f s = 50 × 440
60
This is a sample frequency of 3667 Hz
As a rule of thumb, the open loop unity gain crossover frequency of the entire servo (mechanical + electrical + firmware) loop should be less than 1/10 of the sample frequency.
In this example, the servo open loop unity gain crossover frequency would be less than 367 Hz. If we allow only a 10°
degradation in phase margin due to the transconductance
amplifier, then a phase lag of 10° at 367 Hz is acceptable.
This results in a 3 dB point in the transconductance at :
f3db =
367
tan (10)
or a 3 dB point in the transconductance at 2081 Hz.
The pole in the closed loop transconductance (- A * B / Lv)
should then be 2081 * 2 * π = 13075. This means that A = 9.8.
From the above equation for A, RL = 6.2 kΩ. This sets the
minimum gain limit governed by the servo bandwidth requirements. The gain should not be much greater than this, since
increased noise will degrade the servo response.
The third problem, keeping the transconductance amplifier
voltage output wave form overshoot to a level that will not
cause the wrong output FETs to conduct, can be evaluated
by deriving the voltage transfer function of the closed loop
transconductance amplifier from input voltage to output voltage (Vin to output A and B on the reference schematic).
This is :
Hto = A ×
Where
s + p
s + x
p = 1/RL x CL) or Rv/Lv Comp amplifier
zero/VCM pole
x = A x B/Lv closed loop pole
Document Number: 70014
S-40845-Rev. H, 03-May-04
Si9961A
Vishay Siliconix
If a unit step voltage is applied to the above transfer function
and the inverse Laplace transform is taken, the output result
is:
p + (x - p) x e - x
x
× t
Where t = time
As we can see, if x = p (i.e. if the VCM pole and compensation amplifier zero = the transconductance closed loop pole),
then Vo reduces to A. In other words, a step input results in
a step output without overshoot. If x < p then a step input
results in an increased rise time output and no overshoot. If
x > p, a step input results in a step output with an overshoot.
If this overshoot is large enough, there may be a cross-conduction condition in the output FETs.
Let us look at the above equation at t = 0 and t >> 0,
expressed in terms of the open loop high frequency voltage
gain, A.
VO = A
VO
p × Lv
=
B
In the example for the 2081 Hz roll-off case with 31 % overshoot and proper pole cancellation, the compensation values
are:
RL = 6.2 kΩ
CL = 0.016 µF
In the example for the 1592-Hz roll-off case with no overshoot and proper pole cancellation, the compensation values
are:
RL = 4.7 kΩ
CL = 0.022 µF
The linearity of the transconductance amplifier (around a
center value of 500 mA/volt) is shown in Figure 2. In this
case, the output current sense resistors (RSA and RSB) were
± 5 % tolerance, 0.5 Ω . Any mismatch between RSA and RSB
contribute directly to mismatch between the positive and
negative "full-scale". Including the external resistor mismatch, the overall loop nonlinearity is approximately 1 %
maximum over a ± 250 mV input voltage range.
At t = 0
5
4
At t > > 0
In the example shown above, p = 10,000 and A = 9.8. This
means that there is some overshoot. At t = 0, the output voltage is 9.8 V per volt of input. At some later time, it has
dropped to 7.5 V per volt of input. An overshoot of 31 % is
thus produced.
The maximum overshoot voltage requires careful consideration, since it constitutes a potentially catastrophic problem
area. If we had decided to optimize for no overshoot, A would
equal 7.5, and hence the closed loop pole (A * B / Lv) would
be 10,000, which is a frequency of 1.592 kHz. This would
have resulted in a phase margin degradation of 13° at the
367 Hz frequency desired. This may or may not be acceptable. One must weigh the servo bandwidth, phase margin
degradation, and maximum voltage at the VCM for each individual case.
Document Number: 70014
S-40845-Rev. H, 03-May-04
Error in Percent of Full Scale
VO = A ×
Result:
3
2
1
0
VDD = 12 V
RSA = RSB = 0.5 Ω "5 %
Rm = 52 Ω
Gm = 500 mA/V
-1
-2
-3
-4
-5
- 300
- 200
- 100
0
100
200
300
VIN in mV
Figure 2. Si9961A Transconductance
End Point Non-Linearity
www.vishay.com
7
Si9961A
Vishay Siliconix
6.2 kΩ
RL
0.016 µF
CL
8R
VDD
RIN
-
VIN
A2
R
A4
+
+
VR
IOUT
Cross-Over
Protection
-
10k
VR
VCM
1.5 mH
15 Ω
VDD
A5
Gain =
VS
R5
10 k
Ω
VIN
+
Cross-Over
Protection
R
7R
VR
A3
-
VS
+
(4 x Gain)
RSB
0.5 Ω
RSA
0.5 Ω
VR
Figure 3. Transconductance Amplifier
-5
0
-8
PHASE (in degrees)
GAIN (in dB)
- 20
- 11
- 14
- 40
- 60
- 17
- 20
1
10
100
1000
10000
- 80
1
10
100
1000
Frequency (Hz)
Frequency (Hz)
Figure 4. RL = 6.2 kΩ, CL = 0.016 µF
Figure 5. RL = 6.2 kΩ, CL = 0.016 µF
10000
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability
data, see http://www.vishay.com/ppg?70014.
www.vishay.com
8
Document Number: 70014
S-40845-Rev. H, 03-May-04
Package Information
Vishay Siliconix
SOIC (WIDE-BODY): 24-LEAD (POWER IC ONLY)
∅0.06±0.002D
CAVITY NO.
0.303±0.001
24
23
22
21
20
19
18
17
16
15
14
0.334±0.005
13
R0.004
0.295±0.001
0.010
R0.008
R0.009
0.1475±0.001
1
2
3
4
5
6
7
8
9
10
11
12
0.070±0.005
0.055±0.005
0.041±0.001
4_±2_
R0.004
0.032±0.005
PIN 1 INDICATOR
∅0.047X0.007±0.001 dp
SURFACE POLISHED
DETAIL A
0.334±0.005
0.606±0.001
0.291±0.001
0.020x45_
7_(4x)
DETAIL A
0.098±0.002
0.091±0.001
0.050 TYP.
0.017±0.0003
0.006±0.002
R0.004
0.295±0.001
0.406±0.004
ECN: S-40085—Rev. A, 02-Feb-04
DWG: 5930
Document Number: 72825
29-Jan-04
www.vishay.com
1
Legal Disclaimer Notice
www.vishay.com
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay's knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer's responsibility to validate that a particular product
with the properties described in the product specification is suitable for use in a particular application. Parameters provided in
datasheets and / or specifications may vary in different applications and performance may vary over time. All operating
parameters, including typical parameters, must be validated for each customer application by the customer's technical experts.
Product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited
to the warranty expressed therein.
Hyperlinks included in this datasheet may direct users to third-party websites. These links are provided as a convenience and
for informational purposes only. Inclusion of these hyperlinks does not constitute an endorsement or an approval by Vishay of
any of the products, services or opinions of the corporation, organization or individual associated with the third-party website.
Vishay disclaims any and all liability and bears no responsibility for the accuracy, legality or content of the third-party website
or for that of subsequent links.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please
contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
© 2022 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 01-Jan-2022
1
Document Number: 91000