TFBS4650-TR4

TFBS4650 www.vishay.com Vishay Semiconductors Infrared Transceiver, 9.6 kbit/s to 115.2 kbit/s (SIR) DESCRIPTION TFBS4650 is an infrared transceiver that supports data rates up to 115 kbit/s per the IrDA standard. The link distance is up to 1 meter. The transceiver includes a PIN photodiode, an infrared emitter, and a low-power control IC. These components have not been qualified according to automotive specifications. FEATURES 20206-1 • Compliant to the IrDA physical layer specification • Standard IrDA link distance of 1 m • Low power consumption, typically less than 70 μA • Less than 1 μA in shutdown mode • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 APPLICATIONS • Short-distance wireless communication and data transfer • Use in environments where RF is problematic LINKS TO ADDITIONAL RESOURCES Product Page Related Documents DESIGN SUPPORT TOOLS • • • • • 3D model Window size calculator Symbols and terminology IRDC protocol Reference layouts and circuit diagrams FUNCTIONAL BLOCK DIAGRAM VCC Tri-state driver PD Amplifier RXD Comparator IREDA SD Mode control TXD IRED driver IRED IREDC ASIC GND 19283 Rev. 2.5, 21-Oct-2022 Document Number: 84672 1 For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TFBS4650 www.vishay.com Vishay Semiconductors PRODUCT SUMMARY PART NUMBER DATA RATE (kbit/s) DIMENSIONS HxLxW (mm x mm x mm) LINK DISTANCE (m) OPERATING VOLTAGE (V) IDLE SUPPLY CURRENT (mA) 115.2 1.6 x 6.8 x 2.8 0 to ≥ 0.3 2.4 to 5.5 0.075 TFBS4650 PARTS TABLE PART DESCRIPTION QTY/REEL TFBS4650-TR1 Oriented in carrier tape for side view surface mounting 1000 pcs TFBS4650-TR3 Oriented in carrier tape for side view surface mounting 2500 pcs TFBS4650-TT3 Oriented in carrier tape for top view surface mounting 2500 pcs PIN DESCRIPTION PIN NUMBER SYMBOL DESCRIPTION 1 IREDA IRED anode, connected via a current limiting resistor to VCC2. A separate unregulated power supply can be used. I/O ACTIVE 2 IREDC IRED cathode, do not connect for standard operation. 3 TXD Transmitter data input. Setting this input above the threshold turns on the transmitter. This input switches the IRED with the maximum transmit pulse width of about 100 μs. I High 4 RXD Receiver output. Normally high, goes low for a defined pulse duration with the rising edge of the optical input signal. Output is a CMOS tri-state driver, which swings between ground and VCC. Receiver echoes transmitter output. O Low 5 SD Shutdown. Logic low at this input enables the receiver, enables the transmitter, and un-tri-states the receiver output. It must be driven high for shutting down the transceiver. I High 6 VCC Power supply, 2.4 V to 5.5 V. This pin provides power for the receiver and transmitter drive section. Connect VCC1 via an optional filter. 7 GND Ground PINOUT TFBS4650, bottom view weight 0.05 g Pin 1 Pin 7 19284 Definitions: In the Vishay transceiver datasheets the following nomenclature is used for defining the IrDA operating modes: • SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared standard with the physical layer version IrPhy 1.0 • MIR: 576 kbit/s to 1152 kbit/s • FIR: 4 Mbit/s • VFIR: 16 Mbit/s MIR and FIR were implemented with IrPhy 1.1, followed by IrPhy 1.2, adding the SIR low power standard. IrPhy 1.3 extended the low power option to MIR and FIR and VFIR was added with IrPhy 1.4. A new version of the standard in any case obsoletes the former version. Rev. 2.5, 21-Oct-2022 Document Number: 84672 2 For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TFBS4650 www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER TEST CONDITIONS SYMBOL MIN. TYP. MAX. UNIT Supply voltage range, transceiver 0 V < VCC2 < 6 V VCC1 -0.5 - 6 V Supply voltage range, transmitter 0 V < VCC1 < 6 V VCC2 -0.5 - 6 V All states VIN -0.5 - VCC + 0.5 V Independent of VCC1 or VCC2 VIN -0.5 - 6 V -40 - 40 mA - - 20 mA - - 250 mW °C Voltage at RXD Input voltage range, transmitter TXD Input currents For all pins, except IRED anode pin Output sinking current Power dissipation PD Junction temperature TJ - - 125 Ambient temperature range (operating) Tamb -25 - +85 °C Storage temperature range Tstg -40 - +100 °C - - - °C Soldering temperature (1) Repetitive pulse output current See section “Recommended Solder Profile” < 90 μs, ton < 20 % Average output current (transmitter) Thermal resistance junction-to-ambient JESD51 IIRED (RP) - - 500 mA IIRED (DC) - - 100 mA RthJA - 300 - K/W Notes • Reference point pin, ground unless otherwise noted Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing (1) Sn/lead (Pb)-free soldering. The product passed Vishay’s standard convection reflow profile soldering test EYE SAFETY INFORMATION STANDARD CLASSIFICATION IEC/EN 60825-1 (2007-03), DIN EN 60825-1 (2008-05) “SAFETY OF LASER PRODUCTS Part 1: equipment classification and requirements”, simplified method Class 1 IEC 62471 (2006), CIE S009 (2002) “Photobiological Safety of Lamps and Lamp Systems” Exempt DIRECTIVE 2006/25/EC OF THE EUROPEAN PARLIAMENT AND OF THE COUNCIL of 5th April 2006 on the minimum health and safety requirements regarding the exposure of workers to risks arising from physical agents (artificial optical radiation) (19th individual directive within the meaning of article 16(1) of directive 89/391/EEC) Exempt Note • Vishay transceivers operating inside the absolute maximum ratings are classified as eye safe according the above table Rev. 2.5, 21-Oct-2022 Document Number: 84672 3 For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TFBS4650 www.vishay.com Vishay Semiconductors ELECTRICAL CHARACTERISTICS (Tamb = 25 °C, VCC = 2.4 V to 5.5 V unless otherwise noted) PARAMETER TEST CONDITIONS SYMBOL MIN. TYP. MAX. UNIT VCC 2.4 - 5.5 V TRANSCEIVER Supply voltage range Dynamic supply current Idle, dark ambient SD = low (< 0.8 V), Eeamb = 0 klx, Ee < 4 mW/m2 -25 °C ≤ T ≤ +85 °C ICC - 90 130 μA Idle, dark ambient SD = low (< 0.8 V), Eeamb= 0 klx, Ee < 4 mW/m2 T = +25 °C ICC - 75 - μA Peak supply current during transmission SD = low, TXD = high Iccpk - 2 3 mA Shutdown supply current dark ambient SD = high (> VCC - 0.5 V), T = 25 °C, Ee = 0 klx ISD - - 0.1 μA SD = high (> VCC - 0.5 V), -25 °C ≤ T ≤ +85 °C ISD - - 1 μA Shutdown supply current, dark ambient Operating temperature range TA -25 - +85 °C Input voltage low (TXD, SD) VIL -0.5 - 0.5 V VIH VCC - 0.5 - 6 V 0.9 1.35 1.8 V Input voltage high VCC = 2.4 V to 5.5 V Input voltage threshold SD VCC = 2.4 V to 5.5 V Output voltage low VCC = 2.4 V to 5.5 V CLOAD = 15 pF VOL -0.5 - VCC x 0.15 V Output voltage high VCC = 2.4 V to 5.5 V CLOAD = 15 pF VOH VCC x 0.8 - VCC + 0.5 V SD = VCC VCC = 2.4 V to 5 V RRXD - 500 - kΩ CI - - 6 pF RXD to VCC pull-up impedance Input capacitance (TXD, SD) Note • Typical values are for design aid only, not guaranteed nor subject to production testing Rev. 2.5, 21-Oct-2022 Document Number: 84672 4 For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TFBS4650 www.vishay.com Vishay Semiconductors OPTOELECTRONIC CHARACTERISTICS (Tamb = 25 °C, VCC = 2.4 V to 5.5 V unless otherwise noted) PARAMETER TEST CONDITIONS SYMBOL MIN. TYP. MAX. UNIT Sensitivity: minimum irradiance Ee in angular range (1)(2) 9.6 kbit/s to 115.2 kbit/s λ = 850 nm to 900 nm Ee - 40 (4) 81 (8.1) mW/m2 (μW/cm2) Maximum irradiance Ee in angular range λ = 850 nm to 900 nm Ee 5 (500) - - kW/m2 (mW/cm2) No receiver output input irradiance (3) According to IrDA IrPHY 1.4, appendix A1, fluorescent light specification Ee 4 (0.4) - - mW/m2 (μW/cm2) Rise time of output signal 10 % to 90 %, CL = 15 pF tr (RXD) 20 - 100 ns Fall time of output signal 90 % to 10 %, CL = 15 pF tf (RXD) 20 - 100 ns Input pulse width 1.63 μs tPW 1.7 2 2.9 μs RECEIVER RXD pulse width of output signal, 50 % (4) Receiver start up time Power on delay - 100 150 μs tL - 50 200 μs No external resistor for current limitation (4) ID 200 300 430 mA If = 300 mA Vf 1.4 1.8 1.9 V Latency TRANSMITTER (new surface emitter values introduced via PCN) IRED operating current limitation Forward voltage of built-in IRED Output leakage IRED current TXD = 0 V, 0 < VCC1 < 5.5 V IIRED -1 0.01 1 μA α = 0°, 15°, TXD = high, SD = low Ie 40 250 400 mW/sr VCC1 = 5 V, α = 0°, 15°, TXD = low or SD = high (receiver is inactive as long as SD = high) Ie - - 0.04 mW/sr α - ± 30 - ° Peak - emission wavelength (5) λp 870 - 910 nm Spectral bandwidth Δλ - 45 - nm Output radiant intensity Output radiant intensity, angle of half intensity Optical rise time, fall time Optical output pulse duration Optical overshoot tropt, tfopt 10 50 300 ns Input pulse width 1.6 < tTXD < 23 μs topt tTXD - 0.15 - tTXD + 0.15 μs Input pulse width tTXD ≥ 23 μs topt 23 50 100 μs - - 25 % Notes • Typical values are for design aid only, not guaranteed nor subject to production testing (1) This parameter reflects the backlight test of the IrDA physical layer specification to guarantee immunity against light from fluorescent lamps. (2) IrDA sensitivity definition: minimum irradiance E in angular range, power per unit area. The receiver must meet the BER specification while e the source is operating at the minimum intensity in angular range into the minimum half-angular range at the maximum link length (3) Maximum irradiance E in angular range, power per unit area. The optical delivered to the detector by a source operating at the maximum e intensity in angular range at minimum link length must not cause receiver overdrive distortion and possible related link errors. If placed at the active output interface reference plane of the transmitter, the receiver must meet its bit error ratio (BER) specification. For more definitions see the document “Symbols and Terminology” on the Vishay website (4) RXD output is edge triggered by the rising edge of the optical input signal. The output pulse duration is independent of the input pulse duration (5) The radiant intensity can be adjusted by the external current limiting resistor to adapt the intensity to the desired value. The given value is for minimum current consumption. This transceiver can be adapted to > 50 cm operation by increasing the current to > 200 mA, e.g. operating the transceiver without current control resistor (i.e. R1 = 0 Ω) and using the internal current control Rev. 2.5, 21-Oct-2022 Document Number: 84672 5 For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TFBS4650 www.vishay.com Vishay Semiconductors TRUTH TABLE INPUTS OUTPUTS SD TXD OPTICAL INPUT IRRADIANCE mW/m2 RXD TRANSMITTER High x x Tri-state floating with a weak pull-up to the supply voltage 0 Low High x Low (echo on) Ie Low High > 50 μs x High 0 Low Low min. irradiance Ee < max. irradiance Ee Low (active) 0 Low Low > max. irradiance Ee x 0 RECOMMENDED CIRCUIT DIAGRAM Operated at a clean low impedance power supply the TFBS4650 needs only one additional external component when the IRED drive current should be minimized for minimum current consumption according the low power IrDA standard. When combined operation in IrDA and remote control is intended no current limiting resistor is recommended. However, depending on the entire system design and board layout, additional components may be required (see Fig. 1). When long wires are used for bench tests, the capacitors are mandatory for testing rise / fall time correctly. V CC2 IRED anod e R1 IRED cathode V CC1 GND VCC R2 C1 C2 injected noise. An unstable power supply with dropping voltage during transmission may reduce the sensitivity (and transmission range) of the transceiver. The placement of these parts is critical. It is strongly recommended to position C2 as close as possible to the transceiver power supply pins. When connecting the described circuit to the power supply, low impedance wiring should be used. In case of extended wiring the inductance of the power supply can cause dynamically a voltage drop at VCC2. Often some power supplies are not able to follow the fast current is rise time. In that case another 10 μF cap at VCC2 will be helpful. Keep in mind that basic RF-design rules for circuit design should be taken into account. Especially longer signal lines should not be used without termination. See e.g. “The Art of Electronics” Paul Horowitz, Wienfield Hill, 1989, Cambridge University Press, ISBN: 0521370957. Ground SD SD TXD TXD RXD RXD RECOMMENDED APPLICATION CIRCUIT COMPONENTS 19286 Fig. 1 - Recommended Application Circuit The capacitor C1 is buffering the supply voltage VCC2 and eliminates the inductance of the power supply line. This one should be a small ceramic version or other fast capacitor to guarantee the fast rise time of the IRED current. The resistor R1 is necessary for controlling the IRED drive current when the internally controlled current is too high for the application. Vishay transceivers integrate a sensitive receiver and a built-in power driver. The combination of both needs a careful circuit board layout. The use of thin, long, resistive and inductive wiring should be avoided. The inputs (TXD, SD) and the output RXD should be directly (DC) coupled to the I/O circuit. The capacitor C2 combined with the resistor R2 is the low pass filter for smoothing the supply voltage. As already stated above R2, C1 and C2 are optional and depend on the quality of the supply voltages VCCx and COMPONENT RECOMMENDED VALUE C1, C2 0.1 μF, Ceramic Vishay part# VJ 1206 Y 104 J XXMT R1 See table below R2 47 Ω, 0.125 W (VCC1 = 3 V) RECOMMENDED RESISTOR R1 (Ω) VCC2 (V) MINIMIZED CURRENT CONSUMPTION, IrDA LOW POWER COMPLIANT 2.7 24 3 30 3.3 36 Rev. 2.5, 21-Oct-2022 Document Number: 84672 6 For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TFBS4650 www.vishay.com Vishay Semiconductors ASSEMBLY INSTRUCTIONS Reflow Soldering • Reflow soldering must be done within 72 h while stored under a max. temperature of 30 °C, 60 % RH after opening the dry pack envelope • Set the furnace temperatures for pre-heating and heating in accordance with the reflow temperature profile as shown in the diagram. Exercise extreme care to keep the maximum temperature below 260 °C. The temperature shown in the profile means the temperature at the device surface. Since there is a temperature difference between the component and the circuit board, it should be verified that the temperature of the device is accurately being measured • Handling after reflow should be done only after the work surface has been cooled off Manual Soldering • Use a soldering iron of 25 W or less. Adjust the temperature of the soldering iron below 300 °C • Finish soldering within 3 s • Handle products only after the temperature has cooled off VISHAY LEAD (Pb)-FREE REFLOW SOLDER PROFILE Axis Title 10000 300 255 °C 240 °C 250 245 °C 217 °C 200 1000 max. 20 s 150 max. 120 s max. 100 s 100 100 Max. ramp up 3 °C/s 50 Max. ramp down 6 °C/s Max. 2 cycles allowed 0 0 19800 1st line 2nd line 2nd line Temperature (°C) max. 260 °C 50 100 150 200 250 10 300 Time (s) Rev. 2.5, 21-Oct-2022 Document Number: 84672 7 For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TFBS4650 www.vishay.com Vishay Semiconductors PACKAGE DIMENSIONS in millimeters 19322 Fig. 2 - TFBS4650 Mechanical Dimensions, Tolerance ± 0.2 mm, if not otherwise mentioned 19729 Fig. 3 - TFBS4650 Soldering Footprint, Tolerance ± 0.2 mm, if not otherwise mentioned Rev. 2.5, 21-Oct-2022 Document Number: 84672 8 For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TFBS4650 www.vishay.com Vishay Semiconductors TAPE DIMENSIONS FOR TR1 AND TR3 in millimeters Tape for Side View Oriented Parts 19285 Rev. 2.5, 21-Oct-2022 Document Number: 84672 9 For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TFBS4650 www.vishay.com Vishay Semiconductors TAPE DIMENSIONS FOR TT1 in millimeters Tape for Top View Oriented Parts 7.1 4° max 3.1 0.32 . Emitter 2 Detector 8° ma x. 4 2 Progressive direction 8 technical drawings according to DIN specifications 2 Ø 1.5 Ø 1.5 7.5 1.75 16 Drawing-No.: 9.700-5340.01-4 Issue: 1; 15.01.09 21663 Rev. 2.5, 21-Oct-2022 Document Number: 84672 10 For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TFBS4650 www.vishay.com Vishay Semiconductors REEL DIMENSIONS in millimeters Drawing-No.: 9.800-5090.01-4 Issue: 1; 29.11.05 14017 TAPING VARIANT TAPE WIDTH (mm) A MAX. (mm) N (mm) W1 MIN. (mm) W2 MAX. (mm) W3 MIN. (mm) W3 MAX. (mm) TT1 / TR1 TT3 / TR3 16 180 60 16.4 22.4 15.9 19.4 16 330 50 16.4 22.4 15.9 19.4 LEADER AND TRAILER DIMENSIONS in millimeters Trailer no devices Leader devices no devices End Start min. 200 min. 400 96 11818 COVER TAPE PEEL STRENGTH LABEL According to DIN EN 60286-3 0.1 N to 1.3 N 300 ± 10 mm/min. 165° to 180° peel angle Standard bar code labels for finished goods The standard bar code labels are product labels and used for identification of goods. The finished goods are packed in final packing area. The standard packing units are labeled with standard bar code labels before transported as finished goods to warehouses. The labels are on each packing unit and contain Vishay Semiconductor GmbH specific data. Rev. 2.5, 21-Oct-2022 Document Number: 84672 11 For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TFBS4650 www.vishay.com Vishay Semiconductors DRY PACKING The reel is packed in an anti-humidity bag to protect the devices from absorbing moisture during transportation and storage. Aluminum bag Label After more than 72 h under these conditions moisture content will be too high for reflow soldering. In case of moisture absorption, the devices will recover to the former condition by drying under the following condition: 192 h at 40 °C + 5 °C / - 0 °C and < 5 % RH (dry air / nitrogen) or 96 h at 60 °C + 5 °C and < 5 % RH for all device containers or 24 h at 125 °C + 5 °C not suitable for reel or tubes. An EIA JEDEC® standard J-STD-020 level 4 label is included on all dry bags. Reel CAUTION 15973 This bag contains MOISTURE-SENSITIVE DEVICES FINAL PACKING LEVEL 4 1. Shelf life in sealed bag: 12 months at < 40 °C and < 90 % relative humidity (RH) The sealed reel is packed into a cardboard box. 2. After this bag is opened, devices that will be subjected to soldering reflow or equivalent processing (peak package body temp. 260 °C) must be 2a. Mounted within 72 hours at factory condition of < 30 °C/60 % RH or 2b. Stored at < 5 % RH RECOMMENDED METHOD OF STORAGE 3. Devices require baking befor mounting if: Humidity Indicator Card is > 10 % when read at 23 °C ± 5 °C or 2a. or 2b. are not met. Dry box storage is recommended as soon as the aluminum bag has been opened to prevent moisture absorption. The following conditions should be observed, if dry boxes are not available: • Storage temperature 10 °C to 30 °C • Storage humidity ≤ 60 % RH max. 4. If baking is required, devices may be baked for: 192 hours at 40 °C + 5 °C/- 0 °C and < 5 % RH (dry air/nitrogen) or 96 hours at 60 °C ± 5 °C and < 5 % RH for all device containers or 24 hours at 125 °C ± 5 °C not suitable for reels or tubes Bag Seal Date: (If blank, see barcode label) Note: Level and body temperature defined by EIA JEDEC Standard J-STD-020 22522 EIA JEDEC standard J-STD-020 level 4 label is included on all dry bags OUTER PACKAGING The sealed reel is packed into a pizza box. CARTON BOX DIMENSIONS in millimeters Length Thickness 22127 ORDER CODE Width BOXING THICKNESS WIDTH LENGTH TT3 / TR3 Pizza box (taping in reels) 50 340 340 TT1 / TR1 Pizza box (taping in reels) 32 190 190 Rev. 2.5, 21-Oct-2022 Document Number: 84672 12 For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TFBS4650 www.vishay.com Vishay Semiconductors VISHAY SEMICONDUCTOR GmbH STANDARD BAR CODE PRODUCT LABEL (finished goods) PLAIN WRITING ABBREVIATION LENGTH Item-description - 18 Item-number INO 8 Selection-code SEL 3 BATCH 10 Data-code COD 3 (YWW) Plant-code PTC 2 Quantity QTY 8 Accepted by ACC - Packed by PCK - LOT-/serial-number Mixed code indicator Origin Long bar code top MIXED CODE - xxxxxxx+ Company logo Type Length Item-number N 8 Plant-code N 2 Sequence-number X 3 Quantity N 8 Total length - 21 Short bar code bottom Type Length Selection-code X 3 Data-code N 3 Batch-number X 10 Filter - 1 Total length - 17 ESD PRECAUTION Proper storage and handling procedures should be followed to prevent ESD damage to the devices especially when they are removed from the antistatic shielding bag. Electrostatic sensitive devices warning labels are on the packaging. VISHAY SEMICONDUCTORS STANDARD BAR CODE LABELS The Vishay Semiconductors standard bar code labels are printed at final packing areas. The labels are on each packing unit and contain Vishay Semiconductors specific data. 23199 Rev. 2.5, 21-Oct-2022 Document Number: 84672 13 For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. © 2022 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED Revision: 01-Jan-2022 1 Document Number: 91000