TOIM4232
Vishay Semiconductors
SIR Endec for IrDA® Applications Integrated Interface Circuit
FEATURES
• Pulse shaping function (shortening
stretching) used in SIR IrDA applications
and
• Directly interfaces the SIR transceiver TFD..and TFB..- series to an RS232 port
• Programmable baud clock generator (1200 Hz to
115.2 kHz), 13 baud rates
18080
• 3/16 bit pulse duration or 1.627 µs pulse
selectable
DESCRIPTION
The TOIM4232 Endec IC provides proper pulse shaping for
the SIR IrDA® front end infrared transceivers as of the
4000-series. For transmitting the TOIM4232 shortens the
RS232 output signal to IrDA compatible electrical pulses to
drive the infrared transmitter. In the receive mode, the
TOIM4232 stretches the received infrared pulses to the
proper bit width depending on the operating bit rate. The IrDA
bit rate varies from 2.4 kbit/s to 115.2 kbit/s.The TOIM4232
is using a crystal clock 3.6864 MHz for its pulse stretching
and shortening. The clock can be generated by the internal
oscillator. An external clock can be used, too. The TOIM4232
is programmable to operate from 1200 bit/s to 115.2 kbit/s by
the communication software through the RS232 port. The
output pulses are software programmable as either 1.627 µs
or 3/16 of bit time. The typical power consumption is very low
with about 10 mW in operational state and in the order of a
few microwatts in standby mode.
• SO16 - package
• 2.7 V to 3.6 V operation voltage, 5 V tolerant inputs
• Low operating current
• Qualified for lead (Pb)-free and Sn/Pb processing (MSL3)
• Compliant to RoHS Directive 2002/95/EC and in
accordance to WEEE 2002/96/EC
ULC TECHNOLOGY
High performance gate array package using multiple metal
layer CMOS technology featuring sub-micron channel
lengths (0.35 µm).
PARTS TABLE
PART
DESCRIPTION
QTY/REEL
-
1500 pcs
TOIM4232-TR3
PRODUCT SUMMARY
PART NUMBER
TOIM4232
DATA RATE
(kbit/s)
DIMENSIONS
HxLxW
(mm x mm x mm)
LINK DISTANCE
(m)
OPERATING
VOLTAGE
(V)
IDLE SUPPLY
CURRENT
(mA)
115.2
4 x 4 x 0.75
-
2.7 to 3.6
2
Document Number: 82546
For technical questions within your region, please contact one of the following:
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
Rev. 2.1, 17-Nov-10
www.vishay.com
1
TOIM4232
Vishay Semiconductors
SIR Endec for IrDA® Applications
Integrated Interface Circuit
BLOCK DIAGRAM
VCC
TD_IR
TD_232
Endec
RD_232
RD_IR
TD_LED
Baud
generator
BR/D
RD_LED
S1
S2
Logic
RESET
VCC_SD
Oscillator
GND
X1
X2
18079
PIN DESCRIPTION
PIN NUMBER SYMBOL
DESCRIPTION
I/O
ACTIVE
RESET
Resets all internal registers. Initially must be high (“1”) to reset internal registers. When high, the
TOIM4232 sets the IrDA default bit rate of 9600 bit/s, sets pulse width to 1.627 µs. The VCC_SD
output is simply an inverted reset signal which allows to shut down of a TFDx4x00 transceiver
when applying the reset signal to the TOIM4232. When using devices with external SD like
TFDU4203, the reset line can be used directly as shut down signal. RESET pin can be controlled
by either the RTS or DTR line through RS232 level converter. Minimum hold time for resetting
is 1 µs. Disables the oscillator when active.
2
BR/D
Baud rate control/ data.
BR/D = 0, data communication mode:
RS232 TXD data line is connected (via a level shifter) to TD_232 input pin. The TXD - signal is
appropriately shortened and applied to the output TD_IR, driving the TXD input of the IR
transceiver. The RXD line of the transceiver is connected to the RD_IR input. This signal is
stretched to the correct bit length according to the programmed bit rate and is routed to the
RS232 RXD line at the RD_232 pin.
BR/D = 1, programming mode:
Data received from the RS232 port is interpreted as control word. The control word programs
the baud rate width will be effective as soon as BR/D return to low.
3
RD_232
Received signal data output of stretched signal to the RS232 RXD line (using level converter).
O
High
4
TD_232
Input of the signal to be transmitted from the RS232 port TXD line (passing the level converter).
I
High
5
VCC_SD
Outputs an inverted RESET signal. Can be used to shut down the power supply of a 4000 series
transceiver (e.g., TFDU4100). VCC shutdown output function. This pin can be used to shut down
a transceiver (e.g., TFDx4xxx). Output polarity: Inverted RESET input.
O
Low
6
X1
Crystal input clock, 3.6864 MHz nominal. Input for external clock (1)
I
7
X2
Crystal (1)
I
8
GND
Ground in common with the RS232 port and IrDA transceiver ground
9
TD_LED
Transmit LED indicator driver. Use 180 current limiting resistor in series to LED to connect to
VCC. (VCC = 3.3 V)
O
Low
10
RD_LED
Receive LED indicator driver. Use 180 current limiting resistor in series to LED to connect to
VCC. (VCC = 3.3 V)
O
Low
11
NC
No connection
12
S1
User programmable bit. Can be used to turn on/off a front-end infrared transceiver (e.g., an
infrared module at the adapter front)
O
Low
13
S2
User programmable bit. Can be used to turn on/off a front-end infrared transceiver (e.g., an
infrared module at the adapter back)
O
Low
1
High
14
TD_IR
Data output of shortened signal to the infrared transceiver
O
High
15
RD_IR
Data input from the infrared transceiver, min. pulse duration 1.63 µs (2)
I
Low
16
VCC
Supply voltage
I
Notes
(1) Crystal should be connected as shown in figure 2. In addition connect a 100 k resistor from pin 6 to pin 7 and from pin 6 and pin 7 a 22 pF
capacitor to ground, respectively. When an external clock is available connect it to pin 6 leaving pin 7 open. The external resistor of 100 k
is used to accelerate the start of oscillation after reset or power - on. The value depends on the “Q” of the resonator. With low Q resonators
it is not necessary. The start - up time of the oscillator is between 30 µs (with piezo resonators) and above 2 ms with high Q quartzes.
(2) All Vishay Semiconductor SIR transceivers fulfill this condition.
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Document Number: 82546
For technical questions within your region, please contact one of the following:
Rev. 2.1, 17-Nov-10
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
TOIM4232
SIR Endec for IrDA® Applications
Integrated Interface Circuit
Vishay Semiconductors
BLOCK DIAGRAM OF APPLICATION CIRCUIT
DTR
RESET VCC_SD
RTS
BR/D
TD_IR
TXD
TXD
TD_232
RD_IR
RXD
RXD
RD_232
RS232 9 pin
connector
VCC
Operating the interface circuit at a PC COM - port. When
operating directly with an UART with 3 V - or 5 V - logic, in
the application circuit no level converter is necessary.
TOIM4232
Level
converter
R1
X1
X2
100 kΩ
TFDU4-series
TFBS4-series
3.6864 MHz
C1
2 x 22 pF
C2
18081
RECOMMENDED APPLICATION CIRCUIT COMPONENTS
COMPONENT
RECOMMENDED VALUE
VISHAY PART NUMBER
C1
22 pF
VJ 1206 A 220 J XAMT
C2
22 pF
VJ 1206 A 220 J XAMT
R1
100 k
CRCW-1206-1003-F-RT1
3.686400 MHz
XT49S - 20 - 3.686400M
Quartz crystal
ABSOLUTE MAXIMUM RATINGS
PARAMETER
TEST CONDITIONS
Supply voltage
Input voltage
All pins
Output voltage
All pins
Output sinking current, max.
All pins
Junction temperature, max.
Ambient temperature
(operating)
SYMBOL
MIN.
VCC
- 0.5
TYP.
MAX.
3.6
UNIT
V
- 0.5
5.5
V
- 0.5
VCC + 0.5
V
IO
8
mA
TJ
125
°C
85
°C
Tamb
- 25
Storage temperature
Tstg
- 25
Soldering temperature
Tsldr
85
°C
260
°C
DC CHARACTERISTICS
PARAMETER
TEST CONDITIONS
Operating voltage
SYMBOL
MIN.
TYP.
MAX.
UNIT
VCC
2.7
3.3
3.6
V
VIH
2
VCC = 3.3 V ± 5 %, operating temperature = - 25 °C to + 85 °C
Input high voltage
Inputs tolerate levels as high as
5.5 V max. All inputs are Schmitt
trigger inputs
Input low voltage
VIL
Input Schmitt trigger hysteresis
Input leakage no pull-up/down
Output high voltage
Output low voltage
V
Vhyst
VIN = VDD or GND
IL
0.8
V
10
µA
0.6
- 10
±1
V
IOH = - 2 mA
VOH
2
V
IOH = - 0.5 mA
VOH
2.4
V
IOL = + 2 mA
VOL
0.4
V
Consumption current standby
Inputs grounded, no output load
VCC = 3.3 V, T = 25 °C
ISB
1
µA
Consumption current dynamic
Inputs grounded, no output load
VCC = 3.3 V, T = 25 °C
ICC
2
Document Number: 82546
For technical questions within your region, please contact one of the following:
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
Rev. 2.1, 17-Nov-10
mA
www.vishay.com
3
TOIM4232
Vishay Semiconductors
SIR Endec for IrDA® Applications
Integrated Interface Circuit
OPERATION DESCRIPTION
The block diagram shows a typical example of an RS232 port
interface. The TOIM4232 connects to an RS232 level
converter on one side, and an infrared transceiver on the
other. The internal TOIM4232 baud rate generator can be
software controlled.
When BR/D = 0, the TOIM4232 interprets the channels
TD_232 to TD_IR and RD_IR to RD_232 as data channels.
On the other hand, whenever BR/D = 1, the TOIM4232
interprets TD_232 as control word for setting the Baud rate.
The Baud rate can be programmed to operate from 1200
bit/s to 115.2 kbit/s. As RS232 level converter, EIA232 or
MAX232 or equivalent are recommended.
When using the TOIM4232 directly connected to an UART it
is compatible to 5 V TTL and 3.3 V CMOS logic.
Typical external resistors and capacitors are needed as
shown in the TFDU4.../TFBS4...-series references.
The output pulse duration can also be programmed, see
chapter “Operation Description”. It is strongly recommended
using 1.627 µs output pulses to save battery power. As
frequency determining component a Vishay XT49M crystal is
recommended, when no external clock is available.
We strongly recommend not to use this 3/16 mode
because 3/16 pulse length at lower bit rates consumes
more power than the shorter pulse. At a data rate of
9600 bit/s, the ratio of power consumption of both
modes is a factor of 12 (!).
PROGRAMMING THE TOIM4232
For correct, data rate dependent timing the TOIM4232 is
using a built-in baud rate generator. This is used when no
external clock is not available as in RS232 IR-dongle
applications. For programming the BR/D pin has to be set
active, BR/D = 1.
In this case the TOIM4232 interprets the 7 LSBs at the
TD_232 input as a control word. The operating baud rate will
change to its supposedly new baud rate when the BR/D
returns back to low (“0”) Set the UART to 8 bit, no parity, 1
stop bit.
Example:
To set TOIM4232 at COM2 port (2F8) to 9600 bit/s with 3/16
bit time pulse duration send to the TOIM4232 in
programming mode in e.g. “basic”
OUT &H2F8, (&H6)
For same port, 9600 bit/s and 1.627 µs pulse duration send
OUT &H2F8, (&H16)
For additionally activating S1 send
OUT &H2F8, (&H36)
TABLE 2 - BAUD RATE SELECT WORDS
B3
0
1
B2
B1
B0
2ND
CHAR
BAUD RATE
0
0
0
0
115.2 kHz
0
0
1
1
57.6 kHz
0
1
0
2
38.4 kHz
0
1
1
3
19.2 kHz
1
0
0
4
14.4 kHz
1
0
1
5
12.8 kHz
1
1
0
6
9.6 kHz
1
1
1
7
7.2 kHz
0
0
0
8
4.8 kHz
0
0
1
9
3.6 kHz
0
1
0
A
2.4 kHz
0
1
1
B
1.8 kHz
1
0
0
C
1.2 kHz
1
0
1
D
forbidden
1
1
0
E
forbidden
1
1
1
F
forbidden
Note
IrDA standard only supports 2.4 kbit/s, 9.6 kbit/s, 19.2 kbit/s,
57.6 kbit/s, and 115.2 kbit/s.
CONTROL BYTE (8 BIT)
FIRST CHARACTER
X
S2
S1
SECOND CHARACTER
S0
B3
B2
B1
B0
LSB
X: do not care
S1, S2: user programmable bit to program the outputs S1
and S2
S0: IrDA pulse select
S0 = (1): 1.627 µs pulses
S0 = (0): 3/16 bit time pulses, not recommended
B0 .. B3: baud rate select words
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Document Number: 82546
For technical questions within your region, please contact one of the following:
Rev. 2.1, 17-Nov-10
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
TOIM4232
SIR Endec for IrDA® Applications
Integrated Interface Circuit
Vishay Semiconductors
SOFTWARE FOR THE TOIM4232
UART PROGRAMMING
For proper operation, the RS232 must be programmed (using 8 bit, 1 stop, no parity) to send a two character control word, YZ.
The control word YZ is composed of two characters, written in hexadecimal, in format: YZ. The transfer rate for programming
must be identical with the formerly programmed data rate, or after resetting the TOIM4232, the default rate of 9600 bit/s is used.
STEP.
RESET
BR/D
TD_UART
RD_UART
RD_IR
TD_IR
DESCRIPTION AND COMMENTS
1
High
X
X
X
X
X
Resets all internal registers. Resets to
IrDA default data rate of 9600 bit/s
2
Low
X
X
X
X
X
Wait at least 2 ms, to allow start-up of
internal clock. When external clock is
used: wait at least 7 µs.
3
Low
High
X
X
X
X
Wait at least 7 µs. TOIM4232 now is set
to the control word programming mode
X
Sending the control word YZ.
Examples: send “1Z” if 1.627 µs pulses
are intended to be used. Otherwise
send “0Z” for 3/16 bit period pulses.
“Y6” keeps the 9.6 kbit/s data rate.
Z = 0 sets to 115.2 kbit/s, see
programming table.
Wait at least 1 µs for hold-time.
Data
With BR/D = 0, TOIM4232 is in the data
communication mode. Both RESET
and BR/D must be kept low (“0”) during
data transmission. Reprogramming to a
new data rate can be resumed by
restarting from step 3. The UART itself
also must set to the correct data rate (1).
4
Low
5
YZ with Y = 1
for 1.627 µs
Y=0
3/16 bit length
High
Low
Low
X
Data
X
Data
Data
Note
(1) For programming the UART, refer to e.g., National Semiconductor’s data sheet of PC 16550 UART
RECOMMENDED APPLICATION CIRCUIT WITH LEVEL SHIFTER
R3
MAX3232CSE
1
+
C3
3
4
VCC
C1+
16
1
U1
C1-
V+
2
2
C2+
V-
6
3
C2-
GND
C6
+
C4
TOIM4232
TOIM5232
5
15
+ C5
+ C7
4
+
5
6
11
10
12
9
T1OUT
T2OUT
R1IN
R2IN
T1IN
T2IN
R1OUT
R2OUT
14
7
13
8
7
8
RESET
BR/D
RD_232
U2
V
CC
RD_IR
TD_IR
TD_232
S2
V
CC_SD
S1
X1
NC
X2
RD_LED
GND
TD_LED
C11
16
15
C10
2
+
4
14
6
13
8
12
11
R4
optional
TFDU4101
TFDU4300
IRED
Cathode
RXD
V
CC1
GND
IRED
Anode
U4
TXD
SD
TFDU4101: NC
TFDU4300: Vlog
1
3
5
7
This line not used with TFDU4101
10
9
J1
1
6
2
7
3
8
4
9
5
RXD
RTS (BR/D)
TXD
R1
DTR (RESET)
VCC
Z2
J2
CON9
External input
3.6 V max.
Y1
1
2
C1
+ C2
R2
C8
C9
CON2
20612
Document Number: 82546
For technical questions within your region, please contact one of the following:
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
Rev. 2.1, 17-Nov-10
www.vishay.com
5
TOIM4232
Vishay Semiconductors
SIR Endec for IrDA® Applications
Integrated Interface Circuit
RECOMMENDED APPLICATION CIRCUIT COMPONENTS
COMPONENT
RECOMMENDED VALUE
VISHAY PART NUMBER
1
C1
100 nF
VJ 1206 Y 104 J XXMT
2
C2
10 µF, 16 V
293D106X9016B2T
3
C3
100 nF
VJ 1206 Y 104 J XXMT
4
C4
100 nF
VJ 1206 Y 104 J XXMT
5
C5
100 nF
VJ 1206 Y 104 J XXMT
6
C6
100 nF
VJ 1206 Y 104 J XXMT
7
C7
1 µF, 16 V
293D105X9016A2T
8
C8
22 pF
VJ 1206 A 220 J XAMT
VJ 1206 A 220 J XAMT
9
C9
22 pF
10
C10
6.8 µF, 16 V
293D 685X9 016B 2T
11
C11
100 nF
VJ 1206 Y 104 J XXMT
12
Z2
3.6 V
BZT55C3V6
13
R1
5.6 k
CRCW-1206-5601-F-RT1
14
R2
Depending on resonator quality
CRCW-1206-1003-F-RT1
15
R3
47
CRCW-1206-47R0-F-RT1
R4
For operation according IrDA - spec not
needed
Optional only for current reduction
XT49S - 20 - 3.686400M or e.g. ceramic resonators
16
17
Y1
3.686400 MHz
18
U1
MAXIM MAX 3232E
19
U2
TOIM4232 or TOIM5232
20
U3
TFDU4300 or other compatible transceivers
21
J1
9 pin - D-sub
22
J2
Power connector
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Cannon
Document Number: 82546
For technical questions within your region, please contact one of the following:
Rev. 2.1, 17-Nov-10
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
TOIM4232
SIR Endec for IrDA® Applications
Integrated Interface Circuit
Vishay Semiconductors
RECOMMENDED APPLICATION CIRCUIT WITH DISCRETE LEVEL SHIFTERS
VCC
3
C1
+
R13
+ 3.3 V
2
Q4
1
Q2
+ C2
R2
R6
RXD
RTS
1
3
Q1
D5
D6
VB1
TXD
3
Q3
1
D4
1
D7
R5
3
2
R1
2
R3
1
6
2
7
3
8
4
9
5
D1
D2
RXD
RTS
TXD
DTR
R20
SUB-D 9
3
R9
Reset
1
Q1
2
D3
+ 3.3 V
TD232 RD232 BR/D Reset
VCC
R12/1
R11
TOIM4232
1
2
3
4
5
QZ1
6
R10
7
8
C3
R12/2
Reset
VCC
BR/D
RD_IR
RD_232
TD_IR
TD_232
S2
V
X1
IRED1
U1
CC_SD
S1
NC
X2
RD_LED
GND
TD_LED
T
16
15
14
13
12
2
11
4
10
6
9
8
C4
IRED cathode
IRED anode
RXD
TXD
VCC
NC
Gnd
SC
U2
1
3
5
7
TFDU4100
+
Jumper
C5
C6
18082
Install jumper connection only when VCC_SD supplies U2. In that case leave R11 off.
Document Number: 82546
For technical questions within your region, please contact one of the following:
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
Rev. 2.1, 17-Nov-10
www.vishay.com
7
TOIM4232
Vishay Semiconductors
SIR Endec for IrDA® Applications
Integrated Interface Circuit
RECOMMENDED APPLICATION CIRCUIT COMPONENTS
COMPONENT
RECOMMENDED VALUE
VISHAY PART NUMBER
1
C1
22 µF, 16 V
293D 226X9 016C 2T
2
C2
47 µF, 16 V
293D 476X9 016D 2T
3
C3
22 pF
VJ 1206 A 220 J XAMT
4
C4
22 pF
VJ 1206 A 220 J XAMT
5
C5
100 nF
VJ 1206 Y 104 J XXMT
6
C6
6.8 µF, 16 V
293D 685X9 016B 2T
7
D1
8
D2
1N4148
9
D4
BZT55C4V7
10
D5
1N4148
11
D6
1N4145
12
D7
BZT55C3V9
1N4148
13
IRED1
TSHF5400
14
Jumper
CRCW-1206-000-F-RT1
15
LED1
TLLY4401
16
LED2
TLLG4401
17
Q1
BC817-25
18
Q2
VP 0610 0T
19
Q3
BC817-25
20
Q4
BC817-25
21
QZ1
3.686400 MHz
XT49S - 20 - 3.686400M
22
R1
22 k
CRCW-1206-2202-F-RT1
23
R2
10 k
CRCW-1206-1002-F-RT1
24
R3
22 k
CRCW-1206-2202-F-RT1
25
R5
1 k
CRCW-1206-1001-F-RT1
26
R6
47 k
CRCW-1206-4702-F-RT1
27
R9
5.6 k
CRCW-1206-5601-F-RT1
28
R10
100 k
CRCW-1206-1003-F-RT1
29
R11
100
CRCW-1206-1000-F-RT1
30
R12
20
CRCW-1206-20R0-F-RT1
21
R13
1 k
CRCW-1206-1001-F-RT1
32
R17
750
CRCW-1206-7500-F-RT1
33
R18
750
CRCW-1206-750-F-RT1
34
VB1
9 pin - D - sub
35
U1
TOIM4232 or TOIM5232
36
U2
TFDU4100 (will be obsolete). Replace by TFDU4101 and use
external components as shown in the other example.
www.vishay.com
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Cannon
Document Number: 82546
For technical questions within your region, please contact one of the following:
Rev. 2.1, 17-Nov-10
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
TOIM4232
SIR Endec for IrDA® Applications
Integrated Interface Circuit
Vishay Semiconductors
RECOMMENDED SOLDER PROFILES
260
240
220
200
180
160
140
120
100
80
60
40
20
0
240 °C max.
10 s max. at 230 °C
275
225
160 °C max.
120 to180 s
T ≥ 255 °C for 10 s....30 s
250
2 to 4 °C/s
90 s max.
2 to 4 °C/s
Tpeak = 260 °C
T ≥ 217 °C for 70 s max.
200
Temperature/°C
Temperature (°C)
Solder Profile for Sn/Pb Soldering
175
150
30 s max.
125
100
90 s to 120 s
70 s max.
2 °C/s to 4 °C/s
75
2 °C/s to 3 °C/s
50
25
0
50
19535
100
150
200
250
300
0
350
Time/s
0
50
100
150
19532
200
250
300
350
Time/s
Fig. 1 - Recommended Solder Profile for Sn/Pb Soldering
Fig. 2 - Solder Profile, RSS Recommendation
Lead (Pb)-free, Recommended Solder Profile
Wave Soldering
280
Tpeak = 260 °C max.
240
Temperature/°C
The TOIM4232 is a lead (Pb)-free transceiver and qualified
for lead (Pb)-free processing. For lead (Pb)-free solder paste
like Sn(3.0 - 4.0)Ag(0.5 - 0.9)Cu, there are two standard reflow
profiles: Ramp-Soak-Spike (RSS) and Ramp-To-Spike
(RTS). The Ramp-Soak-Spike profile was developed
primarily for reflow ovens heated by infrared radiation. With
widespread use of forced convection reflow ovens the
Ramp-To-Spike profile is used increasingly. Shown below in
figure 2 and 3 are Vishay’s recommended profiles for use
with the TOIM4232 transceivers. For more details please
refer to the application note “SMD Assembly Instructions”.
A ramp-up rate less than 0.9 °C/s is not recommended.
Ramp-up rates faster than 1.3 °C/s could damage an optical
part because the thermal conductivity is less than compared
to a standard IC.
200
< 4 °C/s
160
1.3 °C/s
120
Time above 217 °C t ≤ 70 s
Time above 250 °C t ≤ 40 s < 2 °C/s
Peak temperature Tpeak = 260 °C
80
40
0
0
TFDU Fig3
50
100
150
200
250
300
Time/s
Fig. 3 - RTS Recommendation
For TFDUxxxx and TFBSxxxx transceiver devices and the
TOIM4232, TOIM5232 endecs wave soldering is not
recommended.
Manual Soldering
Manual soldering is the standard method for lab use.
However, for a production process it cannot be
recommended because the risk of damage is highly
dependent on the experience of the operator. Nevertheless,
we added a chapter to the above mentioned application note,
describing manual soldering and desoldering.
Storage
The storage and drying processes for the endec TOIM4232
are equivalent to MSL3.
The data for the drying procedure is given on labels on the
packing and also in the application note “Taping, Labeling,
Storage and Packing”.
Document Number: 82546
For technical questions within your region, please contact one of the following:
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
Rev. 2.1, 17-Nov-10
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9
TOIM4232
Vishay Semiconductors
SIR Endec for IrDA® Applications
Integrated Interface Circuit
PACKAGE DIMENSIONS in millimeters
13011
REEL DIMENSIONS in millimeters
Drawing-No.: 9.800-5090.01-4
Issue: 1; 29.11.05
14017
TAPE WIDTH
(mm)
A MAX.
(mm)
N
(mm)
W1 MIN.
(mm)
W2 MAX.
(mm)
W3 MIN.
(mm)
W3 MAX.
(mm)
16
330
50
16.4
22.4
15.9
19.4
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10
Document Number: 82546
For technical questions within your region, please contact one of the following:
Rev. 2.1, 17-Nov-10
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TOIM4232
SIR Endec for IrDA® Applications
Integrated Interface Circuit
Vishay Semiconductors
TAPE DIMENSIONS in millimeters
18241
Document Number: 82546
For technical questions within your region, please contact one of the following:
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Rev. 2.1, 17-Nov-10
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11
TOIM4232
SIR Endec for IrDA® Applications
Integrated Interface Circuit
Vishay Semiconductors
TOIM4232 (TOIM5232) ENCODER - DECODER INTERFACE
PROGRAMMING AND DATA TRANSMISSION
Operation and programming of the TOIM4232 and
TOIM5232 interface devices are described below. Figure 4
shows the basic circuit design with 3 blocks: the RS232 to
3 V logic level shifter, the encoder/decoder (endec) circuit
and the transceiver to build a dongle for RS232 IrDA
extension. U1 is the level shifter to convert the RS232 logic
levels to unipolar
3 V logic; U2 is the encoder/decoder
Interface (endec) converting the NRZ - RS232 logic to IrDA
RZI - logic. The transceiver U3 transmits and receives
IrDA-compliant optical signals.
R3
MAX3232
1
C+
VCC
TOIM4232
(TOIM5232)
16
1(18)
+
C3
3
4
RESET
U1
C1-
V+
C2+
V-
2
2(19)
6
3(1)
+
+
C4
5
C2-
GND
C6 + C5
+ C7
4(2)
15
5(3)
U2
BR/D
RD_232
Vcc
RD_IR
TD_IR
TD_232
S2
Vcc_SD
S1
T1IN
T2IN
R1OUT
R2OUT
T1OUT
T2OUT
R1IN
R2IN
X1
14
7
13
8
7(5)
8(7)
15(16)
X2
GND
NC
RD_LED
TD_LED
C10
2
+
4
14(14)
6
13(13)
8
12(12)
6(4)
11
10
12
9
16(17)
11 *)
R4
optional
TFDU4101
TFDU4300
C11
IRED
Cathode
RXD
Vcc1
GND
IRED
Anode
U3
TXD
SD
TFDU4101:NC
.
TFDU4300:Vlog
1
3
5
7
This line not used fot TFDU4101
10(10)
9(9)
J1
*) (6), (8), (11), (15), (20)
1
6
2
7
3
8
4
9
5
RXD
RTS (BR/D)
TXD
R1
DTR (RESET)
Y1
Vcc
Z2
J2
CON9
1
2
External input
3.6V max.
C1
R2
+ C2
C8
CON2
C9
21046
Fig. 4 - Circuit Diagram of the Demo Board
CIRCUIT DESCRIPTION
PROGRAMMING THE ENDEC
This circuit demonstrates the operation of an SIR IrDA
transceiver module. The transceiver U3 (e.g., as shown the
TFDU4101 or TFDU4300 or any other) converts the digital
electrical input signal to an optical output signal to be
transmitted, receives the optical signal, and converts these
to electrical digital signals. While the IrDA physical layer
protocol transmits only the “0” represented by a pulse with a
“Return to Zero Inverted (RZI)” logic, the RS232 protocol
needs a “No Return to Zero (NRZ)” representation. This
decoding/encoding process is done by U2, an interface
circuit stretching the received pulses and shortening the
pulses to be transmitted according to the IrDA physical layer
conditions. U1 interfaces the RS232 logic bipolar levels to
the 3 V logic of the endec U2. The board is connected by
CON9 to the RS232 port (of a computer or other equipment.
The basic IrDA transmission speed is 9600 bit/s. This is the
default state of the endec in power-on condition. Also,
activating the reset line at pin 1 (18) will set the device to this
basic state.
Note: The first pin number refers to TOIM4232; the second
number in brackets refers to TOIM5232. The crystal Y1
controls the timing of the endec as a clock reference. The
outputs S1 and S2 are programmable outputs for control
operations and the outputs RD_LED and TD_LED can drive
LEDs for indicating data flow.
For decoding data rates other than the default, the endec is
to be programmed to set the internal counters and timers. To
switch the endec from the data transfer mode to the bit rate
programming mode, the input BR/D, pin 2 (19) is set active
high (BR/D = “1”). In this case the TOIM5232 interprets the
7 LSBs at the TD_232 input as a control word. The operating
bit rate will change to its supposedly new rate when the BR/D
returns back to low (“0”). Set the UART to 8 bit, no parity, 1
stop bit.
The control byte consists of 8 bit after the start bit (STA,
which is “0”). Keep in mind that the order is LSB first, MSB
last.
The diagram in figure 5 shows the programming byte
“0-1010-1100” in the order
STA, B0, B1, B2, B3, S0, S1, S2, X. This order is from right
to left in table 1. B0 is sent first as LSB (see figure 5).
The four least significant bits are responsible for the data rate
according to table 2 while the four higher bits are for setting
the IrDA pulse duration (S0), and the two outputs of the
Endec S1 and S2. Bit 8 is not used.
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Document Number: 82546
For technical questions within your region, please contact one of the following:
Rev. 2.1, 17-Nov-10
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TOIM4232
SIR Endec for IrDA® Applications
Integrated Interface Circuit
In figure 5 the programming sequence is shown for a bit rate
of 12.8 kbit/s.
TABLE 1 - CONTROL BYTE (8 BIT)
FIRST CHARACTER
X
S2
S1
S0
SECOND CHARACTER
B3
B2
B1
MSB
Vishay Semiconductors
STA
B0
0
LSB
Example
0
0
1
1
0
1
0
1
0
In the oscilloscope that will be shown in the reserved order with
LSB first, see figure 5.
STA
0
FIRST CHARACTER
B0
B1
B2
B3
1->
SECOND CHARACTER
S0
S1
S2
LSB
X
2->
MSB
1) Ch1: BR/D; pin 2, vertical scale: 2 V/div., horizontal scale: 200 µs/div.
2) Ch2: TD_232; pin 4; programming sequence
Example
0
1
0
1
0
1
1
0
0
21038
X: do not care
S1, S2: user-programmable bit to program the outputs S1
and S2. In the example, S1 is set active, and S2 is inactive.
S0: IrDA pulse select
S0 = (1): 1.627 µs output
S0 = (0): 3/16 bit time pulses, not recommended
B0 to B3: baud rate select words according to the following
table 2 below.
TABLE 2 - TRANSMISSION RATE SELECT
WORDS
Fig. 5 Programming sequence for setting the endec to a bit rate of
12.8 kbit/s. After setting BR/D high (Ch1), the programming
sequence with the control byte (Ch2) is applied to TD_232, pin 4.
1->
STA 1
B3
B2
B1
B0
HEX
BIT RATE
0
0
0
0
0
115.2 kHz
0
0
0
1
1
57.6 kHz
0
0
1
0
2
38.4 kHz
0
0
1
1
3
19.2 kHz
0
1
0
0
4
14.4 kHz
0
1
0
1
5
12.8 kHz
0
1
1
0
6
9.6 kHz
0
1
1
1
7
7.2 kHz
1
0
0
0
8
4.8 kHz
1
0
0
1
9
3.6 kHz
1
0
1
0
A
2.4 kHz
0
1
0
1
1
B
1.8 kHz
MSB
1
1
0
0
C
1.2 kHz
Bold: see example
Note
• IrDA standard only supports 2.4 kbit/s, 9.6 kbit/s, 19.2 kbit/s,
57.6 kbit/s, and 115.2 kbit/s (3.6864 MHz clock). Doubling the
baud rates is permissible by doubling the clock frequency.
0
1
0
0
1
0
0
2->
1) Ch1: BR/D, pin 2, vertical scale: 2 V/div.,
horizontal scale: 200 µs/div.
2) Ch2: TD_232, pin 4; programming sequence
21030
Fig. 6 Programming sequence for setting the endec to a bit rate of
12.8 kbit/s as in figure 5 but with a 3/16 bit pulse duration (S0 = “0”).
EXAMPLE
0
1
0
0
1
0
1
0
LSB
STA
When correctly programmed, the endec shortens the pulse
to be transmitted from the full bit duration to either 3/16 of the
bit length or to 1.627 µs (which is 3/16 of the 115.2 kbit/s bit
duration). For power saving, the short pulse is
recommended.
The received optical pulse shows in case of most of the
Vishay SIR transceivers, constant pulse duration. The Endec
stretches that to the correct bit time according the bit rate
setting. This is shown in the following chapters.
Document Number: 82546
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irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
Rev. 2.1, 17-Nov-10
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TOIM4232
Vishay Semiconductors
SIR Endec for IrDA® Applications
Integrated Interface Circuit
TRANSMIT (TXD) CHANNEL
Figure 7 shows the transmission in the default mode. For
data transfer, the endec is set to that mode by BR/D = “0”. In
the examples "6" is always transmitted (binary “00000110”).
The “0” is represented in the IrDA protocol by an optical
pulse. Also here the LSB is transmitted first after the start bit.
“1” is not transmitted.
The transmission with the highest SIR bit rate of 115.2 bit/s
looks like what is shown in figure 9. However, the horizontal
time scale is different.
1->
STA 0
1->
2->
1
1
0
0
0
0
0
T
2->
3->
1) Ch1: TD_232, pin 4, vertical scale: 2 V/div., horizontal scale: 20 µs/div.
2) Ch2: TD_IR, pin 14; 1.6 µs pulse duration
3) Ch3: TD_LED, pin 9
3->
1) Ch1: TD_232 inp. pin 4, vertical scale: 2 V/div., horizontal scale: 200 µs/div.
2) Ch2: TD_IR, pin 14; 1.6 µs pulse duration
3) Ch3: TD_LED, pin 9
21031
Fig. 7 - Data Transmission with 9.6 kbit/s,
1.627 µs Pulse Duration
Channel 1 shows the signal from the RS232 port already
converted to 3 V logic by U1. The endec encodes that signal
to the RZI IrDA format where a “0” is represented by a pulse.
That is the trace of channel 2. This output is connected the
TXD input of the transceiver and this signal is transmitted as
optical output signal. Channel 3 is the signal for an indicator
lamp connected to the TD_LED driver output. Use 180
serial resistor to supply voltage for limiting the current
through the LED (not shown in the circuit diagram).
When using the (not recommended) 3/16-bit pulse width the
oscillogram looks like figure 8.
21033
Fig. 9 Data transmission with the setting 115.2 kbit/s, 1.627 µs pulse
duration. By definition, the pulse duration of 1.627 µs is identical to
the 3/16-bit pulse width.
RECEIVE (RXD) CHANNEL
In the default 9600 bit/s mode the signals will look like those
shown in figure 10 and figure 11.
1->
2->
3->
1) Ch1: TOIM4232; RD_IR, pin 15, vertical scale: 2 V/div.,
horizontal scale: 200 µs/div.
2) Ch2: TOIM4232; RD_232, pin 3
3) Ch3: TOIM4232; RD_LED, pin 10
1->
21034
Fig. 10 - Data Reception with the Setting 9.6 kbit/s.
Short RXD Pulse.
2->
3->
1) Ch1: TD_232, pin 4, vertical scale: 2 V/div., horizontal scale: 200 µs/div.
2) Ch2: TD_IR, pin 14; 3/16 bit pulse duration
3) Ch3: TD_LED, pin 9
21032
Fig. 8 - Data Transmission with the Setting 9.6 kbit/s,
3/16 bit Pulse Duration (19.5 µs)
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Document Number: 82546
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Rev. 2.1, 17-Nov-10
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TOIM4232
SIR Endec for IrDA® Applications
Integrated Interface Circuit
Vishay Semiconductors
“ECHO-ON" OR "ECHO-OFF" AND "LATENCY
ALLOWANCE”
1->
2->
3->
1) Ch1: TOIM4232; RD_IR, pin 15, vertical scale: 2 V/div.,
horizontal scale: 200 µs/div.
2) Ch2: TOIM4232; RD_232, pin 3
3) Ch3: TOIM4232; RD_LED, pin 10
21035
Fig. 11 - Data Reception with the Setting 9.6 kbit/s.
Same as in Figure 10, extended Pulse Duration.
The endec stretches the received pulses of about 2 µs
duration from the transceiver output (figure 10, channel 1)
independent of the pulse duration to the full bit width
generating NRZ code (channel 2). Channel 3 is the signal for
the indicator lamp.
As shown in figure 11, channels 2 and 3, the final NRZ signal
is identical to figure 10, even when longer pulses are
received.
In the 115.2 kbit/s mode the signals will look like those shown
in figure 10 and figure 11. The difference is just the time
scale. It also indicates the delay of the decoded channel 2 vs.
channel 1.
1->
2->
3->
1) Ch1: TOIM4232; RD_IR, pin 15, vertical scale: 2 V/div.,
horizontal scale: 10 µs/div.
2) Ch2: TOIM4232; RD_232, pin 3
3) Ch3: TOIM4232; RD_LED, pin 10
During transmission, the receiver inside a transceiver
package is exposed to very strong irradiance of the
transmitter, which causes overload conditions in the receiver
circuit. After transmission it takes some time to recover from
this condition and return to the specified sensitivity.
During this time the receiver is in an unstable condition, and
at the output unexpected signals may arise. Also, during
transmission under overload conditions the receiver may
show signals on the RXD channel that are similar to or
identical with the transmitted signal. To get clean or at least
specified conditions for the receive channel during
transmission, different terms were defined. The time to allow
the receiver to recover from overload conditions is the
latency allowance or shorter, just the specified latency. This
is covered by the IrDA physical layer specification and is a
maximum of 10 ms. IrDA specifies shorter negotiable
latency. In SIR the minimum is 0.5 ms. This includes
software latency. Transceivers are in general below 0.3 ms.
In the first generations, some suppliers did not care for the
behavior of the RXD output of the transceivers during
transmission and latency time. The software is able to handle
that. The easiest way is to clean up the receiver channel after
sending the last pulse and waiting for the latency period.
Later, many transceivers that block the RXD channel during
transmission and during the latency period were released to
the market. This behavior is called “Echo-off”. Unfortunately,
some OEMs like to use the signal from the RXD channel
during transmission, as a self-test feature for testing the
device on board without using the optical domain. Therefore,
many new devices have been developed to echo the TXD
input signal at the RXD output. Such behavior is called
“echo-on”.
Some software developed for “echo-off” applications is not
able to receive and understand the signals from echo-on
devices correctly.
Therefore, an add-on to the circuit shown in figure 4 was
generated to suppress the echo from the receiver during
transmission. This modification is shown in figure 13.
During transmission, the signal from the RXD output of the
transceiver is just gated by the transmit signal, (see the
oscilloscope picture in figure 14).
21036
Fig. 12 - Data reception with the setting 115.2 kbit/s
Channel 1 shows the signal from the transceiver. In this case
it is TFDU4100 with unsymmetrical switching times.
TFDU4100 (obsolete) used an open collector output with an
internal load resistor. That caused a slow trailing edge (but
fast enough for all applications). The later generations are
using tri-state outputs with push-pull drivers with symmetrical
pulse switching times. All Vishay IrDA transceivers exhibit
constant output pulse duration in SIR mode of about 2 µs
independent of the duration of the optical input pulse.
Document Number: 82546
For technical questions within your region, please contact one of the following:
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
Rev. 2.1, 17-Nov-10
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15
TOIM4232
Vishay Semiconductors
SIR Endec for IrDA® Applications
Integrated Interface Circuit
R4
optional
R3
C11
MAX3232
1
C+
VCC
+
C3
3
1
U1
C1-
V+
C2+
V-
2
2
6
3
+ C6 + C5 + C7
5
4
15
C2-
5
6
11
10
12
9
T1IN
T2IN
R1OUT
R2OUT
T1OUT
T2OUT
R1IN
R2IN
R5
8
14
7
13
8
7
8
RESET
Vcc
U2
BR/D
RD_IR
RD_232
TD_IR
TD_232
S2
Vcc_SD
S1
X1
NC
X2
RD_LED
GND
TD_LED
16
15
1
14
5
+
U4
2
D
NC_1
COM_1
NO_2
COM_2
4
6
6
8
12
7
11
INS1
INS2
DG2039
10
9
Anode
Cathode
2
13
RXD
Vcc1
GND
U3
TXD
SD
.
1
3
5
7
3
This line not used forTFDU4101
Pin7: TFDU4101:NC
TFDU4300:Vlog
J1
1
6
2
7
3
8
4
9
5
TFDU4300
TFDU4101
C10
4
V+
+
C4
TOIM4232*)
16
*) For TOIM5232 pinning, see figure 1.
RXD
RTS (BR/D)
TXD
R1
DTR (RESET)
Y1
Vcc
CON9
External input
3.6V max.
J2
1
2
CON2
Z1
C1
+ C2
R2
Z2
C8
C9
21047
Fig. 13 - Demo Board Circuit with Echo-Suppression to be Used for Echo-On and Echo-Off Transceivers.
Additionally, with the programmable output S1 of the endec
the echo suppression feature can be switched on and off for
testing. The default mode is echo-off. To enable the echo, S1
is to be set inactive/low. (See the chapter for programming
the TOIM4232, TOIM5232).
The oscilloscope diagrams are shown in figure 14. Channel
2 shows the echo signal on the RXD output of the TFDU4101
transceiver during transmission (Note: TFDU4300 is an
echo-off design and would not show this).
Channel 1 is the signal used for gating the path from the
transceiver RXD output to the endec. On channel 3 the signal
at the input of the endec is shown with a residual signal.
Finally, the output to the RS232 port, RD_232, is clean
without any noise signal.
1->
2->
3->
4->
1) Ch1: TOIM4232; TD_232, pin 4, vertical scale: 2 V/div.,
horizontal scale: 20 µs/div.
2) Ch2: TFDU4101; RXD, pin 4 (IR)
3) Ch3: TOIM4232; RD_IR, pin 15
4) Ch4: TOIM4232; RD_232, pin 3
21037
Fig. 14 - Echo-Suppression
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16
Document Number: 82546
For technical questions within your region, please contact one of the following:
Rev. 2.1, 17-Nov-10
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
Legal Disclaimer Notice
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree
to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and
damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay
or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to
obtain written terms and conditions regarding products designed for such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 11-Mar-11
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